INT32 _stp_trigger_firmware_assert_via_emi(VOID)
{
PUINT8 p_virtual_addr = NULL;
INT32 status = -1;
INT32 i = 0, j = 0;
do {
STP_BTM_INFO_FUNC("[Force Assert] stp_trigger_firmware_assert_via_emi -->\n");
p_virtual_addr = wmt_plat_get_emi_virt_add(EXP_APMEM_CTRL_HOST_OUTBAND_ASSERT_W1);
if(!p_virtual_addr)
{
STP_BTM_ERR_FUNC("get virtual address fail\n");
return -1;
}
CONSYS_REG_WRITE(p_virtual_addr, EXP_APMEM_HOST_OUTBAND_ASSERT_MAGIC_W1);
STP_BTM_INFO_FUNC("[Force Assert] stp_trigger_firmware_assert_via_emi <--\n");
#if 1
//wait for firmware assert
osal_sleep_ms(50);
//if firmware is not assert self, host driver helps it.
do
{
if(0 != mtk_wcn_stp_coredump_start_get()){
status = 0;
break;
}
mtk_wcn_stp_wakeup_consys();
STP_BTM_INFO_FUNC("[Force Assert] wakeup consys (%d)\n", i);
stp_dbg_poll_cpupcr(5 , 1 , 1);
osal_sleep_ms(5);
i++;
if(i > 20){
i = 0;
break;
}
} while(1);
#endif
if(0 != mtk_wcn_stp_coredump_start_get()){
status = 0;
break;
}
j++;
if(j > 8) {
j = 0;
break;
}
} while(1);
return status;
}
INT32 _stp_trigger_firmware_assert_via_emi(VOID)
{
INT32 status = -1;
INT32 j = 0;
wmt_plat_force_trigger_assert(STP_FORCE_TRG_ASSERT_DEBUG_PIN);
do {
if(0 != mtk_wcn_stp_coredump_start_get()){
status = 0;
break;
}
stp_dbg_poll_cpupcr(5 , 1 , 1);
stp_dbg_poll_dmaregs(5 , 1);
j++;
STP_BTM_INFO_FUNC("Wait for assert message (%d)\n", j);
osal_sleep_ms(20);
if(j > 49) { /* wait for 1 second*/
stp_dbg_set_fw_info("host trigger fw assert timeout",
osal_strlen("host trigger fw assert timeout"),STP_HOST_TRIGGER_ASSERT_TIMEOUT);
wcn_core_dump_timeout();/* trigger collect SYS_FTRACE*/
break;
}
} while(1);
return status;
}
static inline INT32 _stp_btm_do_fw_assert(MTKSTP_BTM_T *stp_btm){
INT32 status = -1;
INT32 j = 0;
MTK_WCN_BOOL bRet = MTK_WCN_BOOL_FALSE;
//send assert command
STP_BTM_INFO_FUNC("trigger stp assert process\n");
bRet = stp_btm->wmt_notify(BTM_TRIGGER_STP_ASSERT_OP);
if (MTK_WCN_BOOL_TRUE == bRet)
{
do {
if(0 != mtk_wcn_stp_coredump_start_get()){
status = 0;
break;
}
j++;
STP_BTM_INFO_FUNC("Wait for assert message (%d)\n", j);
if(j > 150)
break;
osal_sleep_ms(20);
} while(1);
}
else
{
status = -1;
STP_BTM_INFO_FUNC("trigger stp assert failed\n");
}
if (0 == status)
STP_BTM_INFO_FUNC("trigger stp assert succeed\n");
return status;
}
INT32 _stp_trigger_firmware_assert_via_emi(VOID)
{
INT32 status = -1;
INT32 j = 0;
CONSYS_REG_WRITE(CONSYS_AP2CONN_OSC_EN_REG,CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG) & ~CONSYS_AP2CONN_WAKEUP_BIT);
STP_BTM_INFO_FUNC("enable:dump CONSYS_AP2CONN_OSC_EN_REG(0x%x)\n",CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG));
usleep_range(64, 96);
CONSYS_REG_WRITE(CONSYS_AP2CONN_OSC_EN_REG,CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG) | CONSYS_AP2CONN_WAKEUP_BIT);
STP_BTM_INFO_FUNC("disable:dump CONSYS_AP2CONN_OSC_EN_REG(0x%x)\n",CONSYS_REG_READ(CONSYS_AP2CONN_OSC_EN_REG));
do {
if(0 != mtk_wcn_stp_coredump_start_get()){
status = 0;
break;
}
stp_dbg_poll_cpupcr(5 , 1 , 1);
j++;
STP_BTM_INFO_FUNC("Wait for assert message (%d)\n", j);
osal_msleep(20);
if(j > 8)
break;
} while(1);
return status;
}
INT32 _stp_trigger_firmware_assert_via_emi(VOID)
{
INT32 status = -1;
INT32 j = 0;
wmt_plat_force_trigger_assert(STP_FORCE_TRG_ASSERT_DEBUG_PIN);
do {
if(0 != mtk_wcn_stp_coredump_start_get()){
status = 0;
break;
}
stp_dbg_poll_cpupcr(5 , 1 , 1);
j++;
STP_BTM_INFO_FUNC("Wait for assert message (%d)\n", j);
osal_msleep(20);
if(j > 24)
break;
} while(1);
return status;
}
