int __init musb_platform_init(struct musb *musb)
{
struct otg_transceiver *x = otg_get_transceiver();
u32 l;
#if defined(CONFIG_ARCH_OMAP2430)
omap_cfg_reg(AE5_2430_USB0HS_STP);
#endif
/* Reset controller */
if (musb->set_clock)
musb->set_clock(musb->clock, 1);
else
clk_enable(musb->clock);
l = omap_readl(OTG_SYSCONFIG);
l |= SOFTRST;
omap_writel(l, OTG_SYSCONFIG);
while (!(RESETDONE & omap_readl(OTG_SYSSTATUS)))
cpu_relax();
musb->xceiv = *x;
musb_platform_resume(musb);
l = omap_readl(OTG_SYSCONFIG);
l &= ~ENABLEWAKEUP; /* disable wakeup */
l &= ~NOSTDBY; /* remove possible nostdby */
l |= SMARTSTDBY; /* enable smart standby */
l &= ~AUTOIDLE; /* disable auto idle */
l &= ~NOIDLE; /* remove possible noidle */
l |= SMARTIDLE; /* enable smart idle */
/*
* MUSB AUTOIDLE don't work in 3430.
* Workaround by Richard Woodruff/TI
*/
if (!cpu_is_omap3430())
l |= AUTOIDLE; /* enable auto idle */
omap_writel(l, OTG_SYSCONFIG);
l = omap_readl(OTG_INTERFSEL);
l |= ULPI_12PIN;
omap_writel(l, OTG_INTERFSEL);
pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG),
omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL),
omap_readl(OTG_SIMENABLE));
omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
if (is_host_enabled(musb))
musb->board_set_vbus = omap_set_vbus;
if (!musb->xceiv.set_power && is_peripheral_enabled(musb))
musb->xceiv.set_power = omap_set_power;
musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
return 0;
}
int __init musb_platform_init(struct musb *musb, void *board_data)
{
u32 l;
struct omap_musb_board_data *data = board_data;
/* We require some kind of external transceiver, hooked
* up through ULPI. TWL4030-family PMICs include one,
* which needs a driver, drivers aren't always needed.
*/
musb->xceiv = otg_get_transceiver();
if (!musb->xceiv) {
pr_err("HS USB OTG: no transceiver configured\n");
return -ENODEV;
}
musb_platform_resume(musb);
l = musb_readl(musb->mregs, OTG_SYSCONFIG);
l &= ~ENABLEWAKEUP; /* disable wakeup */
l &= ~NOSTDBY; /* remove possible nostdby */
l |= SMARTSTDBY; /* enable smart standby */
l &= ~AUTOIDLE; /* disable auto idle */
l &= ~NOIDLE; /* remove possible noidle */
l |= SMARTIDLE; /* enable smart idle */
/*
* MUSB AUTOIDLE don't work in 3430.
* Workaround by Richard Woodruff/TI
*/
if (!cpu_is_omap3430())
l |= AUTOIDLE; /* enable auto idle */
musb_writel(musb->mregs, OTG_SYSCONFIG, l);
l = musb_readl(musb->mregs, OTG_INTERFSEL);
if (data->interface_type == MUSB_INTERFACE_UTMI) {
/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
l &= ~ULPI_12PIN; /* Disable ULPI */
l |= UTMI_8BIT; /* Enable UTMI */
} else {
l |= ULPI_12PIN;
}
musb_writel(musb->mregs, OTG_INTERFSEL, l);
pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
musb_readl(musb->mregs, OTG_REVISION),
musb_readl(musb->mregs, OTG_SYSCONFIG),
musb_readl(musb->mregs, OTG_SYSSTATUS),
musb_readl(musb->mregs, OTG_INTERFSEL),
musb_readl(musb->mregs, OTG_SIMENABLE));
if (is_host_enabled(musb))
musb->board_set_vbus = omap_set_vbus;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
return 0;
}
int __init musb_platform_init(struct musb *musb)
{
struct otg_transceiver *x = otg_get_transceiver();
u32 l;
u8 val;
#if defined(CONFIG_ARCH_OMAP2430)
omap_cfg_reg(AE5_2430_USB0HS_STP);
#endif
if (!x) {
pr_err("omap: musb: null transceiver found\n");
return -ENODEV;
}
musb->xceiv = *x;
musb_platform_resume(musb);
l = omap_readl(OTG_SYSCONFIG);
l &= ~ENABLEWAKEUP; /* disable wakeup */
l &= ~NOSTDBY; /* remove possible nostdby */
l |= SMARTSTDBY; /* enable smart standby */
l &= ~AUTOIDLE; /* disable auto idle */
l &= ~NOIDLE; /* remove possible noidle */
l |= SMARTIDLE; /* enable smart idle */
l |= AUTOIDLE; /* enable auto idle */
omap_writel(l, OTG_SYSCONFIG);
l = omap_readl(OTG_INTERFSEL);
l |= ULPI_12PIN;
omap_writel(l, OTG_INTERFSEL);
#ifdef CONFIG_MACH_OMAP3EVM
/* Program PHY to use external Vbus supply on new OMAP3EVM */
if (get_omap3evm_board_rev() >= OMAP3EVM_BOARD_GEN_2) {
val = musb_readb(musb->mregs, MUSB_ULPI_BUSCONTROL);
val |= ULPI_USE_EXTVBUS;
musb_writeb(musb->mregs, MUSB_ULPI_BUSCONTROL, val);
}
#endif
pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG),
omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL),
omap_readl(OTG_SIMENABLE));
omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
if (is_host_enabled(musb))
musb->board_set_vbus = omap_set_vbus;
if (is_peripheral_enabled(musb))
musb->xceiv.set_power = omap_set_power;
musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
return 0;
}
int __init musb_platform_init(struct musb *musb)
{
u32 l;
#if defined(CONFIG_ARCH_OMAP2430)
omap_cfg_reg(AE5_2430_USB0HS_STP);
#endif
/* We require some kind of external transceiver, hooked
* up through ULPI. TWL4030-family PMICs include one,
* which needs a driver, drivers aren't always needed.
*/
musb->xceiv = otg_get_transceiver();
if (!musb->xceiv) {
pr_err("HS USB OTG: no transceiver configured\n");
return -ENODEV;
}
musb_platform_resume(musb);
l = musb_readl(musb->mregs, OTG_SYSCONFIG);
l &= ~ENABLEWAKEUP; /* disable wakeup */
l &= ~NOSTDBY; /* remove possible nostdby */
l |= SMARTSTDBY; /* enable smart standby */
l &= ~AUTOIDLE; /* disable auto idle */
l &= ~NOIDLE; /* remove possible noidle */
l |= SMARTIDLE; /* enable smart idle */
/*
* MUSB AUTOIDLE don't work in 3430.
* Workaround by Richard Woodruff/TI
*/
if (!cpu_is_omap3430())
l |= AUTOIDLE; /* enable auto idle */
musb_writel(musb->mregs, OTG_SYSCONFIG, l);
l = musb_readl(musb->mregs, OTG_INTERFSEL);
l |= ULPI_12PIN;
musb_writel(musb->mregs, OTG_INTERFSEL, l);
pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
musb_readl(musb->mregs, OTG_REVISION),
musb_readl(musb->mregs, OTG_SYSCONFIG),
musb_readl(musb->mregs, OTG_SYSSTATUS),
musb_readl(musb->mregs, OTG_INTERFSEL),
musb_readl(musb->mregs, OTG_SIMENABLE));
omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
if (is_host_enabled(musb))
musb->board_set_vbus = omap_set_vbus;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
return 0;
}
int __init musb_platform_init(struct musb *musb)
{
u32 l;
#if defined(CONFIG_ARCH_OMAP2430)
omap_cfg_reg(AE5_2430_USB0HS_STP);
#endif
musb->xceiv = otg_get_transceiver();
if (!musb->xceiv) {
pr_err("HS USB OTG: no transceiver configured\n");
return -ENODEV;
}
musb_platform_resume(musb);
l = omap_readl(OTG_SYSCONFIG);
l &= ~ENABLEWAKEUP;
l &= ~NOSTDBY;
l |= SMARTSTDBY;
l &= ~AUTOIDLE;
l &= ~NOIDLE;
l |= SMARTIDLE;
if (!cpu_is_omap3430())
l |= AUTOIDLE;
omap_writel(l, OTG_SYSCONFIG);
l = omap_readl(OTG_INTERFSEL);
l |= ULPI_12PIN;
omap_writel(l, OTG_INTERFSEL);
pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
omap_readl(OTG_REVISION), omap_readl(OTG_SYSCONFIG),
omap_readl(OTG_SYSSTATUS), omap_readl(OTG_INTERFSEL),
omap_readl(OTG_SIMENABLE));
omap_vbus_power(musb, musb->board_mode == MUSB_HOST, 1);
if (is_host_enabled(musb))
musb->board_set_vbus = omap_set_vbus;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
return 0;
}
int __init musb_platform_init(struct musb *musb)
{
struct otg_transceiver *xceiv;
xceiv = kzalloc(sizeof(struct otg_transceiver), GFP_KERNEL);
if (!xceiv)
return -ENOMEM;
xceiv->set_peripheral = sep0611_set_peripheral;
otg_set_transceiver(xceiv);
musb->xceiv = otg_get_transceiver();
if (!musb->xceiv) {
return -ENODEV;
}
musb_platform_resume(musb);
if (is_host_enabled(musb))
musb->xceiv->set_host = sep0611_set_host;
musb->board_set_vbus = sep0611_set_vbus;
if (is_peripheral_enabled(musb))
musb->xceiv->set_power = sep0611_set_power;
musb->a_wait_bcon = MUSB_TIMEOUT_A_WAIT_BCON;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
musb_writew(musb->mregs, RX_DPKTBUFDIS, 0xffff); /* disable RX double packet buffer */
musb_writew(musb->mregs, TX_DPKTBUFDIS, 0xffff); /* disable TX double packet buffer */
#ifdef SEP0611_ULPI_RST
/*spdw_board has two usb ports,one is otg(port_index=0), the other is host(port_index=1),default is otg port*/
musb->port_index = 0;
#endif
#ifdef SEP0611_PHY_RST
/*demo_board has two usb ports*/
musb->port_index = 0;
#endif
return 0;
}
int __init musb_platform_init(struct musb *musb)
{
u32 l;
struct device *dev = musb->controller;
struct musb_hdrc_platform_data *plat = dev->platform_data;
struct omap_musb_board_data *data = plat->board_data;
int status;
u32 val;
/* We require some kind of external transceiver, hooked
* up through ULPI. TWL4030-family PMICs include one,
* which needs a driver, drivers aren't always needed.
*/
musb->xceiv = otg_get_transceiver();
if (!musb->xceiv) {
pr_err("HS USB OTG: no transceiver configured\n");
return -ENODEV;
}
/* Fixme this can be enabled when load the gadget driver also*/
musb_platform_resume(musb);
/*powerup the phy as romcode would have put the phy in some state
* which is impacting the core retention if the gadget driver is not
* loaded.
*/
l = musb_readl(musb->mregs, OTG_INTERFSEL);
if (data->interface_type == MUSB_INTERFACE_UTMI) {
/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
l &= ~ULPI_12PIN; /* Disable ULPI */
l |= UTMI_8BIT; /* Enable UTMI */
} else {
l |= ULPI_12PIN;
}
musb_writel(musb->mregs, OTG_INTERFSEL, l);
pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
musb_readl(musb->mregs, OTG_REVISION),
musb_readl(musb->mregs, OTG_SYSCONFIG),
musb_readl(musb->mregs, OTG_SYSSTATUS),
musb_readl(musb->mregs, OTG_INTERFSEL),
musb_readl(musb->mregs, OTG_SIMENABLE));
if (is_host_enabled(musb))
musb->board_set_vbus = omap_set_vbus;
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
plat->is_usb_active = is_musb_active;
wake_lock_init(&plat->musb_lock, WAKE_LOCK_SUSPEND, "musb_wake_lock");
if (cpu_is_omap44xx()) {
phymux_base = ioremap(0x4A100000, SZ_1K);
ctrl_base = ioremap(0x4A002000, SZ_1K);
/* register for transciever notification*/
status = otg_register_notifier(musb->xceiv, &musb->nb);
if (status) {
DBG(1, "notification register failed\n");
wake_lock_destroy(&plat->musb_lock);
}
ctrl_base = ioremap(0x4A002000, SZ_1K);
if (!ctrl_base) {
dev_err(dev, "ioremap failed\n");
return -ENOMEM;
}
}
/* configure in force idle/ standby */
musb_writel(musb->mregs, OTG_FORCESTDBY, 1);
val = musb_readl(musb->mregs, OTG_SYSCONFIG);
val &= ~(SMARTIDLEWKUP | NOSTDBY | ENABLEWAKEUP);
val |= FORCEIDLE | FORCESTDBY;
musb_writel(musb->mregs, OTG_SYSCONFIG, val);
l = musb_readl(musb->mregs, OTG_FORCESTDBY);
l &= ~ENABLEFORCE; /* disable MSTANDBY */
musb_writel(musb->mregs, OTG_FORCESTDBY, l);
return 0;
}
