/* change the DDR frequency. */
int update_lpddr2_freq(int ddr_rate)
{
unsigned long ttbr1, flags;
int mode = get_bus_freq_mode();
if (ddr_rate == curr_ddr_rate)
return 0;
printk(KERN_DEBUG "\nBus freq set to %d start...\n", ddr_rate);
spin_lock_irqsave(&freq_lock, flags);
/*
* Flush the TLB, to ensure no TLB maintenance occurs
* when DDR is in self-refresh.
*/
ttbr1 = save_ttbr1();
/* Now change DDR frequency. */
mx6_change_lpddr2_freq(ddr_rate,
(mode == BUS_FREQ_LOW || mode == BUS_FREQ_ULTRA_LOW) ? 1 : 0);
restore_ttbr1(ttbr1);
curr_ddr_rate = ddr_rate;
spin_unlock_irqrestore(&freq_lock, flags);
printk(KERN_DEBUG "\nBus freq set to %d done...\n", ddr_rate);
return 0;
}
/* change the DDR frequency. */
int update_lpddr2_freq(int ddr_rate)
{
unsigned long ttbr1, flags;
if (ddr_rate == curr_ddr_rate)
return 0;
dev_dbg(busfreq_dev, "\nBus freq set to %d start...\n", ddr_rate);
spin_lock_irqsave(&freq_lock, flags);
/*
* Flush the TLB, to ensure no TLB maintenance occurs
* when DDR is in self-refresh.
*/
ttbr1 = save_ttbr1();
/* Now change DDR frequency. */
mx6_change_lpddr2_freq(ddr_rate,
(low_bus_freq_mode | ultra_low_bus_freq_mode));
restore_ttbr1(ttbr1);
curr_ddr_rate = ddr_rate;
spin_unlock_irqrestore(&freq_lock, flags);
dev_dbg(busfreq_dev, "\nBus freq set to %d done...\n", ddr_rate);
return 0;
}
/* change the DDR frequency. */
int update_lpddr2_freq(int ddr_rate)
{
if (ddr_rate == curr_ddr_rate)
return 0;
dev_dbg(busfreq_dev, "\nBus freq set to %d start...\n", ddr_rate);
/*
* Flush the TLB, to ensure no TLB maintenance occurs
* when DDR is in self-refresh.
*/
local_flush_tlb_all();
/* Now change DDR frequency. */
mx6_change_lpddr2_freq(ddr_rate,
(low_bus_freq_mode | ultra_low_bus_freq_mode),
reg_addrs);
curr_ddr_rate = ddr_rate;
dev_dbg(busfreq_dev, "\nBus freq set to %d done...\n", ddr_rate);
return 0;
}
