/*!
* mxc_init() - initial tcd setup
* Allocate interrupts and setup hardware.
* @param otg - otg instance
*/
void mxc_init (struct otg_instance *otg)
{
int timeout;
unsigned long flags;
//u32 mode = XCVR_D_SE0;
u32 mode = XCVR_SE0_D_NEW;
TRACE_MSG0(otg->ocd->TAG, "FS_INIT");
local_irq_save (flags);
fs_wl(OTG_SYS_CTRL, 0x0);
/* 2. Ensure hardware is reset and cleared
*/
// XXX
//fs_clear_words((volatile u32 *)IO_ADDRESS(OTG_DMA_BASE), (32*16/4));
fs_clear_words((volatile u32 *)IO_ADDRESS(OTG_DMA_BASE), (16*16/4));
fs_clear_words((void *)IO_ADDRESS(OTG_FUNC_BASE), 0x200);
mxc_main_clock_off();
//fs_wl_set(OCD, OTG_CORE_RST_CTRL, MODULE_RSTI2C | 0x3f);
fs_wl(OTG_CORE_RST_CTRL, MODULE_RSTI2C | 0x3f);
while (fs_rl(OTG_CORE_RST_CTRL));
/* 3. OTG Hardware Mode and clocks
* set to diff, diff and Configure the OTG to behave as function
*/
TRACE_MSG0(otg->ocd->TAG, "3. OTG Software Mode and clock");
fs_orl(OTG_CORE_HWMODE, MODULE_CRECFG_SHNP); // set to software hnp
mxc_set_transceiver_mode(mxc_transceiver_mode);
TRACE_MSG2(otg->ocd->TAG, "FS_INIT: set hwmode: %08x want %08x", fs_rl(OTG_CORE_HWMODE), MODULE_CRECFG_SHNP);
fs_andl(OTG_CORE_HNP_CSTAT, ~0x00000800);
fs_rl(OTG_CORE_HNP_CSTAT);
//fs_wl_set(OCD, OTG_CORE_HNP_T3PCR, 0x00000000);
fs_wl(OTG_CORE_HNP_T3PCR, 0x00000000);
fs_rl(OTG_CORE_HNP_T3PCR);
TRACE_MSG0(otg->ocd->TAG, "6. Enable ");
TRACE_MSG0(otg->ocd->TAG, "enable core interrupts");
fs_wl(OTG_CORE_CINT_STEN, 0);
fs_wl(OTG_CORE_CINT_STEN, MODULE_ASHNPINT_EN |
MODULE_ASHCINT_EN | MODULE_HNPINT_EN | MODULE_FCINT | MODULE_HCINT);
TRACE_MSG0(otg->ocd->TAG, "enable host interrupts");
fs_wl(OTG_CORE_HINT_STEN, HNP_I2COTGINT_EN | HNP_AWAITBTO_EN |
HNP_AIDLEBDTO_EN | HNP_SRPSUCFAIL_EN | HNP_SRPINT_EN | HNP_VBUSERROR_EN |
HNP_ABSEVAILD_EN | HNP_ABUSVALID_EN | HNP_MASSLVCHG_EN | HNP_IDCHANGE_EN);
TRACE_MSG0(otg->ocd->TAG, "disable various host interrupts");
fs_wl(OTG_HOST_XYINT_STEN, 0);
fs_wl(OTG_HOST_ETD_EN, 0);
fs_wl(OTG_HOST_ETD_DONE, 0);
fs_wl(OTG_HOST_SINT_STEN, 0);
TRACE_MSG0(otg->ocd->TAG, "disable various function interrupts");
fs_wl(OTG_FUNC_XYINT_STEN, 0);
fs_wl(OTG_FUNC_EP_EN, 0);
fs_wl(OTG_FUNC_EP_DEN, 0);
fs_wl(OTG_DMA_DINT_STEN, 0x3);
//fs_wb(I2C_MASTER_INT_REG_ADD, 0xf0);
//fs_wb(I2C_MASTER_INT_REG_ADD, 0x00);
// XXX note that newer designs than the mx21 will also need to check
// and/or set OTG_CORE_INTERRUPT_STEN
TRACE_MSG0(otg->ocd->TAG, "--");
TRACE_MSG0(otg->ocd->TAG, "8. Ready ");
TRACE_MSG1(otg->ocd->TAG, "CINT_STEN: %08x", fs_rl(OTG_CORE_CINT_STEN));
local_irq_restore (flags);
}
/*!
* zasevb_tcd_mod_init() - initial tcd setup
* This performs the platform specific hardware setup for the MX2ADS.
*/
int zasevb_tcd_mod_init (void)
{
int i2c = 1;
int gpio = 1;
/* ------------------------------------------------------------------------ */
#ifdef CONFIG_OTG_ZASEVB_DIFFERENTIAL_UNIDIRECTIONAL
int hwmode = XCVR_D_SE0_NEW;
int newmode = XCVR_D_D;
isp1301_tx_mode_t tx_mode = vp_vm_unidirectional; // MXC91231 ok
printk (KERN_INFO"Current setting is DIFFERENTIAL UNIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_UNIDIRECTIONAL
int hwmode = XCVR_SE0_D_NEW;
int newmode = XCVR_SE0_D_NEW;
isp1301_tx_mode_t tx_mode = dat_se0_unidirectional; // MXC91331 ok
printk (KERN_INFO"Current setting is SINGLE ENDED UNIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#elif CONFIG_OTG_ZASEVB_DIFFERENTIAL_BIDIRECTIONAL
int hwmode = XCVR_D_D;
int newmode = XCVR_D_D;
isp1301_tx_mode_t tx_mode = vp_vm_bidirectional; // MXC91331 ok
printk (KERN_INFO"Current setting is DIFFERENTIAL BIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_BIDIRECTIONAL
int hwmode = XCVR_SE0_SE0;
int newmode = XCVR_SE0_SE0;
isp1301_tx_mode_t tx_mode = dat_se0_bidirectional; //MXC91231 ok
printk (KERN_INFO"Current setting is SINGLE ENDED BIDIRECTIONAL\n");
/* ------------------------------------------------------------------------ */
#else
#error Please Configure Transceiver Mode
#endif /* CONFIG_OTG_ZASEVB_.... */
/* ------------------------------------------------------------------------ */
TRACE_MSG0(TCD, "1. I2C setup");
THROW_IF ((i2c = i2c_configure(ADAPTER_NAME, ISP1301_I2C_ADDR_HIGH)), error);
TRACE_MSG0(TCD, "2. ISP1301 module setup");
// isp1301_mod_init(&zasevb_isp1301_bh);
TRACE_MSG0(TCD, "3. SET TCD OPS");
THROW_UNLESS(zasevb_tcd_instance = otg_set_tcd_ops(&tcd_ops), error);
TRACE_MSG0(TCD, "4. ISP1301 device setup");
mxc_iomux_gpio_isp1301_set (hwmode);
#ifdef CONFIG_ARCH_MXC91131
writel (0x00000051, PLL2_DP_HFSOP);
writel (0x00000051, PLL2_DP_OP);
#endif /* CONFIG_ARCH_MXC91131 */
/* ------------------------------------------------------------------------ */
TRACE_MSG0(TCD, "7. SET HWMODE");
isp1301_configure(tx_mode, spd_susp_reg);
mxc_main_clock_on();
//mxc_host_clock_on();
//mxc_func_clock_on();
mxc_set_transceiver_mode(newmode);
/* Success!
*/
TRACE_MSG0(TCD, "8. Success!");
CATCH(error) {
printk(KERN_INFO"%s: failed\n", __FUNCTION__);
UNLESS (i2c) i2c_close();
// UNLESS (gpio) gpio_free_irq (ZGPIO_PORT, ZGPIO_PIN, GPIO_HIGH_PRIO);
return -EINVAL;
}
TRACE_MSG0(TCD, "MX2_MOD_TCD_INIT FINISHED");
return 0;
}
/*!
* mxc91231_tcd_mod_init() - initial tcd setup
* This performs the platform specific hardware setup for the MX2ADS.
*/
int mxc91231_tcd_mod_init (void)
{
int i2c = 1;
int gpio = 1;
bool res;
unsigned int reg_value;
int i;
#if 1
#ifdef CONFIG_OTG_BRASSBOARD_DIFFERENTIAL_BIDIRECTIONAL
int hwmode = XCVR_D_D;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_BRASSBOARD_DIFFERENTIAL_UNIDIRECTIONAL
int hwmode = XCVR_D_SE0_NEW;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_BRASSBOARD_SINGLE_ENDED_UNIDIRECTIONAL
int hwmode = XCVR_SE0_D_NEW;
int newmode = XCVR_SE0_D_NEW;
#elif CONFIG_OTG_BRASSBOARD_SINGLE_ENDED_BIDIRECTIONAL
int hwmode = XCVR_SE0_SE0;
int newmode = XCVR_SE0_SE0;
#else
#error Please Configure Transceiver Mode
#endif /* CONFIG_OTG_BRASSBOARD_.... */
#endif
printk(KERN_INFO"%s: AAAA22\n",__FUNCTION__);
TRACE_MSG0(TCD, "1. mc13783 Connectivity");
mxc_mc13783_mod_init();
TRACE_MSG0(TCD, "2. Transceiver setup");
switch(hwmode) {
case XCVR_D_D:
case XCVR_SE0_D_NEW:
case XCVR_D_SE0_NEW:
break;
case XCVR_SE0_SE0:
// this works with XCVR_SE0_SE0 if AP_GPIO_AP_C16 not configured
//isp1301_configure(dat_se0_bidirectional, spd_susp_reg); // XCVR_SEO_SE0
// XXX configure mc13783 transceiver here
break;
}
//isp1301_configure(vp_vm_bidirectional, spd_susp_reg); // XCVR_D_D
TRACE_MSG0(TCD, "5. SET TCD OPS");
THROW_UNLESS(mxc91231_tcd_instance = otg_set_tcd_ops(&tcd_ops), error);
mxc_iomux_gpio_mc13783_set (hwmode);
#if 0
/*
*
* Default
* USB_TXEO_B OE (9 OE)
* USB_DAT_VP DAT_VP (14 DAT/VP)
* USB_SE0_VM SE0_VM (13 SE0/VM)
*
* USB_RXD RCV (12 RCV)
*
* USB_VP VP (11 VP)
* USB_VM VM (10 VM)
*
* AR_USB_VP GP_AP_C16 MUX3 - USB_VP1 AP_GPIO_AP_C16
* AR_USB_VM GP_AP_C17 MUX3 - USB_VM1 AP_GPIO_AP_C17
*/
TRACE_MSG0(OCD, "6. Setup USBOTG IOMUX");
#if defined(CONFIG_ARCH_MXC91231)
printk(KERN_INFO"IOMUX setting for MXC91231\n");
iomux_config_mux(SP_USB_TXOE_B, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_DAT_VP, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_SE0_VM, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_RXD, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
#endif
#if defined(CONFIG_MACH_ARGONLVPHONE)
printk(KERN_INFO"IOMUX setting for MXC91331 and MXC91321\n");
iomux_config_mux(PIN_USB_XRXD, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_TXENB, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
#endif /* CONFIG_MACH_ARGONLVPHONE */
#endif
switch(hwmode) {
case XCVR_D_SE0_NEW:
TRACE_MSG0(TCD, "D_D - vp_vm_bidirectional");
printk(KERN_INFO"%s: D_D - Differential Unidirectional\n", __FUNCTION__);
// #if defined(CONFIG_ARCH_MXC91231)
// iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// #endif
// mc13783_convity_set_single_ended_mode(FALSE);
// mc13783_convity_set_directional_mode(FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, FALSE);
break;
case XCVR_SE0_D_NEW:
TRACE_MSG0(TCD, "SE0_D");
printk(KERN_INFO"%s: SE0_D - Single Ended Unidirectional\n", __FUNCTION__);
// mc13783_convity_set_single_ended_mode(TRUE);
// mc13783_convity_set_directional_mode(FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, TRUE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, FALSE);
break;
case XCVR_D_D:
TRACE_MSG0(TCD, "D_SE0");
printk(KERN_INFO"%s: D_SE0 - Differential Bidirectional\n", __FUNCTION__);
// mc13783_convity_set_single_ended_mode(FALSE);
// mc13783_convity_set_directional_mode(TRUE);
// iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, FALSE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, TRUE);
break;
case XCVR_SE0_SE0:
TRACE_MSG0(TCD, "SE0_SE0 - SEO_bidirectional");
printk(KERN_INFO"%s: SE0_SE0 - Single Ended Bidirectional\n", __FUNCTION__);
printk("OTG_DEBUG: set GPIO 16 and 17 to defaults, config BIT_DATSE0 and BIT_BIDIR for 3 wire\n");
// mc13783_convity_set_single_ended_mode(TRUE);
//
#if defined(CONFIG_ARCH_MXC91231)
iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_DEFAULT);
iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_DEFAULT);
#endif
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_DATSE0, TRUE);
power_ic_set_reg_bit(POWER_IC_REG_ATLAS_USB_0, BIT_BIDIR, TRUE);
// debugging stuff
// unsigned int reg_value;
// power_ic_read_reg(POWER_IC_REG_ATLAS_USB_0, ®_value);
// printk("OTG_DEBUG: Atlas POWER_IC_REG_ATLAS_USB_0 register value is: %#8X\n", reg_value);
break;
}
TRACE_MSG0(TCD, "7. SET HWMODE");
mxc_set_transceiver_mode(newmode);
#if 0
// Need to test if the following lines are needed
mc13783_convity_set_var_disconnect (TRUE); // variable 1k5 and UDP/UDM pull-down are disconnected. (PULLOVER)
mc13783__convity_set_usb_transceiver (TRUE); //USB transceiver is disabled (USBXCVREN)
mc13783__convity_set_udp_auto_connect (FALSE); //variable UDP is not automatically connected (SE0CONN)
mc13783__convity_set_pull_down_switch (PD_UDP_150, FALSE); //150K UDP pull-up switch is out (DP150KPU)
mc13783__convity_set_udp_pull(FALSE); //1.5K UDP pull-up and USB xcver is controlled by SPI bits.(USBCNTRL)
mc13783__convity_set_output (TRUE, FALSE); //disable vbus
mc13783__convity_set_output (FALSE, FALSE); //disable vusb
mc13783__convity_set_output (FALSE, TRUE); //enable vusb
#endif
#if 0 // Need to turn this on just find power_ic call to replace mc13783 with
for (i=48; i<51; i++){
mc13783_read_reg (PRIO_CONN, i, ®_value);
printk (KERN_INFO"Register %d = %8X\n", i, reg_value);
}
#endif
/* Success! */
TRACE_MSG0(TCD, "8. Success!");
CATCH(error) {
printk(KERN_INFO"%s: failed\n", __FUNCTION__);
UNLESS (i2c) i2c_close();
//SHP
//UNLESS (gpio) gpio_free_irq (3, GPIO_PIN, GPIO_HIGH_PRIO);
return -EINVAL;
}
TRACE_MSG0(TCD, "MX2_MOD_TCD_INIT FINISHED");
return 0;
}
/*!
* mxc91231_tcd_mod_init() - initial tcd setup
* This performs the platform specific hardware setup for the MX2ADS.
*/
int mxc91231_tcd_mod_init (void)
{
int i2c = 1;
int gpio = 1;
bool res;
unsigned int reg_value;
int i;
#if 0
#ifdef CONFIG_OTG_ZASEVB_DIFFERENTIAL_UNIDIRECTIONAL
int mode = XCVR_D_D;
#elif CONFIG_OTG_ZASEVB_DIFFERENTIAL_BIDIRECTIONAL
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_UNIDIRECTIONAL
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_BIDIRECTIONAL
int mode = XCVR_SE0_SE0;
#endif /* CONFIG_OTG_ZASEVB_.... */
#endif
#if 1
#ifdef CONFIG_OTG_ZASEVB_DIFFERENTIAL_BIDIRECTIONAL
int hwmode = XCVR_D_D;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_ZASEVB_DIFFERENTIAL_UNIDIRECTIONAL
int hwmode = XCVR_D_SE0_NEW;
int newmode = XCVR_D_D;
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_UNIDIRECTIONAL
int hwmode = XCVR_SE0_D_NEW;
int newmode = XCVR_SE0_D_NEW;
#elif CONFIG_OTG_ZASEVB_SINGLE_ENDED_BIDIRECTIONAL
int hwmode = XCVR_SE0_SE0;
int newmode = XCVR_SE0_SE0;
#else
#error Please Configure Transceiver Mode
#endif /* CONFIG_OTG_ZASEVB_.... */
#endif
printk(KERN_INFO"%s: AAAA22\n",__FUNCTION__);
TRACE_MSG0(TCD, "1. MC13783 Connectivity");
mxc_mc13783_mod_init();
TRACE_MSG0(TCD, "2. Transceiver setup");
switch(hwmode) {
case XCVR_D_D:
case XCVR_SE0_D_NEW:
case XCVR_D_SE0_NEW:
break;
case XCVR_SE0_SE0:
// this works with XCVR_SE0_SE0 if AP_GPIO_AP_C16 not configured
//isp1301_configure(dat_se0_bidirectional, spd_susp_reg); // XCVR_SEO_SE0
// XXX configure mc13783 transceiver here
break;
}
//isp1301_configure(vp_vm_bidirectional, spd_susp_reg); // XCVR_D_D
TRACE_MSG0(TCD, "5. SET TCD OPS");
THROW_UNLESS(mxc91231_tcd_instance = otg_set_tcd_ops(&tcd_ops), error);
mxc_iomux_gpio_mc13783_set (hwmode);
#if 0
/*
*
* Default
* USB_TXEO_B OE (9 OE)
* USB_DAT_VP DAT_VP (14 DAT/VP)
* USB_SE0_VM SE0_VM (13 SE0/VM)
*
* USB_RXD RCV (12 RCV)
*
* USB_VP VP (11 VP)
* USB_VM VM (10 VM)
*
* AR_USB_VP GP_AP_C16 MUX3 - USB_VP1 AP_GPIO_AP_C16
* AR_USB_VM GP_AP_C17 MUX3 - USB_VM1 AP_GPIO_AP_C17
*/
TRACE_MSG0(OCD, "6. Setup USBOTG IOMUX");
#if defined(CONFIG_ARCH_MXC91231)
printk(KERN_INFO"IOMUX setting for MXC91231\n");
iomux_config_mux(SP_USB_TXOE_B, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_DAT_VP, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_SE0_VM, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
iomux_config_mux(SP_USB_RXD, OUTPUTCONFIG_FUNC1, INPUTCONFIG_FUNC1);
#endif
#if defined(CONFIG_MACH_I30030EVB) || defined(CONFIG_ARCH_I30030EVB)
printk(KERN_INFO"IOMUX setting for I30030EVB\n");
iomux_config_mux(PIN_USB_XRXD, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPOUT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VPIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_TXENB, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
iomux_config_mux(PIN_USB_VMIN, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
#endif /* CONFIG_ARCH_I30030EVB */
#endif
switch(hwmode) {
case XCVR_D_SE0_NEW:
TRACE_MSG0(TCD, "D_D - vp_vm_bidirectional");
printk(KERN_INFO"%s: D_D - Differential Unidirectional\n", __FUNCTION__);
// #if defined(CONFIG_ARCH_MXC91231)
// iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_FUNC3, INPUTCONFIG_FUNC3);
// #endif
mc13783_convity_set_single_ended_mode(FALSE);
mc13783_convity_set_directional_mode(FALSE);
break;
case XCVR_SE0_D_NEW:
TRACE_MSG0(TCD, "SE0_D");
printk(KERN_INFO"%s: SE0_D - Single Ended Unidirectional\n", __FUNCTION__);
mc13783_convity_set_single_ended_mode(TRUE);
mc13783_convity_set_directional_mode(FALSE);
break;
case XCVR_D_D:
TRACE_MSG0(TCD, "D_SE0");
printk(KERN_INFO"%s: D_SE0 - Differential Bidirectional\n", __FUNCTION__);
mc13783_convity_set_single_ended_mode(FALSE);
mc13783_convity_set_directional_mode(TRUE);
break;
case XCVR_SE0_SE0:
TRACE_MSG0(TCD, "SE0_SE0 - SEO_bidirectional");
printk(KERN_INFO"%s: SE0_SE0 - Single Ended Bidirectional\n", __FUNCTION__);
mc13783_convity_set_single_ended_mode(TRUE);
mc13783_convity_set_directional_mode(TRUE);
break;
}
TRACE_MSG0(TCD, "7. SET HWMODE");
mxc_set_transceiver_mode(newmode);
mc13783_convity_set_var_disconnect (TRUE); // variable 1k5 and UDP/UDM pull-down are disconnected. (PULLOVER)
mc13783_convity_set_usb_transceiver (TRUE); //USB transceiver is disabled (USBXCVREN)
mc13783_convity_set_udp_auto_connect (FALSE); //variable UDP is not automatically connected (SE0CONN)
mc13783_convity_set_pull_down_switch (PD_UDP_150, FALSE); //150K UDP pull-up switch is out (DP150KPU)
mc13783_convity_set_udp_pull(FALSE); //1.5K UDP pull-up and USB xcver is controlled by SPI bits.(USBCNTRL)
mc13783_convity_set_output (TRUE, FALSE); //disable vbus
mc13783_convity_set_output (FALSE, FALSE); //disable vusb
mc13783_convity_set_output (FALSE, TRUE); //enable vusb
#if 1
for (i=48; i<51; i++){
mc13783_read_reg (PRIO_CONN, i, ®_value);
printk (KERN_INFO"Register %d = %8X\n", i, reg_value);
}
#endif
#if 0 //test for interrupt on changing DP
iomux_config_mux(AP_GPIO_AP_C16,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_NONE);
iomux_config_mux(AP_GPIO_AP_C17,OUTPUTCONFIG_DEFAULT, INPUTCONFIG_NONE);
gpio_config(2, 16, false, GPIO_INT_RISE_EDGE);
gpio = gpio_request_irq(2, 16, GPIO_HIGH_PRIO, gpio_c16_int_hndlr,
SA_SHIRQ, "VP1", NULL);
THROW_IF(gpio, error);
gpio_config_int_en(2, 16, TRUE); // XXX this might not be needed
gpio_config(2, 17, false, GPIO_INT_RISE_EDGE);
gpio = gpio_request_irq(2, 17, GPIO_HIGH_PRIO, gpio_c17_int_hndlr,
SA_SHIRQ, "VP1", NULL);
THROW_IF(gpio, error);
gpio_config_int_en(2, 17, TRUE); // XXX this might not be needed
while (1){
udelay(1000);
}
#endif
#if 0
while(1){
// mc13783_convity_set_var_disconnect (FALSE);
// mc13783_convity_set_udp_pull (FALSE);
// mc13783_convity_set_udp_auto_connect (TRUE);
// mc13783_convity_set_speed_mode (TRUE);
// mc13783_convity_set_pull_down_switch(PD_PU, FALSE);
}
#endif
#if 0 //beautiful pulse between zero and 3.3 on DP
mc13783_convity_set_speed_mode (FALSE); //set high speed
while(1){
mc13783_convity_set_pull_down_switch(PD_PU, TRUE); //variable 1.5K pull-up switch in
mc13783_convity_set_pull_down_switch(PD_UPD_15, FALSE); //DP pull down switch is off
udelay(1000);
mc13783_convity_set_pull_down_switch(PD_PU, FALSE); //variable 1.5K pull-up switch off
mc13783_convity_set_pull_down_switch(PD_UPD_15, TRUE); //DP pull down switch is on
udelay(1000);
}
#endif
#if 0 //beautiful pulse between zero and 3.3 on DM
mc13783_convity_set_speed_mode (TRUE); //set low speed
while(1){
mc13783_convity_set_pull_down_switch(PD_PU, TRUE); //variable 1.5K pull-up switch in
mc13783_convity_set_pull_down_switch(PD_UDM_15, FALSE); //DP pull down switch is off
udelay(1000);
mc13783_convity_set_pull_down_switch(PD_PU, FALSE); //variable 1.5K pull-up switch off
mc13783_convity_set_pull_down_switch(PD_UDM_15, TRUE); //DP pull down switch is on
udelay(1000);
}
#endif
#if 0 //checking VBUS
mc13783_convity_set_output (TRUE, TRUE); //enable VBUS
udelay(1000);
// mc13783_convity_set_output (TRUE, FALSE); //disable VBUS
while(1){
udelay(1000);
}
#endif
#if 0
while (1){
mc13783_convity_set_vbus (FALSE); //pull-down NMOS switch is on
}
#endif
#if 0
mc13783_convity_set_vusb_voltage (TRUE); //set the VUSB voltage to 3.3
mc13783_convity_set_output (FALSE, TRUE); //enable VUSB
#endif
/* Success! */
TRACE_MSG0(TCD, "8. Success!");
CATCH(error) {
printk(KERN_INFO"%s: failed\n", __FUNCTION__);
UNLESS (i2c) i2c_close();
//SHP
//UNLESS (gpio) gpio_free_irq (3, GPIO_PIN, GPIO_HIGH_PRIO);
return -EINVAL;
}
TRACE_MSG0(TCD, "MX2_MOD_TCD_INIT FINISHED");
return 0;
}
