void
linux32_setregs(struct lwp *l, struct exec_package *pack, u_long stack)
{
struct pcb *pcb = lwp_getpcb(l);
struct trapframe *tf;
struct proc *p = l->l_proc;
/* If we were using the FPU, forget about it. */
if (pcb->pcb_fpcpu != NULL)
fpusave_lwp(l, 0);
#if defined(USER_LDT) && 0
pmap_ldt_cleanup(p);
#endif
netbsd32_adjust_limits(p);
l->l_md.md_flags &= ~MDL_USEDFPU;
l->l_md.md_flags |= MDL_COMPAT32; /* Forces iret not sysret */
pcb->pcb_flags = PCB_COMPAT32;
pcb->pcb_savefpu.fp_fxsave.fx_fcw = __Linux_NPXCW__;
pcb->pcb_savefpu.fp_fxsave.fx_mxcsr = __INITIAL_MXCSR__;
pcb->pcb_savefpu.fp_fxsave.fx_mxcsr_mask = __INITIAL_MXCSR_MASK__;
p->p_flag |= PK_32;
tf = l->l_md.md_regs;
tf->tf_rax = 0;
tf->tf_rbx = (u_int32_t)p->p_psstrp;
tf->tf_rcx = pack->ep_entry & 0xffffffff;
tf->tf_rdx = 0;
tf->tf_rsi = 0;
tf->tf_rdi = 0;
tf->tf_rbp = 0;
tf->tf_rsp = stack & 0xffffffff;
tf->tf_r8 = 0;
tf->tf_r9 = 0;
tf->tf_r10 = 0;
tf->tf_r11 = 0;
tf->tf_r12 = 0;
tf->tf_r13 = 0;
tf->tf_r14 = 0;
tf->tf_r15 = 0;
tf->tf_rip = pack->ep_entry & 0xffffffff;
tf->tf_rflags = PSL_USERSET;
tf->tf_cs = GSEL(GUCODE32_SEL, SEL_UPL);
tf->tf_ss = GSEL(GUDATA32_SEL, SEL_UPL);
tf->tf_ds = GSEL(GUDATA32_SEL, SEL_UPL);
tf->tf_es = GSEL(GUDATA32_SEL, SEL_UPL);
cpu_fsgs_zero(l);
cpu_fsgs_reload(l, GSEL(GUDATA32_SEL, SEL_UPL), GSEL(GUDATA32_SEL, SEL_UPL));
}
/* ARGSUSED */
void
netbsd32_setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
{
struct proc *p = l->l_proc;
struct trapframe64 *tf = l->l_md.md_tf;
struct fpstate64 *fs;
int64_t tstate;
/* Don't allow misaligned code by default */
p->p_md.md_flags &= ~MDP_FIXALIGN;
/* Mark this as a 32-bit emulation */
p->p_flag |= PK_32;
netbsd32_adjust_limits(p);
/* Setup the ev_out32 hook */
#if NFIRM_EVENTS > 0
if (ev_out32_hook == NULL)
ev_out32_hook = ev_out32;
#endif
/*
* Set the registers to 0 except for:
* %o6: stack pointer, built in exec())
* %tstate: (retain icc and xcc and cwp bits)
* %g1: p->p_psstrp (used by crt0)
* %tpc,%tnpc: entry point of program
*/
tstate = ((PSTATE_USER32)<<TSTATE_PSTATE_SHIFT)
| (tf->tf_tstate & TSTATE_CWP);
if ((fs = l->l_md.md_fpstate) != NULL) {
/*
* We hold an FPU state. If we own *the* FPU chip state
* we must get rid of it, and the only way to do that is
* to save it. In any case, get rid of our FPU state.
*/
fpusave_lwp(l, false);
pool_cache_put(fpstate_cache, fs);
l->l_md.md_fpstate = NULL;
}
memset(tf, 0, sizeof *tf);
tf->tf_tstate = tstate;
tf->tf_global[1] = p->p_psstrp;
tf->tf_pc = pack->ep_entry & ~3;
tf->tf_npc = tf->tf_pc + 4;
stack -= sizeof(struct rwindow32);
tf->tf_out[6] = stack;
tf->tf_out[7] = 0;
}
void
netbsd32_setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
{
struct pcb *pcb;
struct trapframe *tf;
struct proc *p = l->l_proc;
pcb = lwp_getpcb(l);
/* If we were using the FPU, forget about it. */
if (pcb->pcb_fpcpu != NULL) {
fpusave_lwp(l, false);
}
#if defined(USER_LDT) && 0
pmap_ldt_cleanup(p);
#endif
netbsd32_adjust_limits(p);
l->l_md.md_flags &= ~MDL_USEDFPU;
l->l_md.md_flags |= MDL_COMPAT32; /* Force iret not sysret */
pcb->pcb_flags = PCB_COMPAT32;
if (pack->ep_osversion >= 699002600)
pcb->pcb_savefpu.fp_fxsave.fx_fcw = __NetBSD_NPXCW__;
else
pcb->pcb_savefpu.fp_fxsave.fx_fcw = __NetBSD_COMPAT_NPXCW__;
pcb->pcb_savefpu.fp_fxsave.fx_mxcsr = __INITIAL_MXCSR__;
pcb->pcb_savefpu.fp_fxsave.fx_mxcsr_mask = __INITIAL_MXCSR_MASK__;
p->p_flag |= PK_32;
tf = l->l_md.md_regs;
tf->tf_ds = LSEL(LUDATA32_SEL, SEL_UPL);
tf->tf_es = LSEL(LUDATA32_SEL, SEL_UPL);
cpu_fsgs_zero(l);
cpu_fsgs_reload(l, tf->tf_ds, tf->tf_es);
tf->tf_rdi = 0;
tf->tf_rsi = 0;
tf->tf_rbp = 0;
tf->tf_rbx = (uint32_t)p->p_psstrp;
tf->tf_rdx = 0;
tf->tf_rcx = 0;
tf->tf_rax = 0;
tf->tf_rip = pack->ep_entry;
tf->tf_cs = LSEL(LUCODE32_SEL, SEL_UPL);
tf->tf_rflags = PSL_USERSET;
tf->tf_rsp = stack;
tf->tf_ss = LSEL(LUDATA32_SEL, SEL_UPL);
}
void
linux32_setregs(struct lwp *l, struct exec_package *pack, u_long stack)
{
struct pcb *pcb = lwp_getpcb(l);
struct trapframe *tf;
struct proc *p = l->l_proc;
#if defined(USER_LDT) && 0
pmap_ldt_cleanup(l);
#endif
netbsd32_adjust_limits(p);
fpu_save_area_clear(l, __Linux_NPXCW__);
l->l_md.md_flags |= MDL_COMPAT32; /* Forces iret not sysret */
pcb->pcb_flags = PCB_COMPAT32;
p->p_flag |= PK_32;
tf = l->l_md.md_regs;
tf->tf_rax = 0;
tf->tf_rbx = (u_int32_t)p->p_psstrp;
tf->tf_rcx = pack->ep_entry & 0xffffffff;
tf->tf_rdx = 0;
tf->tf_rsi = 0;
tf->tf_rdi = 0;
tf->tf_rbp = 0;
tf->tf_rsp = stack & 0xffffffff;
tf->tf_r8 = 0;
tf->tf_r9 = 0;
tf->tf_r10 = 0;
tf->tf_r11 = 0;
tf->tf_r12 = 0;
tf->tf_r13 = 0;
tf->tf_r14 = 0;
tf->tf_r15 = 0;
tf->tf_rip = pack->ep_entry & 0xffffffff;
tf->tf_rflags = PSL_USERSET;
tf->tf_cs = GSEL(GUCODE32_SEL, SEL_UPL);
tf->tf_ss = GSEL(GUDATA32_SEL, SEL_UPL);
tf->tf_ds = GSEL(GUDATA32_SEL, SEL_UPL);
tf->tf_es = GSEL(GUDATA32_SEL, SEL_UPL);
cpu_fsgs_zero(l);
cpu_fsgs_reload(l, GSEL(GUDATA32_SEL, SEL_UPL), GSEL(GUDATA32_SEL, SEL_UPL));
}
