struct pipe_screen *
nv50_screen_create(struct nouveau_device *dev)
{
struct nv50_screen *screen;
struct pipe_screen *pscreen;
struct nouveau_object *chan;
uint64_t value;
uint32_t tesla_class;
unsigned stack_size, max_warps, tls_space;
int ret;
screen = CALLOC_STRUCT(nv50_screen);
if (!screen)
return NULL;
pscreen = &screen->base.base;
screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
ret = nouveau_screen_init(&screen->base, dev);
if (ret)
FAIL_SCREEN_INIT("nouveau_screen_init failed: %d\n", ret);
screen->base.pushbuf->user_priv = screen;
screen->base.pushbuf->rsvd_kick = 5;
chan = screen->base.channel;
pscreen->destroy = nv50_screen_destroy;
pscreen->context_create = nv50_create;
pscreen->is_format_supported = nv50_screen_is_format_supported;
pscreen->get_param = nv50_screen_get_param;
pscreen->get_shader_param = nv50_screen_get_shader_param;
pscreen->get_paramf = nv50_screen_get_paramf;
nv50_screen_init_resource_functions(pscreen);
nouveau_screen_init_vdec(&screen->base);
ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
NULL, &screen->fence.bo);
if (ret)
goto fail;
nouveau_bo_map(screen->fence.bo, 0, NULL);
screen->fence.map = screen->fence.bo->map;
screen->base.fence.emit = nv50_screen_fence_emit;
screen->base.fence.update = nv50_screen_fence_update;
ret = nouveau_object_new(chan, 0xbeef0301, NOUVEAU_NOTIFIER_CLASS,
&(struct nv04_notify){ .length = 32 },
sizeof(struct nv04_notify), &screen->sync);
struct pipe_screen *
nv30_screen_create(struct nouveau_device *dev)
{
struct nv30_screen *screen = CALLOC_STRUCT(nv30_screen);
struct pipe_screen *pscreen;
struct nouveau_pushbuf *push;
struct nv04_fifo *fifo;
unsigned oclass = 0;
int ret, i;
if (!screen)
return NULL;
switch (dev->chipset & 0xf0) {
case 0x30:
if (RANKINE_0397_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV30_3D_CLASS;
else
if (RANKINE_0697_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV34_3D_CLASS;
else
if (RANKINE_0497_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV35_3D_CLASS;
break;
case 0x40:
if (CURIE_4097_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV40_3D_CLASS;
else
if (CURIE_4497_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV44_3D_CLASS;
break;
case 0x60:
if (CURIE_4497_CHIPSET6X & (1 << (dev->chipset & 0x0f)))
oclass = NV44_3D_CLASS;
break;
default:
break;
}
if (!oclass) {
NOUVEAU_ERR("unknown 3d class for 0x%02x\n", dev->chipset);
FREE(screen);
return NULL;
}
pscreen = &screen->base.base;
pscreen->destroy = nv30_screen_destroy;
pscreen->get_param = nv30_screen_get_param;
pscreen->get_paramf = nv30_screen_get_paramf;
pscreen->get_shader_param = nv30_screen_get_shader_param;
pscreen->context_create = nv30_context_create;
pscreen->is_format_supported = nv30_screen_is_format_supported;
nv30_resource_screen_init(pscreen);
nouveau_screen_init_vdec(&screen->base);
screen->base.fence.emit = nv30_screen_fence_emit;
screen->base.fence.update = nv30_screen_fence_update;
ret = nouveau_screen_init(&screen->base, dev);
if (ret)
FAIL_SCREEN_INIT("nv30_screen_init failed: %d\n", ret);
screen->base.vidmem_bindings |= PIPE_BIND_VERTEX_BUFFER;
screen->base.sysmem_bindings |= PIPE_BIND_VERTEX_BUFFER;
if (oclass == NV40_3D_CLASS) {
screen->base.vidmem_bindings |= PIPE_BIND_INDEX_BUFFER;
screen->base.sysmem_bindings |= PIPE_BIND_INDEX_BUFFER;
}
fifo = screen->base.channel->data;
push = screen->base.pushbuf;
push->rsvd_kick = 16;
ret = nouveau_object_new(screen->base.channel, 0x00000000, NV01_NULL_CLASS,
NULL, 0, &screen->null);
if (ret)
FAIL_SCREEN_INIT("error allocating null object: %d\n", ret);
/* DMA_FENCE refuses to accept DMA objects with "adjust" filled in,
* this means that the address pointed at by the DMA object must
* be 4KiB aligned, which means this object needs to be the first
* one allocated on the channel.
*/
ret = nouveau_object_new(screen->base.channel, 0xbeef1e00,
NOUVEAU_NOTIFIER_CLASS, &(struct nv04_notify) {
.length = 32 }, sizeof(struct nv04_notify),
struct pipe_screen *
nv50_screen_create(struct nouveau_device *dev)
{
struct nv50_screen *screen;
struct pipe_screen *pscreen;
struct nouveau_object *chan;
uint64_t value;
uint32_t tesla_class;
unsigned stack_size;
int ret;
screen = CALLOC_STRUCT(nv50_screen);
if (!screen)
return NULL;
pscreen = &screen->base.base;
ret = nouveau_screen_init(&screen->base, dev);
if (ret) {
NOUVEAU_ERR("nouveau_screen_init failed: %d\n", ret);
goto fail;
}
/* TODO: Prevent FIFO prefetch before transfer of index buffers and
* admit them to VRAM.
*/
screen->base.vidmem_bindings |= PIPE_BIND_CONSTANT_BUFFER |
PIPE_BIND_VERTEX_BUFFER;
screen->base.sysmem_bindings |=
PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER;
screen->base.pushbuf->user_priv = screen;
screen->base.pushbuf->rsvd_kick = 5;
chan = screen->base.channel;
pscreen->destroy = nv50_screen_destroy;
pscreen->context_create = nv50_create;
pscreen->is_format_supported = nv50_screen_is_format_supported;
pscreen->get_param = nv50_screen_get_param;
pscreen->get_shader_param = nv50_screen_get_shader_param;
pscreen->get_paramf = nv50_screen_get_paramf;
nv50_screen_init_resource_functions(pscreen);
if (screen->base.device->chipset < 0x84 ||
debug_get_bool_option("NOUVEAU_PMPEG", FALSE)) {
/* PMPEG */
nouveau_screen_init_vdec(&screen->base);
} else if (screen->base.device->chipset < 0x98 ||
screen->base.device->chipset == 0xa0) {
/* VP2 */
screen->base.base.get_video_param = nv84_screen_get_video_param;
screen->base.base.is_video_format_supported = nv84_screen_video_supported;
} else {
/* VP3/4 */
screen->base.base.get_video_param = nouveau_vp3_screen_get_video_param;
screen->base.base.is_video_format_supported = nouveau_vp3_screen_video_supported;
}
ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096,
NULL, &screen->fence.bo);
if (ret) {
NOUVEAU_ERR("Failed to allocate fence bo: %d\n", ret);
goto fail;
}
nouveau_bo_map(screen->fence.bo, 0, NULL);
screen->fence.map = screen->fence.bo->map;
screen->base.fence.emit = nv50_screen_fence_emit;
screen->base.fence.update = nv50_screen_fence_update;
ret = nouveau_object_new(chan, 0xbeef0301, NOUVEAU_NOTIFIER_CLASS,
&(struct nv04_notify){ .length = 32 },
sizeof(struct nv04_notify), &screen->sync);
struct pipe_screen *
nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
{
static const unsigned query_sizes[] = {(4096 - 4 * 32) / 32, 3 * 1024 / 32, 2 * 1024 / 32, 1024 / 32};
struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen);
struct nouveau_channel *chan;
struct pipe_screen *pscreen;
unsigned eng3d_class = 0;
int ret, i;
if (!screen)
return NULL;
pscreen = &screen->base.base;
ret = nouveau_screen_init(&screen->base, dev);
if (ret) {
nvfx_screen_destroy(pscreen);
return NULL;
}
chan = screen->base.channel;
screen->cur_ctx = NULL;
chan->user_private = screen;
chan->flush_notify = nvfx_channel_flush_notify;
pscreen->winsys = ws;
pscreen->destroy = nvfx_screen_destroy;
pscreen->get_param = nvfx_screen_get_param;
pscreen->get_shader_param = nvfx_screen_get_shader_param;
pscreen->get_paramf = nvfx_screen_get_paramf;
pscreen->is_format_supported = nvfx_screen_is_format_supported;
pscreen->context_create = nvfx_create;
switch (dev->chipset & 0xf0) {
case 0x30:
if (NV30_3D_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
eng3d_class = NV30_3D;
else if (NV34_3D_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
eng3d_class = NV34_3D;
else if (NV35_3D_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
eng3d_class = NV35_3D;
break;
case 0x40:
if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f)))
eng3d_class = NV40_3D;
else if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
eng3d_class = NV44_3D;
screen->is_nv4x = ~0;
break;
case 0x60:
if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
eng3d_class = NV44_3D;
screen->is_nv4x = ~0;
break;
}
if (!eng3d_class) {
NOUVEAU_ERR("Unknown nv3x/nv4x chipset: nv%02x\n", dev->chipset);
return NULL;
}
screen->advertise_npot = !!screen->is_nv4x;
screen->advertise_blend_equation_separate = !!screen->is_nv4x;
screen->use_nv4x = screen->is_nv4x;
if(screen->is_nv4x) {
if(debug_get_bool_option("NVFX_SIMULATE_NV30", FALSE))
screen->use_nv4x = 0;
if(!debug_get_bool_option("NVFX_NPOT", TRUE))
screen->advertise_npot = 0;
if(!debug_get_bool_option("NVFX_BLEND_EQ_SEP", TRUE))
screen->advertise_blend_equation_separate = 0;
}
screen->force_swtnl = debug_get_bool_option("NVFX_SWTNL", FALSE);
screen->trace_draw = debug_get_bool_option("NVFX_TRACE_DRAW", FALSE);
screen->buffer_allocation_cost = debug_get_num_option("NVFX_BUFFER_ALLOCATION_COST", 16384);
screen->inline_cost_per_hardware_cost = atof(debug_get_option("NVFX_INLINE_COST_PER_HARDWARE_COST", "1.0"));
screen->static_reuse_threshold = atof(debug_get_option("NVFX_STATIC_REUSE_THRESHOLD", "2.0"));
/* We don't advertise these by default because filtering and blending doesn't work as
* it should, due to several restrictions.
* The only exception is fp16 on nv40.
*/
screen->advertise_fp16 = debug_get_bool_option("NVFX_FP16", !!screen->use_nv4x);
screen->advertise_fp32 = debug_get_bool_option("NVFX_FP32", 0);
screen->vertex_buffer_reloc_flags = nvfx_screen_get_vertex_buffer_flags(screen);
/* surely both nv3x and nv44 support index buffers too: find out how and test that */
if(eng3d_class == NV40_3D)
screen->index_buffer_reloc_flags = screen->vertex_buffer_reloc_flags;
if(!screen->force_swtnl && screen->vertex_buffer_reloc_flags == screen->index_buffer_reloc_flags)
screen->base.vertex_buffer_flags = screen->base.index_buffer_flags = screen->vertex_buffer_reloc_flags;
nvfx_screen_init_resource_functions(pscreen);
ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return FALSE;
}
/* 2D engine setup */
nvfx_screen_surface_init(pscreen);
/* Notifier for sync purposes */
ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
nvfx_screen_destroy(pscreen);
return NULL;
}
/* Query objects */
for(i = 0; i < sizeof(query_sizes) / sizeof(query_sizes[0]); ++i)
{
ret = nouveau_notifier_alloc(chan, 0xbeef0302, query_sizes[i], &screen->query);
if(!ret)
break;
}
if (ret) {
NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
nvfx_screen_destroy(pscreen);
return NULL;
}
ret = nouveau_resource_init(&screen->query_heap, 0, query_sizes[i]);
if (ret) {
NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
nvfx_screen_destroy(pscreen);
return NULL;
}
LIST_INITHEAD(&screen->query_list);
/* Vtxprog resources */
if (nouveau_resource_init(&screen->vp_exec_heap, 0, screen->use_nv4x ? 512 : 256) ||
nouveau_resource_init(&screen->vp_data_heap, 0, screen->use_nv4x ? 468 : 256)) {
nvfx_screen_destroy(pscreen);
return NULL;
}
BIND_RING(chan, screen->eng3d, 7);
/* Static eng3d initialisation */
/* note that we just started using the channel, so we must have space in the pushbuffer */
OUT_RING(chan, RING_3D(NV30_3D_DMA_NOTIFY, 1));
OUT_RING(chan, screen->sync->handle);
OUT_RING(chan, RING_3D(NV30_3D_DMA_TEXTURE0, 2));
OUT_RING(chan, chan->vram->handle);
OUT_RING(chan, chan->gart->handle);
OUT_RING(chan, RING_3D(NV30_3D_DMA_COLOR1, 1));
OUT_RING(chan, chan->vram->handle);
OUT_RING(chan, RING_3D(NV30_3D_DMA_COLOR0, 2));
OUT_RING(chan, chan->vram->handle);
OUT_RING(chan, chan->vram->handle);
OUT_RING(chan, RING_3D(NV30_3D_DMA_VTXBUF0, 2));
OUT_RING(chan, chan->vram->handle);
OUT_RING(chan, chan->gart->handle);
OUT_RING(chan, RING_3D(NV30_3D_DMA_FENCE, 2));
OUT_RING(chan, 0);
OUT_RING(chan, screen->query->handle);
OUT_RING(chan, RING_3D(NV30_3D_DMA_UNK1AC, 2));
OUT_RING(chan, chan->vram->handle);
OUT_RING(chan, chan->vram->handle);
if(!screen->is_nv4x)
nv30_screen_init(screen);
else
nv40_screen_init(screen);
return pscreen;
}
struct pipe_screen *
nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
{
struct nv30_screen *screen = CALLOC_STRUCT(nv30_screen);
struct nouveau_channel *chan;
struct pipe_screen *pscreen;
struct nouveau_stateobj *so;
unsigned rankine_class = 0;
int ret, i;
if (!screen)
return NULL;
pscreen = &screen->base.base;
ret = nouveau_screen_init(&screen->base, dev);
if (ret) {
nv30_screen_destroy(pscreen);
return NULL;
}
chan = screen->base.channel;
pscreen->winsys = ws;
pscreen->destroy = nv30_screen_destroy;
pscreen->get_param = nv30_screen_get_param;
pscreen->get_paramf = nv30_screen_get_paramf;
pscreen->is_format_supported = nv30_screen_surface_format_supported;
pscreen->context_create = nv30_create;
nv30_screen_init_miptree_functions(pscreen);
nv30_screen_init_transfer_functions(pscreen);
/* 3D object */
switch (dev->chipset & 0xf0) {
case 0x30:
if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
rankine_class = 0x0397;
else
if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
rankine_class = 0x0697;
else
if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f)))
rankine_class = 0x0497;
break;
default:
break;
}
if (!rankine_class) {
NOUVEAU_ERR("Unknown nv3x chipset: nv%02x\n", dev->chipset);
return NULL;
}
ret = nouveau_grobj_alloc(chan, 0xbeef3097, rankine_class,
&screen->rankine);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
return FALSE;
}
/* 2D engine setup */
screen->eng2d = nv04_surface_2d_init(&screen->base);
screen->eng2d->buf = nv30_surface_buffer;
/* Notifier for sync purposes */
ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
nv30_screen_destroy(pscreen);
return NULL;
}
/* Query objects */
ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query);
if (ret) {
NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
nv30_screen_destroy(pscreen);
return NULL;
}
ret = nouveau_resource_init(&screen->query_heap, 0, 32);
if (ret) {
NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
nv30_screen_destroy(pscreen);
return NULL;
}
/* Vtxprog resources */
if (nouveau_resource_init(&screen->vp_exec_heap, 0, 256) ||
nouveau_resource_init(&screen->vp_data_heap, 0, 256)) {
nv30_screen_destroy(pscreen);
return NULL;
}
/* Static rankine initialisation */
so = so_new(36, 60, 0);
so_method(so, screen->rankine, NV34TCL_DMA_NOTIFY, 1);
so_data (so, screen->sync->handle);
so_method(so, screen->rankine, NV34TCL_DMA_TEXTURE0, 2);
so_data (so, chan->vram->handle);
so_data (so, chan->gart->handle);
so_method(so, screen->rankine, NV34TCL_DMA_COLOR1, 1);
so_data (so, chan->vram->handle);
so_method(so, screen->rankine, NV34TCL_DMA_COLOR0, 2);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_method(so, screen->rankine, NV34TCL_DMA_VTXBUF0, 2);
so_data (so, chan->vram->handle);
so_data (so, chan->gart->handle);
/* so_method(so, screen->rankine, NV34TCL_DMA_FENCE, 2);
so_data (so, 0);
so_data (so, screen->query->handle);*/
so_method(so, screen->rankine, NV34TCL_DMA_IN_MEMORY7, 1);
so_data (so, chan->vram->handle);
so_method(so, screen->rankine, NV34TCL_DMA_IN_MEMORY8, 1);
so_data (so, chan->vram->handle);
for (i=1; i<8; i++) {
so_method(so, screen->rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1);
so_data (so, 0);
so_method(so, screen->rankine, NV34TCL_VIEWPORT_CLIP_VERT(i), 1);
so_data (so, 0);
}
so_method(so, screen->rankine, 0x220, 1);
so_data (so, 1);
so_method(so, screen->rankine, 0x03b0, 1);
so_data (so, 0x00100000);
so_method(so, screen->rankine, 0x1454, 1);
so_data (so, 0);
so_method(so, screen->rankine, 0x1d80, 1);
so_data (so, 3);
so_method(so, screen->rankine, 0x1450, 1);
so_data (so, 0x00030004);
/* NEW */
so_method(so, screen->rankine, 0x1e98, 1);
so_data (so, 0);
so_method(so, screen->rankine, 0x17e0, 3);
so_data (so, fui(0.0));
so_data (so, fui(0.0));
so_data (so, fui(1.0));
so_method(so, screen->rankine, 0x1f80, 16);
for (i=0; i<16; i++) {
so_data (so, (i==8) ? 0x0000ffff : 0);
}
so_method(so, screen->rankine, 0x120, 3);
so_data (so, 0);
so_data (so, 1);
so_data (so, 2);
so_method(so, screen->rankine, 0x1d88, 1);
so_data (so, 0x00001200);
so_method(so, screen->rankine, NV34TCL_RC_ENABLE, 1);
so_data (so, 0);
so_method(so, screen->rankine, NV34TCL_DEPTH_RANGE_NEAR, 2);
so_data (so, fui(0.0));
so_data (so, fui(1.0));
so_method(so, screen->rankine, NV34TCL_MULTISAMPLE_CONTROL, 1);
so_data (so, 0xffff0000);
/* enables use of vp rather than fixed-function somehow */
so_method(so, screen->rankine, 0x1e94, 1);
so_data (so, 0x13);
so_emit(chan, so);
so_ref(NULL, &so);
nouveau_pushbuf_flush(chan, 0);
return pscreen;
}
struct pipe_screen *
nv30_screen_create(struct nouveau_device *dev)
{
struct nv30_screen *screen = CALLOC_STRUCT(nv30_screen);
struct pipe_screen *pscreen;
struct nouveau_pushbuf *push;
struct nv04_fifo *fifo;
unsigned oclass = 0;
int ret, i;
if (!screen)
return NULL;
switch (dev->chipset & 0xf0) {
case 0x30:
if (RANKINE_0397_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV30_3D_CLASS;
else
if (RANKINE_0697_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV34_3D_CLASS;
else
if (RANKINE_0497_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV35_3D_CLASS;
break;
case 0x40:
if (CURIE_4097_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV40_3D_CLASS;
else
if (CURIE_4497_CHIPSET & (1 << (dev->chipset & 0x0f)))
oclass = NV44_3D_CLASS;
break;
case 0x60:
if (CURIE_4497_CHIPSET6X & (1 << (dev->chipset & 0x0f)))
oclass = NV44_3D_CLASS;
break;
default:
break;
}
if (!oclass) {
NOUVEAU_ERR("unknown 3d class for 0x%02x\n", dev->chipset);
FREE(screen);
return NULL;
}
/*
* Some modern apps try to use msaa without keeping in mind the
* restrictions on videomem of older cards. Resulting in dmesg saying:
* [ 1197.850642] nouveau E[soffice.bin[3785]] fail ttm_validate
* [ 1197.850648] nouveau E[soffice.bin[3785]] validating bo list
* [ 1197.850654] nouveau E[soffice.bin[3785]] validate: -12
*
* Because we are running out of video memory, after which the program
* using the msaa visual freezes, and eventually the entire system freezes.
*
* To work around this we do not allow msaa visauls by default and allow
* the user to override this via NV30_MAX_MSAA.
*/
screen->max_sample_count = debug_get_num_option("NV30_MAX_MSAA", 0);
if (screen->max_sample_count > 4)
screen->max_sample_count = 4;
pscreen = &screen->base.base;
pscreen->destroy = nv30_screen_destroy;
pscreen->get_param = nv30_screen_get_param;
pscreen->get_paramf = nv30_screen_get_paramf;
pscreen->get_shader_param = nv30_screen_get_shader_param;
pscreen->context_create = nv30_context_create;
pscreen->is_format_supported = nv30_screen_is_format_supported;
nv30_resource_screen_init(pscreen);
nouveau_screen_init_vdec(&screen->base);
screen->base.fence.emit = nv30_screen_fence_emit;
screen->base.fence.update = nv30_screen_fence_update;
ret = nouveau_screen_init(&screen->base, dev);
if (ret)
FAIL_SCREEN_INIT("nv30_screen_init failed: %d\n", ret);
screen->base.vidmem_bindings |= PIPE_BIND_VERTEX_BUFFER;
screen->base.sysmem_bindings |= PIPE_BIND_VERTEX_BUFFER;
if (oclass == NV40_3D_CLASS) {
screen->base.vidmem_bindings |= PIPE_BIND_INDEX_BUFFER;
screen->base.sysmem_bindings |= PIPE_BIND_INDEX_BUFFER;
}
fifo = screen->base.channel->data;
push = screen->base.pushbuf;
push->rsvd_kick = 16;
ret = nouveau_object_new(screen->base.channel, 0x00000000, NV01_NULL_CLASS,
NULL, 0, &screen->null);
if (ret)
FAIL_SCREEN_INIT("error allocating null object: %d\n", ret);
/* DMA_FENCE refuses to accept DMA objects with "adjust" filled in,
* this means that the address pointed at by the DMA object must
* be 4KiB aligned, which means this object needs to be the first
* one allocated on the channel.
*/
ret = nouveau_object_new(screen->base.channel, 0xbeef1e00,
NOUVEAU_NOTIFIER_CLASS, &(struct nv04_notify) {
.length = 32 }, sizeof(struct nv04_notify),
struct pipe_screen *
nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
{
struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
struct nouveau_channel *chan;
struct pipe_screen *pscreen;
struct nouveau_stateobj *so;
unsigned chipset = dev->chipset;
unsigned tesla_class = 0;
int ret, i;
if (!screen)
return NULL;
pscreen = &screen->base.base;
ret = nouveau_screen_init(&screen->base, dev);
if (ret) {
nv50_screen_destroy(pscreen);
return NULL;
}
chan = screen->base.channel;
pscreen->winsys = ws;
pscreen->destroy = nv50_screen_destroy;
pscreen->get_param = nv50_screen_get_param;
pscreen->get_paramf = nv50_screen_get_paramf;
pscreen->is_format_supported = nv50_screen_is_format_supported;
pscreen->context_create = nv50_create;
screen->base.pre_pipebuffer_map_callback = nv50_pre_pipebuffer_map;
nv50_screen_init_miptree_functions(pscreen);
nv50_transfer_init_screen_functions(pscreen);
/* DMA engine object */
ret = nouveau_grobj_alloc(chan, 0xbeef5039,
NV50_MEMORY_TO_MEMORY_FORMAT, &screen->m2mf);
if (ret) {
NOUVEAU_ERR("Error creating M2MF object: %d\n", ret);
nv50_screen_destroy(pscreen);
return NULL;
}
/* 2D object */
ret = nouveau_grobj_alloc(chan, 0xbeef502d, NV50_2D, &screen->eng2d);
if (ret) {
NOUVEAU_ERR("Error creating 2D object: %d\n", ret);
nv50_screen_destroy(pscreen);
return NULL;
}
/* 3D object */
switch (chipset & 0xf0) {
case 0x50:
tesla_class = NV50TCL;
break;
case 0x80:
case 0x90:
tesla_class = NV84TCL;
break;
case 0xa0:
switch (chipset) {
case 0xa0:
case 0xaa:
case 0xac:
tesla_class = NVA0TCL;
break;
default:
tesla_class = NVA8TCL;
break;
}
break;
default:
NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset);
nv50_screen_destroy(pscreen);
return NULL;
}
ret = nouveau_grobj_alloc(chan, 0xbeef5097, tesla_class,
&screen->tesla);
if (ret) {
NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
nv50_screen_destroy(pscreen);
return NULL;
}
/* Sync notifier */
ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
if (ret) {
NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
nv50_screen_destroy(pscreen);
return NULL;
}
/* Static M2MF init */
so = so_new(1, 3, 0);
so_method(so, screen->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
so_data (so, screen->sync->handle);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_emit(chan, so);
so_ref (NULL, &so);
/* Static 2D init */
so = so_new(4, 7, 0);
so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4);
so_data (so, screen->sync->handle);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_data (so, chan->vram->handle);
so_method(so, screen->eng2d, NV50_2D_OPERATION, 1);
so_data (so, NV50_2D_OPERATION_SRCCOPY);
so_method(so, screen->eng2d, NV50_2D_CLIP_ENABLE, 1);
so_data (so, 0);
so_method(so, screen->eng2d, 0x0888, 1);
so_data (so, 1);
so_emit(chan, so);
so_ref(NULL, &so);
/* Static tesla init */
so = so_new(47, 95, 24);
so_method(so, screen->tesla, NV50TCL_COND_MODE, 1);
so_data (so, NV50TCL_COND_MODE_ALWAYS);
so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
so_data (so, screen->sync->handle);
so_method(so, screen->tesla, NV50TCL_DMA_ZETA, 11);
for (i = 0; i < 11; i++)
so_data(so, chan->vram->handle);
so_method(so, screen->tesla, NV50TCL_DMA_COLOR(0),
NV50TCL_DMA_COLOR__SIZE);
for (i = 0; i < NV50TCL_DMA_COLOR__SIZE; i++)
so_data(so, chan->vram->handle);
so_method(so, screen->tesla, NV50TCL_RT_CONTROL, 1);
so_data (so, 1);
/* activate all 32 lanes (threads) in a warp */
so_method(so, screen->tesla, NV50TCL_WARP_HALVES, 1);
so_data (so, 0x2);
so_method(so, screen->tesla, 0x1400, 1);
so_data (so, 0xf);
/* max TIC (bits 4:8) & TSC (ignored) bindings, per program type */
for (i = 0; i < 3; ++i) {
so_method(so, screen->tesla, NV50TCL_TEX_LIMITS(i), 1);
so_data (so, 0x54);
}
/* origin is top left (set to 1 for bottom left) */
so_method(so, screen->tesla, NV50TCL_Y_ORIGIN_BOTTOM, 1);
so_data (so, 0);
so_method(so, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
so_data (so, 8);
/* constant buffers for immediates and VP/FP parameters */
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (32 * 4) * 4,
&screen->constbuf_misc[0]);
if (ret) {
nv50_screen_destroy(pscreen);
return NULL;
}
for (i = 0; i < 3; i++) {
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (256 * 4) * 4,
&screen->constbuf_parm[i]);
if (ret) {
nv50_screen_destroy(pscreen);
return NULL;
}
}
if (nouveau_resource_init(&screen->immd_heap[0], 0, 128) ||
nouveau_resource_init(&screen->parm_heap[0], 0, 512) ||
nouveau_resource_init(&screen->parm_heap[1], 0, 512))
{
NOUVEAU_ERR("Error initialising constant buffers.\n");
nv50_screen_destroy(pscreen);
return NULL;
}
/*
// map constant buffers:
// B = buffer ID (maybe more than 1 byte)
// N = CB index used in shader instruction
// P = program type (0 = VP, 2 = GP, 3 = FP)
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x000BBNP1);
*/
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PMISC << 16) | 0x00000200);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000001 | (NV50_CB_PMISC << 12));
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000021 | (NV50_CB_PMISC << 12));
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000031 | (NV50_CB_PMISC << 12));
/* bind auxiliary constbuf to immediate data bo */
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_misc[0], (128 * 4) * 4,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_misc[0], (128 * 4) * 4,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_AUX << 16) | 0x00000200);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000201 | (NV50_CB_AUX << 12));
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000221 | (NV50_CB_AUX << 12));
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_VERTEX], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_VERTEX], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PVP << 16) | 0x00000800);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000101 | (NV50_CB_PVP << 12));
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_GEOMETRY], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_GEOMETRY], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PGP << 16) | 0x00000800);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000121 | (NV50_CB_PGP << 12));
so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_FRAGMENT], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->constbuf_parm[PIPE_SHADER_FRAGMENT], 0,
NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PFP << 16) | 0x00000800);
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000131 | (NV50_CB_PFP << 12));
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, PIPE_SHADER_TYPES*32*32,
&screen->tic);
if (ret) {
nv50_screen_destroy(pscreen);
return NULL;
}
so_method(so, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3);
so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, PIPE_SHADER_TYPES * 32 - 1);
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, PIPE_SHADER_TYPES*32*32,
&screen->tsc);
if (ret) {
nv50_screen_destroy(pscreen);
return NULL;
}
so_method(so, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3);
so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, 0x00000000); /* ignored if TSC_LINKED (0x1234) = 1 */
/* Vertex array limits - max them out */
for (i = 0; i < 16; i++) {
so_method(so, screen->tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2);
so_data (so, 0x000000ff);
so_data (so, 0xffffffff);
}
so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR(0), 2);
so_data (so, fui(0.0));
so_data (so, fui(1.0));
/* no dynamic combination of TIC & TSC entries => only BIND_TIC used */
so_method(so, screen->tesla, NV50TCL_LINKED_TSC, 1);
so_data (so, 1);
/* activate first scissor rectangle */
so_method(so, screen->tesla, NV50TCL_SCISSOR_ENABLE(0), 1);
so_data (so, 1);
so_method(so, screen->tesla, NV50TCL_EDGEFLAG_ENABLE, 1);
so_data (so, 1); /* default edgeflag to TRUE */
so_emit(chan, so);
so_ref (so, &screen->static_init);
so_ref (NULL, &so);
nouveau_pushbuf_flush(chan, 0);
return pscreen;
}
