/* load the config from flash to the pass conf structure */ void mc1322x_config_restore(mc1322xConfig *c) { nvmErr_t err; nvmType_t type; if (c->flags.nvmtype == 0) { nvm_detect(gNvmInternalInterface_c, &type); } c->flags.nvmtype = type; err = nvm_read(gNvmInternalInterface_c, c->flags.nvmtype, c, MC1322X_CONFIG_PAGE, sizeof(mc1322xConfig)); }
void main(void) { nvmType_t type=0; nvmErr_t err; uint32_t buf[WRITE_NBYTES/4]; uint32_t i; uart_init(INC, MOD, SAMP); print_welcome("nvm-write"); vreg_init(); if(NVM_INTERFACE == gNvmInternalInterface_c) { printf("Detecting internal nvm\n\r"); } else { printf("Setting up gpio\r\n"); /* set SPI func */ GPIO->FUNC_SEL.GPIO_04 = 1; GPIO->FUNC_SEL.GPIO_05 = 1; GPIO->FUNC_SEL.GPIO_06 = 1; GPIO->FUNC_SEL.GPIO_07 = 1; printf("Detecting external nvm\n\r"); } err = nvm_detect(NVM_INTERFACE, &type); printf("nvm_detect returned: 0x%02x type is: 0x%08x\r\n", err, (unsigned int)type); buf[0] = WRITEVAL0; buf[1] = WRITEVAL1; err = nvm_erase(NVM_INTERFACE, type, 1 << WRITE_ADDR/4096); printf("nvm_erase returned: 0x%02x\r\n", err); err = nvm_write(NVM_INTERFACE, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES); printf("gnychis nvm_write returned: 0x%02x\r\n", err); printf("writing\n\r"); for(i=0; i<WRITE_NBYTES/4; i++) { printf("0x%08x\r\n", (unsigned int)buf[i]); buf[i] = 0x00000000; /* clear buf for the read */ } err = nvm_read(NVM_INTERFACE, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES); printf("nvm_read returned: 0x%02x\r\n", err); printf("reading\r\n"); for(i=0; i<WRITE_NBYTES/4; i++) { printf("0x%08x\r\n", (unsigned int)buf[i]); } while(1) {continue;}; }
/* takes an mc1322xConf and initializes to default values */ void mc1322x_config_set_default(mc1322xConfig *c) { nvmType_t type; c->magic = MC1322X_CONFIG_MAGIC; c->version = MC1322X_CONFIG_VERSION; c->eui = 0; c->channel = RF_CHANNEL - 11; c->power = 0x11; c->flags.demod = DEMOD_DCD; c->flags.autoack = AUTOACK; nvm_detect(gNvmInternalInterface_c, &type); c->flags.nvmtype = type; }
void nvm_data_read(void) { nvmType_t type = 0; nvmErr_t err; LOG6LBR_INFO("Reading 6LBR NVM\n"); err = nvm_detect(gNvmInternalInterface_c, &type); err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *) & nvm_data, CETIC_6LBR_NVM_ADDRESS, sizeof(nvm_data_t)); if (err) { LOG6LBR_ERROR("read error : %d\n", err); } }
void nvm_data_write(void) { nvmType_t type = 0; nvmErr_t err; LOG6LBR_INFO("Flashing 6LBR NVM\n"); mc1322x_config_save(&mc1322x_config); err = nvm_detect(gNvmInternalInterface_c, &type); err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *) & nvm_data, CETIC_6LBR_NVM_ADDRESS, sizeof(nvm_data_t)); if (err) { LOG6LBR_ERROR("write error : %d\n", err); } }
int main(void) { nvmType_t type=0; nvmErr_t err; volatile uint8_t c; volatile uint32_t i; volatile uint32_t buf[4]; volatile uint32_t len=0; volatile uint32_t state = SCAN_X; volatile uint32_t addr,data; uart_init(UART1, 115200); disable_irq(UART1); vreg_init(); dbg_putstr("Detecting internal nvm\n\r"); err = nvm_detect(gNvmInternalInterface_c, &type); dbg_putstr("nvm_detect returned: 0x"); dbg_put_hex(err); dbg_putstr(" type is: 0x"); dbg_put_hex32(type); dbg_putstr("\n\r"); err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)nvm_base, NVM_BASE, 0x100); dbg_putstr("nvm_read returned: 0x"); dbg_put_hex(err); dbg_putstr("\n\r"); /* erase the flash */ nvm_setsvar(0); err = nvm_erase(gNvmInternalInterface_c, type, 0x40000000); dbg_putstr("nvm_erase returned: 0x"); dbg_put_hex(err); dbg_putstr("\n\r"); dbg_putstr(" type is: 0x"); dbg_put_hex32(type); dbg_putstr("\n\r"); err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)nvm_base, NVM_BASE, 0x100); dbg_putstr("nvm_write returned: 0x"); dbg_put_hex(err); dbg_putstr("\n\r"); /* say we are ready */ len = 0; putstr("ready"); flushrx(); /* read the length */ for(i=0; i<4; i++) { c = uart1_getc(); /* bail if the first byte of the length is zero */ len += (c<<(i*8)); } dbg_putstr("len: "); dbg_put_hex32(len); dbg_putstr("\n\r"); dbg_putstr(" type is: 0x"); dbg_put_hex32(type); dbg_putstr("\n\r"); putstr("flasher done\n\r"); state = SCAN_X; addr=0; while((c=getc())) { if(state == SCAN_X) { /* read until we see an 'x' */ if(c==0) { break; } if(c!='x'){ continue; } /* go to read_chars once we have an 'x' */ state = READ_CHARS; i = 0; } if(state == READ_CHARS) { /* read all the chars up to a ',' */ ((uint8_t *)buf)[i++] = c; /* after reading a ',' */ /* goto PROCESS state */ if((c == ',') || (c == 0)) { state = PROCESS; } } if(state == PROCESS) { if(addr==0) { /*interpret the string as the starting address */ addr = to_u32(buf); } else { /* string is data to write */ data = to_u32(buf); putstr("writing addr "); put_hex32(NVM_BASE+addr); putstr(" data "); put_hex32(data); err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)&data, NVM_BASE+addr, 4); addr += 4; putstr(" err "); put_hex32(err); putstr("\n\r"); } /* look for the next 'x' */ state=SCAN_X; } } putstr("process flasher done\n\r"); while(1) {continue;}; }
void main(void) { nvmType_t type=0; nvmErr_t err; volatile uint8_t c; volatile uint32_t i; volatile uint32_t buf[4]; volatile uint32_t len=0; volatile uint32_t state = SCAN_X; volatile uint32_t addr,data; uart_init(INC, MOD, SAMP); disable_irq(UART1); vreg_init(); dbg_putstr("Detecting internal nvm\n\r"); err = nvm_detect(gNvmInternalInterface_c, &type); dbg_putstr("nvm_detect returned: 0x"); dbg_put_hex(err); dbg_putstr(" type is: 0x"); dbg_put_hex32(type); dbg_putstr("\n\r"); /* erase the flash */ err = nvm_erase(gNvmInternalInterface_c, type, 0x7fffffff); dbg_putstr("nvm_erase returned: 0x"); dbg_put_hex(err); dbg_putstr("\n\r"); dbg_putstr(" type is: 0x"); dbg_put_hex32(type); dbg_putstr("\n\r"); /* say we are ready */ len = 0; putstr("ready"); flushrx(); /* read the length */ for(i=0; i<4; i++) { c = uart1_getc(); /* bail if the first byte of the length is zero */ len += (c<<(i*8)); } dbg_putstr("len: "); dbg_put_hex32(len); dbg_putstr("\n\r"); /* write the OKOK magic */ #if BOOT_OK ((uint8_t *)buf)[0] = 'O'; ((uint8_t *)buf)[1] = 'K'; ((uint8_t *)buf)[2] = 'O'; ((uint8_t *)buf)[3] = 'K'; #elif BOOT_SECURE ((uint8_t *)buf)[0] = 'S'; ((uint8_t *)buf)[1] = 'E'; ((uint8_t *)buf)[2] = 'C'; ((uint8_t *)buf)[3] = 'U'; #else ((uint8_t *)buf)[0] = 'N'; ((uint8_t *)buf)[1] = 'O'; ((uint8_t *)buf)[2] = 'N'; ((uint8_t *)buf)[3] = 'O'; #endif dbg_putstr(" type is: 0x"); dbg_put_hex32(type); dbg_putstr("\n\r"); /* don't make a valid boot image if the received length is zero */ if(len == 0) { ((uint8_t *)buf)[0] = 'N'; ((uint8_t *)buf)[1] = 'O'; ((uint8_t *)buf)[2] = 'N'; ((uint8_t *)buf)[3] = 'O'; } err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)buf, 0, 4); dbg_putstr("nvm_write returned: 0x"); dbg_put_hex(err); dbg_putstr("\n\r"); /* write the length */ err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)&len, 4, 4); /* read a byte, write a byte */ for(i=0; i<len; i++) { c = getc(); err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)&c, 8+i, 1); } putstr("flasher done\n\r"); state = SCAN_X; addr=0; while((c=getc())) { if(state == SCAN_X) { /* read until we see an 'x' */ if(c==0) { break; } if(c!='x'){ continue; } /* go to read_chars once we have an 'x' */ state = READ_CHARS; i = 0; } if(state == READ_CHARS) { /* read all the chars up to a ',' */ ((uint8_t *)buf)[i++] = c; /* after reading a ',' */ /* goto PROCESS state */ if((c == ',') || (c == 0)) { state = PROCESS; } } if(state == PROCESS) { if(addr==0) { /*interpret the string as the starting address */ addr = to_u32(buf); } else { /* string is data to write */ data = to_u32(buf); putstr("writing addr "); put_hex32(addr); putstr(" data "); put_hex32(data); putstr("\n\r"); err = nvm_write(gNvmInternalInterface_c, 1, (uint8_t *)&data, addr, 4); addr += 4; } /* look for the next 'x' */ state=SCAN_X; } } while(1) {continue;}; }