/** * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait * @prm_mod: PRM submodule base (e.g. CORE_MOD) * @rst_shift: register bit shift corresponding to the reset line to deassert * @st_shift: register bit shift for the status of the deasserted submodule * * Some IPs like dsp or iva contain processors that require an HW * reset line to be asserted / deasserted in order to fully enable the * IP. These modules may have multiple hard-reset lines that reset * different 'submodules' inside the IP block. This function will * take the submodule out of reset and wait until the PRCM indicates * that the reset has completed before returning. Returns 0 upon success or * -EINVAL upon an argument error, -EEXIST if the submodule was already out * of reset, or -EBUSY if the submodule did not exit reset promptly. */ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) { u32 rst, st; int c; if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) return -EINVAL; rst = 1 << rst_shift; st = 1 << st_shift; /* Check the current status to avoid de-asserting the line twice */ if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0) return -EEXIST; /* Clear the reset status by writing 1 to the status bit */ omap2_prm_rmw_mod_reg_bits(0xffffffff, st, prm_mod, OMAP2_RM_RSTST); /* de-assert the reset control line */ omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL); /* wait the status to be set */ omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST, st), MAX_MODULE_HARDRESET_WAIT, c); return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; }
static int ti81xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) { return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, (pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL : TI81XX_PM_PWSTST, OMAP3430_LOGICSTATEST_MASK); }
/** * omap2_prm_is_hardreset_asserted - read the HW reset line state of * submodules contained in the hwmod module * @prm_mod: PRM submodule base (e.g. CORE_MOD) * @shift: register bit shift corresponding to the reset line to check * * Returns 1 if the (sub)module hardreset line is currently asserted, * 0 if the (sub)module hardreset line is not currently asserted, or * -EINVAL if called while running on a non-OMAP2/3 chip. */ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) { if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) return -EINVAL; return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, (1 << shift)); }
static int omap3_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) { u32 m; m = omap3_get_mem_bank_lastmemst_mask(bank); return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, m); }
static int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) { u32 m; m = omap2_pwrdm_get_mem_bank_retst_mask(bank); return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, m); }
static int omap3_clkdm_read_sleepdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, OMAP3430_CM_SLEEPDEP, (1 << clkdm2->dep_bit)); }
static int omap2_clkdm_read_wkdep(struct clockdomain *clkdm1, struct clockdomain *clkdm2) { return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP, (1 << clkdm2->dep_bit)); }
static int ti81xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) { return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, TI81XX_PM_PWSTCTRL, OMAP_POWERSTATE_MASK); }
static int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) { return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTST, OMAP_POWERSTATEST_MASK); }
static int ti81xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) { return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, TI81XX_PM_PWSTST, OMAP3430_LOGICSTATEST_MASK); }
static int omap3_pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) { return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, OMAP3430_LASTLOGICSTATEENTERED_MASK); }
static int omap3_pwrdm_read_logic_retst(struct powerdomain *pwrdm) { return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL, OMAP3430_LOGICSTATEST_MASK); }
/** * omap2_prm_is_hardreset_asserted - read the HW reset line state of * submodules contained in the hwmod module * @prm_mod: PRM submodule base (e.g. CORE_MOD) * @shift: register bit shift corresponding to the reset line to check * * Returns 1 if the (sub)module hardreset line is currently asserted, * 0 if the (sub)module hardreset line is not currently asserted, or * -EINVAL if called while running on a non-OMAP2/3 chip. */ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) { return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, (1 << shift)); }