static int pcm049_mem_init(void)
{
#ifdef CONFIG_1024MB_DDR2RAM
omap_add_ram0(SZ_1G);
#else
omap_add_ram0(SZ_512M);
#endif
omap44xx_add_sram0();
return 0;
}
static int pcm051_mem_init(void)
{
if (IS_ENABLED(CONFIG_512MB_MT41J256M8HX15E_2x256M8) ||
IS_ENABLED(CONFIG_512MB_MT41J128M16_1x512M16))
omap_add_ram0(SZ_512M);
else if (IS_ENABLED(CONFIG_128MB_MT41J64M1615IT_1x128M16))
omap_add_ram0(SZ_128M);
else if (IS_ENABLED(CONFIG_256MB_MT41J128M16125IT_1x256M16))
omap_add_ram0(SZ_256M);
else if (IS_ENABLED(CONFIG_1024MB_MT41J512M8125IT_2x512M8))
omap_add_ram0(SZ_1G);
return 0;
}
static int beagle_mem_init(void)
{
if (barebox_arm_machine() != MACH_TYPE_OMAP3_BEAGLE)
return 0;
omap_add_ram0(SZ_128M);
return 0;
}
static int pcaal1_mem_init(void)
{
#ifdef CONFIG_OMAP_GPMC
/*
* WP is made high and WAIT1 active Low
*/
gpmc_generic_init(0x10);
#endif
omap3_add_sram0();
omap_add_ram0(get_sdr_cs_size(SDRC_CS0_OSET));
printf("found %s at SDCS0\n", size_human_readable(get_sdr_cs_size(SDRC_CS0_OSET)));
if ((get_sdr_cs_size(SDRC_CS1_OSET) != 0) && (get_sdr_cs1_base() != OMAP_SDRC_CS0)) {
arm_add_mem_device("ram1", get_sdr_cs1_base(), get_sdr_cs_size(SDRC_CS1_OSET));
printf("found %s at SDCS1\n", size_human_readable(get_sdr_cs_size(SDRC_CS1_OSET)));
}
return 0;
}
static int beagle_mem_init(void)
{
omap_add_ram0(SZ_128M);
return 0;
}
static int sdp3430_mem_init(void)
{
omap_add_ram0(SZ_128M);
return 0;
}
static int omap3evm_mem_init(void)
{
omap_add_ram0(SZ_128M);
return 0;
}
static int archosg9_mem_init(void){
omap_add_ram0(SZ_1G);
return 0;
}
static int panda_mem_init(void)
{
omap_add_ram0(SZ_1G);
return 0;
}
static int pcm051_mem_init(void)
{
omap_add_ram0(SZ_512M);
return 0;
}
