Ejemplo n.º 1
0
static void fifo_setup(struct omap_uart *uart)
{
    u32 lcr, efr, mcr;
    /*
     * Switch to register configuration mode B to access the UART_OMAP_EFR
     * register.
     */
    lcr = omap_read(uart, UART_LCR);
    omap_write(uart, UART_LCR, UART_LCR_CONF_MODE_B);
    /*
     * Enable register submode TCR_TLR to access the UART_OMAP_TLR register.
     */
    efr = omap_read(uart, UART_OMAP_EFR);
    omap_write(uart, UART_OMAP_EFR, efr|UART_OMAP_EFR_ECB);
    /*
     * Switch to register configuration mode A to access the UART_MCR
     * register.
     */
    omap_write(uart, UART_LCR, UART_LCR_CONF_MODE_A);
    /*
     * Enable register submode TCR_TLR to access the UART_OMAP_TLR register
     */
    mcr = omap_read(uart, UART_MCR);
    omap_write(uart, UART_MCR, mcr|UART_MCR_TCRTLR);
    /*
     * Enable the FIFO; load the new FIFO trigger and the new DMA mode.
     */
    omap_write(uart, UART_FCR, UART_FCR_R_TRIG_01|
               UART_FCR_T_TRIG_10|UART_FCR_ENABLE);
    /*
     * Switch to register configuration mode B to access the UART_EFR
     * register.
     */
    omap_write(uart, UART_LCR, UART_LCR_CONF_MODE_B);
    /*
     * Load the new FIFO triggers and the new DMA mode bit.
     */
    omap_write(uart, UART_OMAP_SCR, UART_OMAP_SCR_RX_TRIG_GRANU1_MASK);
    /*
     * Restore the UART_OMAP_EFR[4] value.
     */
    omap_write(uart, UART_OMAP_EFR, efr);
    /*
     * Switch to register configuration mode A to access the UART_MCR
     * register.
     */
    omap_write(uart, UART_LCR, UART_LCR_CONF_MODE_A);
    /*
     * Restore UART_MCR[6] value.
     */
    omap_write(uart, UART_MCR, mcr);
    /*
     * Restore UART_LCR value.
     */
    omap_write(uart, UART_LCR, lcr);

    uart->fifo_size = 64;
}
Ejemplo n.º 2
0
static int omap_uart_getc(struct serial_port *port, char *pc)
{
    struct omap_uart *uart = port->uart;

    if ( !(omap_read(uart, UART_LSR) & UART_LSR_DR) )
	return 0;

    *pc = omap_read(uart, UART_RBR) & 0xff;
    return 1;
}
Ejemplo n.º 3
0
static int omap_uart_tx_ready(struct serial_port *port)
{
    struct omap_uart *uart = port->uart;
    uint32_t reg;

    reg = omap_read(uart, UART_IER);
    omap_write(uart, UART_IER, reg | UART_IER_ETHREI);

    return omap_read(uart, UART_LSR) & UART_LSR_THRE ? uart->fifo_size : 0;
}
Ejemplo n.º 4
0
static int omap_uart_tx_ready(struct serial_port *port)
{
    struct omap_uart *uart = port->uart;
    uint32_t reg;
    uint8_t cnt;

    reg = omap_read(uart, UART_IER);
    omap_write(uart, UART_IER, reg | UART_IER_ETHREI);

    /* Check for empty space in TX FIFO */
    if ( omap_read(uart, UART_OMAP_SSR) & UART_OMAP_SSR_TX_FIFO_FULL_MASK )
        return 0;

    /* Check number of data bytes stored in TX FIFO */
    cnt = omap_read(uart, UART_OMAP_TXFIFO_LVL);
    ASSERT( cnt >= 0 && cnt <= uart->fifo_size );

    return (uart->fifo_size - cnt);
}
Ejemplo n.º 5
0
static void omap_uart_interrupt(int irq, void *data, struct cpu_user_regs *regs)
{
    struct serial_port *port = data;
    struct omap_uart *uart = port->uart;
    u32 lsr;
    uint32_t reg;

    while ( !(omap_read(uart, UART_IIR) & UART_IIR_NOINT) )
    {
        lsr = omap_read(uart, UART_LSR) & 0xff;
	if ( lsr & UART_LSR_THRE )
            serial_tx_interrupt(port, regs);
	if ( lsr & UART_LSR_DR )
            serial_rx_interrupt(port, regs);

        if ( port->txbufc == port->txbufp ) {
            reg = omap_read(uart, UART_IER);
            omap_write(uart, UART_IER, reg & (~UART_IER_ETHREI));
        }
    };
}
Ejemplo n.º 6
0
static void baud_protocol_setup(struct omap_uart *uart)
{
    u32 dll, dlh, efr;
    unsigned int divisor;

    divisor = uart->clock_hz / (uart->baud << 4);
    dll = divisor & 0xff;
    dlh = divisor >> 8;

    /*
     * Switch to register configuration mode B to access the UART_OMAP_EFR
     * register.
     */
    omap_write(uart, UART_LCR, UART_LCR_CONF_MODE_B);
    /*
     * Enable access to the UART_IER[7:4] bit field.
     */
    efr = omap_read(uart, UART_OMAP_EFR);
    omap_write(uart, UART_OMAP_EFR, efr|UART_OMAP_EFR_ECB);
    /*
     * Switch to register operation mode to access the UART_IER register.
     */
    omap_write(uart, UART_LCR, 0);
    /*
     * Clear the UART_IER register (set the UART_IER[4] SLEEP_MODE bit
     * to 0 to change the UART_DLL and UART_DLM register). Set the
     * UART_IER register value to 0x0000.
     */
    omap_write(uart, UART_IER, 0);
    /*
     * Switch to register configuartion mode B to access the UART_DLL and
     * UART_DLM registers.
     */
    omap_write(uart, UART_LCR, UART_LCR_CONF_MODE_B);
    /*
     * Load divisor value.
     */
    omap_write(uart, UART_DLL, dll);
    omap_write(uart, UART_DLM, dlh);
    /*
     * Restore the UART_OMAP_EFR
     */
    omap_write(uart, UART_OMAP_EFR, efr);
    /*
     * Load the new protocol formatting (parity, stop-bit, character length)
     * and switch to register operational mode.
     */
    omap_write(uart, UART_LCR, (uart->data_bits - 5) |
               ((uart->stop_bits - 1) << 2) | uart->parity);
}