u8 omap_fan5355_reconfigure_regs(struct voltagedomain *voltdm,
unsigned char i2c_addr)
{
omap_vc_bypass_send_i2c_msg(voltdm, i2c_addr, CONTROL1_REG_ADDR,
CONTROL1_REG_VALUE);
omap_vc_bypass_send_i2c_msg(voltdm, i2c_addr, CONTROL2_REG_ADDR,
CONTROL2_REG_VALUE);
return 0;
}
/**
* omap4_twl_tps62361_enable() - Enable tps chip
*
* This function enables TPS chip by associating SYSEN signal
* to APE resource group of TWL6030.
*
* Returns 0 on sucess, error is returned if I2C read/write fails.
*/
static int __init omap4_twl_tps62361_enable(struct voltagedomain *voltdm)
{
int ret = 0;
int ret1;
u8 val;
/* Dont trust the bootloader. start with max, pm will set to proper */
val = voltdm->pmic->uv_to_vsel(voltdm->pmic->vp_vddmax);
ret = omap_vc_bypass_send_i2c_msg(voltdm, voltdm->pmic->i2c_slave_addr,
default_reg, val);
/* Setup Ramp */
val = tps6236x_ramp_value(voltdm->pmic->slew_rate) <<
__ffs(REG_TPS6236X_RAMP_CTRL_RMP_MASK);
val &= REG_TPS6236X_RAMP_CTRL_RMP_MASK;
/* We would like to ramp the voltage asap */
val |= REG_TPS6236X_RAMP_CTRL_RAMP_PFM;
/* We would like to ramp down the voltage asap, so enable the discharge capacitor */
val |= REG_TPS6236X_RAMP_CTRL_EN_DISC;
ret = omap_vc_bypass_send_i2c_msg(voltdm, voltdm->pmic->i2c_slave_addr,
REG_TPS6236X_RAMP_CTRL, val);
if (ret)
goto out;
/* Setup the internal pulls to select if needed */
if (pd_vsel0 != -1 || pd_vsel1 != -1) {
val = REG_TPS6236X_CTRL_PD_EN;
val |= (pd_vsel0) ? 0 : REG_TPS6236X_CTRL_PD_VSEL0;
val |= (pd_vsel1) ? 0 : REG_TPS6236X_CTRL_PD_VSEL1;
ret = omap_vc_bypass_send_i2c_msg(voltdm,
voltdm->pmic->i2c_slave_addr,
REG_TPS6236X_CTRL, val);
if (ret)
goto out;
}
/* Enable thermal shutdown - 0 is enable :) */
ret = omap_vc_bypass_send_i2c_msg(voltdm,
voltdm->pmic->i2c_slave_addr,
REG_TPS6236X_TEMP, 0x0);
if (ret)
goto out;
/* if we have to work with TWL */
#ifdef CONFIG_TWL4030_CORE
/* unmask PREQ transition Executes ACT2SLP and SLP2ACT sleep sequence */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_MSK_PREQ1,
0x00, TWL6030_REG_MSK_TRANSITION);
if (ret1) {
pr_err("%s:Err:TWL6030: map APE PREQ1(%d)\n", __func__, ret1);
ret = ret1;
}
/* Setup SYSEN to be 1 on Active and 0 for sleep and OFF states */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_MSK_SYSEN_ACTIVE,
0x01, TWL6030_REG_SYSEN_CFG_TRANS);
if (ret1) {
pr_err("%s:Err:TWL6030: sysen active(%d)\n", __func__, ret1);
ret = ret1;
}
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_MSK_SYSEN_SLEEP,
0x00, TWL6030_REG_SYSEN_CFG_TRANS);
if (ret1) {
pr_err("%s:Err:TWL6030: sysen sleep(%d)\n", __func__, ret1);
ret = ret1;
}
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_MSK_SYSEN_OFF,
0x00, TWL6030_REG_SYSEN_CFG_TRANS);
if (ret1) {
pr_err("%s:Err:TWL6030: sysen off(%d)\n", __func__, ret1);
ret = ret1;
}
/* Map up SYSEN on TWL core to control TPS */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_BIT_APE_GRP |
TWL6030_BIT_MOD_GRP | TWL6030_BIT_CON_GRP,
TWL6030_BIT_APE_GRP, TWL6030_REG_SYSEN_CFG_GRP);
if (ret1) {
pr_err("%s:Err:TWL6030: map APE SYEN(%d)\n", __func__, ret1);
ret = ret1;
}
/* Since we dont use VCORE3, this should not be associated with APE */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_BIT_APE_GRP,
0x00, TWL6030_REG_VCORE3_CFG_GRP);
if (ret1) {
pr_err("%s:Err:TWL6030:unmap APE VCORE3(%d)\n", __func__, ret1);
ret = ret1;
}
/* Since we dont use VMEM, this should not be associated with APE */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_BIT_APE_GRP,
0x00, TWL6030_REG_VMEM_CFG_GRP);
if (ret1) {
pr_err("%s:Err:TWL6030: unmap APE VMEM(%d)\n", __func__, ret1);
ret = ret1;
}
#endif
out:
if (ret)
pr_err("%s: Error enabling TPS(%d)\n", __func__, ret);
return ret;
}
/**
* omap4_twl_tps62361_enable() - Enable tps chip
*
* This function enables TPS chip by associating SYSEN signal
* to APE resource group of TWL6030.
*
* Returns 0 on sucess, error is returned if I2C read/write fails.
*/
static int __init omap4_twl_tps62361_enable(struct voltagedomain *voltdm)
{
int ret = 0;
int ret1;
u8 val;
/* Dont trust the bootloader. start with max, pm will set to proper */
//
val = voltdm->pmic->uv_to_vsel(voltdm->pmic->max_volt);
//
ret = omap_vc_bypass_send_i2c_msg(voltdm, voltdm->pmic->i2c_slave_addr,
default_reg, val);
/* Setup Ramp */
val = tps6236x_ramp_value(voltdm->pmic->slew_rate) <<
__ffs(REG_TPS6236X_RAMP_CTRL_RMP_MASK);
val &= REG_TPS6236X_RAMP_CTRL_RMP_MASK;
/* We would like to ramp the voltage asap */
val |= REG_TPS6236X_RAMP_CTRL_RAMP_PFM;
/* We would like to ramp down the voltage asap as well*/
val |= REG_TPS6236X_RAMP_CTRL_EN_DISC;
ret = omap_vc_bypass_send_i2c_msg(voltdm, voltdm->pmic->i2c_slave_addr,
REG_TPS6236X_RAMP_CTRL, val);
if (ret)
goto out;
/* Setup the internal pulls to select if needed */
if (pd_vsel0 != -1 || pd_vsel1 != -1) {
val = REG_TPS6236X_CTRL_PD_EN;
val |= (pd_vsel0) ? 0 : REG_TPS6236X_CTRL_PD_VSEL0;
val |= (pd_vsel1) ? 0 : REG_TPS6236X_CTRL_PD_VSEL1;
ret = omap_vc_bypass_send_i2c_msg(voltdm,
voltdm->pmic->i2c_slave_addr,
REG_TPS6236X_CTRL, val);
if (ret)
goto out;
}
/* Enable thermal shutdown - 0 is enable :) */
ret = omap_vc_bypass_send_i2c_msg(voltdm,
voltdm->pmic->i2c_slave_addr,
REG_TPS6236X_TEMP, 0x0);
if (ret)
goto out;
/* if we have to work with TWL */
#ifdef CONFIG_TWL4030_CORE
/* Map up SYSEN on TWL core to control TPS */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_BIT_APE_GRP |
TWL6030_BIT_MOD_GRP | TWL6030_BIT_CON_GRP,
TWL6030_BIT_APE_GRP, TWL6030_REG_SYSEN_CFG_GRP);
if (ret1) {
pr_err("%s:Err:TWL6030: map APE SYEN(%d)\n", __func__, ret1);
ret = ret1;
}
/* Since we dont use VCORE3, this should not be associated with APE */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_BIT_APE_GRP,
0x00, TWL6030_REG_VCORE3_CFG_GRP);
if (ret1) {
pr_err("%s:Err:TWL6030:unmap APE VCORE3(%d)\n", __func__, ret1);
ret = ret1;
}
/* Since we dont use VMEM, this should not be associated with APE */
ret1 = _twl_i2c_rmw_u8(TWL6030_MODULE_ID0, TWL6030_BIT_APE_GRP,
0x00, TWL6030_REG_VMEM_CFG_GRP);
if (ret1) {
pr_err("%s:Err:TWL6030: unmap APE VMEM(%d)\n", __func__, ret1);
ret = ret1;
}
#endif
out:
if (ret)
pr_err("%s: Error enabling TPS(%d)\n", __func__, ret);
return ret;
}
