static inline int isp1704_charger_detect(struct isp1704_charger *isp)
{
unsigned long timeout;
u8 r;
int ret = 0;
/* set SW control bit in PWR_CTRL register */
otg_io_write(isp->otg, ISP1704_PWR_CTRL,
ISP1704_PWR_CTRL_SWCTRL);
/* enable manual charger detection */
r = (ISP1704_PWR_CTRL_SWCTRL | ISP1704_PWR_CTRL_DPVSRC_EN);
otg_io_write(isp->otg, ULPI_SET(ISP1704_PWR_CTRL), r);
usleep_range(1000, 2000);
timeout = jiffies + msecs_to_jiffies(300);
do {
/* Check if there is a charger */
if (otg_io_read(isp->otg, ISP1704_PWR_CTRL)
& ISP1704_PWR_CTRL_VDAT_DET) {
ret = isp1704_charger_verify(isp);
break;
}
} while (!time_after(jiffies, timeout));
return ret;
}
static int ulpi_link_phy_power_off(struct tegra_usb_phy *phy)
{
unsigned long val;
void __iomem *base = phy->regs;
int ret;
DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
if (!phy->phy_clk_on) {
DBG("%s(%d) inst:[%d] phy clk is already off\n", __func__,
__LINE__, phy->inst);
return 0;
}
/* Disable VbusValid, SessEnd comparators */
ret = otg_io_write(phy->ulpi_vp, 0x00, 0x0D);
if (ret)
pr_err("%s: ulpi write 0x0D failed\n", __func__);
ret = otg_io_write(phy->ulpi_vp, 0x00, 0x10);
if (ret)
pr_err("%s: ulpi write 0x10 failed\n", __func__);
/* Disable IdFloat comparator */
ret = otg_io_write(phy->ulpi_vp, 0x00, 0x19);
if (ret)
pr_err("%s: ulpi write 0x19 failed\n", __func__);
ret = otg_io_write(phy->ulpi_vp, 0x00, 0x1D);
if (ret)
pr_err("%s: ulpi write 0x1D failed\n", __func__);
phy->port_speed = (readl(base + USB_PORTSC) >> 26) &
USB_PORTSC_PSPD_MASK;
/* Clear WKCN/WKDS/WKOC wake-on events that can cause the USB
* Controller to immediately bring the ULPI PHY out of low power
*/
val = readl(base + USB_PORTSC);
val &= ~(USB_PORTSC_WKOC | USB_PORTSC_WKDS | USB_PORTSC_WKCN);
writel(val, base + USB_PORTSC);
/* Put the PHY in the low power mode */
val = readl(base + USB_PORTSC);
val |= USB_PORTSC_PHCD;
writel(val, base + USB_PORTSC);
if (usb_phy_reg_status_wait(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
0, 2500)) {
pr_err("%s: timeout waiting for phy to stop\n", __func__);
}
if (phy->ulpi_clk)
clk_disable(phy->ulpi_clk);
phy->phy_clk_on = false;
phy->hw_accessible = false;
return 0;
}
/*
* ISP1704 detects PS/2 adapters as charger. To make sure the detected charger
* is actually a dedicated charger, the following steps need to be taken.
*/
static inline int isp1704_charger_verify(struct isp1704_charger *isp)
{
int ret = 0;
u8 r;
/* Reset the transceiver */
r = otg_io_read(isp->otg, ULPI_FUNC_CTRL);
r |= ULPI_FUNC_CTRL_RESET;
otg_io_write(isp->otg, ULPI_FUNC_CTRL, r);
usleep_range(1000, 2000);
/* Set normal mode */
r &= ~(ULPI_FUNC_CTRL_RESET | ULPI_FUNC_CTRL_OPMODE_MASK);
otg_io_write(isp->otg, ULPI_FUNC_CTRL, r);
/* Clear the DP and DM pull-down bits */
r = ULPI_OTG_CTRL_DP_PULLDOWN | ULPI_OTG_CTRL_DM_PULLDOWN;
otg_io_write(isp->otg, ULPI_CLR(ULPI_OTG_CTRL), r);
/* Enable strong pull-up on DP (1.5K) and reset */
r = ULPI_FUNC_CTRL_TERMSELECT | ULPI_FUNC_CTRL_RESET;
otg_io_write(isp->otg, ULPI_SET(ULPI_FUNC_CTRL), r);
usleep_range(1000, 2000);
/* Read the line state */
if (!otg_io_read(isp->otg, ULPI_DEBUG)) {
/* Disable strong pull-up on DP (1.5K) */
otg_io_write(isp->otg, ULPI_CLR(ULPI_FUNC_CTRL),
ULPI_FUNC_CTRL_TERMSELECT);
return 1;
}
/* Is it a charger or PS/2 connection */
/* Enable weak pull-up resistor on DP */
otg_io_write(isp->otg, ULPI_SET(ISP1704_PWR_CTRL),
ISP1704_PWR_CTRL_DP_WKPU_EN);
/* Disable strong pull-up on DP (1.5K) */
otg_io_write(isp->otg, ULPI_CLR(ULPI_FUNC_CTRL),
ULPI_FUNC_CTRL_TERMSELECT);
/* Enable weak pull-down resistor on DM */
otg_io_write(isp->otg, ULPI_SET(ULPI_OTG_CTRL),
ULPI_OTG_CTRL_DM_PULLDOWN);
/* It's a charger if the line states are clear */
if (!(otg_io_read(isp->otg, ULPI_DEBUG)))
ret = 1;
/* Disable weak pull-up resistor on DP */
otg_io_write(isp->otg, ULPI_CLR(ISP1704_PWR_CTRL),
ISP1704_PWR_CTRL_DP_WKPU_EN);
return ret;
}
static int ulpi_check_integrity(struct otg_transceiver *otg)
{
int ret, i;
unsigned int val = 0x55;
for (i = 0; i < 2; i++) {
ret = otg_io_write(otg, val, ULPI_SCRATCH);
if (ret < 0)
return ret;
ret = otg_io_read(otg, ULPI_SCRATCH);
if (ret < 0)
return ret;
if (ret != val) {
pr_err("ULPI integrity check: failed!");
return -ENODEV;
}
val = val << 1;
}
pr_info("ULPI integrity check: passed.\n");
return 0;
}
static void ci13xxx_msm_notify_event(struct ci13xxx *udc, unsigned event)
{
struct device *dev = udc->gadget.dev.parent;
int val;
switch (event) {
case CI13XXX_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI13XXX_CONTROLLER_RESET_EVENT received\n");
writel(0, USB_AHBBURST);
writel(0, USB_AHBMODE);
break;
case CI13XXX_CONTROLLER_STOPPED_EVENT:
dev_dbg(dev, "CI13XXX_CONTROLLER_STOPPED_EVENT received\n");
/*
* Put the transceiver in non-driving mode. Otherwise host
* may not detect soft-disconnection.
*/
val = otg_io_read(udc->transceiver, ULPI_FUNC_CTRL);
val &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
val |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
otg_io_write(udc->transceiver, val, ULPI_FUNC_CTRL);
break;
default:
dev_dbg(dev, "unknown ci13xxx_udc event\n");
break;
}
}
/*
* Determine is the charging port DCP (dedicated charger) or CDP (Host/HUB
* chargers).
*
* REVISIT: The method is defined in Battery Charging Specification and is
* applicable to any ULPI transceiver. Nothing isp170x specific here.
*/
static inline int isp1704_charger_type(struct isp1704_charger *isp)
{
u8 reg;
u8 func_ctrl;
u8 otg_ctrl;
int type = POWER_SUPPLY_TYPE_USB_DCP;
func_ctrl = otg_io_read(isp->otg, ULPI_FUNC_CTRL);
otg_ctrl = otg_io_read(isp->otg, ULPI_OTG_CTRL);
/* disable pulldowns */
reg = ULPI_OTG_CTRL_DM_PULLDOWN | ULPI_OTG_CTRL_DP_PULLDOWN;
otg_io_write(isp->otg, ULPI_CLR(ULPI_OTG_CTRL), reg);
/* full speed */
otg_io_write(isp->otg, ULPI_CLR(ULPI_FUNC_CTRL),
ULPI_FUNC_CTRL_XCVRSEL_MASK);
otg_io_write(isp->otg, ULPI_SET(ULPI_FUNC_CTRL),
ULPI_FUNC_CTRL_FULL_SPEED);
/* Enable strong pull-up on DP (1.5K) and reset */
reg = ULPI_FUNC_CTRL_TERMSELECT | ULPI_FUNC_CTRL_RESET;
otg_io_write(isp->otg, ULPI_SET(ULPI_FUNC_CTRL), reg);
usleep_range(1000, 2000);
reg = otg_io_read(isp->otg, ULPI_DEBUG);
if ((reg & 3) != 3)
type = POWER_SUPPLY_TYPE_USB_CDP;
/* recover original state */
otg_io_write(isp->otg, ULPI_FUNC_CTRL, func_ctrl);
otg_io_write(isp->otg, ULPI_OTG_CTRL, otg_ctrl);
return type;
}
static int ulpi_set_vbus(struct otg_transceiver *otg, bool on)
{
unsigned int flags = otg_io_read(otg, ULPI_OTG_CTRL);
flags &= ~(ULPI_OTG_CTRL_DRVVBUS | ULPI_OTG_CTRL_DRVVBUS_EXT);
if (on) {
if (otg->flags & USB_OTG_DRV_VBUS)
flags |= ULPI_OTG_CTRL_DRVVBUS;
if (otg->flags & USB_OTG_DRV_VBUS_EXT)
flags |= ULPI_OTG_CTRL_DRVVBUS_EXT;
}
return otg_io_write(otg, flags, ULPI_SET(ULPI_OTG_CTRL));
}
static int ulpi_set_flags(struct otg_transceiver *otg)
{
unsigned int flags = 0;
if (otg->flags & USB_OTG_PULLUP_ID)
flags |= ULPI_OTG_CTRL_ID_PULLUP;
if (otg->flags & USB_OTG_PULLDOWN_DM)
flags |= ULPI_OTG_CTRL_DM_PULLDOWN;
if (otg->flags & USB_OTG_PULLDOWN_DP)
flags |= ULPI_OTG_CTRL_DP_PULLDOWN;
if (otg->flags & USB_OTG_EXT_VBUS_INDICATOR)
flags |= ULPI_OTG_CTRL_EXTVBUSIND;
return otg_io_write(otg, flags, ULPI_SET(ULPI_OTG_CTRL));
}
static int ulpi_set_ic_flags(struct otg_transceiver *otg)
{
unsigned int flags = 0;
if (otg->flags & ULPI_IC_AUTORESUME)
flags |= ULPI_IFC_CTRL_AUTORESUME;
if (otg->flags & ULPI_IC_EXTVBUS_INDINV)
flags |= ULPI_IFC_CTRL_EXTERNAL_VBUS;
if (otg->flags & ULPI_IC_IND_PASSTHRU)
flags |= ULPI_IFC_CTRL_PASSTHRU;
if (otg->flags & ULPI_IC_PROTECT_DIS)
flags |= ULPI_IFC_CTRL_PROTECT_IFC_DISABLE;
return otg_io_write(otg, flags, ULPI_IFC_CTRL);
}
static int ulpi_set_fc_flags(struct otg_transceiver *otg)
{
unsigned int flags = 0;
/*
* ULPI Specification rev.1.1 default
* for XcvrSelect is Full Speed.
*/
if (otg->flags & ULPI_FC_HS)
flags |= ULPI_FUNC_CTRL_HIGH_SPEED;
else if (otg->flags & ULPI_FC_LS)
flags |= ULPI_FUNC_CTRL_LOW_SPEED;
else if (otg->flags & ULPI_FC_FS4LS)
flags |= ULPI_FUNC_CTRL_FS4LS;
else
flags |= ULPI_FUNC_CTRL_FULL_SPEED;
if (otg->flags & ULPI_FC_TERMSEL)
flags |= ULPI_FUNC_CTRL_TERMSELECT;
/*
* ULPI Specification rev.1.1 default
* for OpMode is Normal Operation.
*/
if (otg->flags & ULPI_FC_OP_NODRV)
flags |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
else if (otg->flags & ULPI_FC_OP_DIS_NRZI)
flags |= ULPI_FUNC_CTRL_OPMODE_DISABLE_NRZI;
else if (otg->flags & ULPI_FC_OP_NSYNC_NEOP)
flags |= ULPI_FUNC_CTRL_OPMODE_NOSYNC_NOEOP;
else
flags |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
/*
* ULPI Specification rev.1.1 default
* for SuspendM is Powered.
*/
flags |= ULPI_FUNC_CTRL_SUSPENDM;
return otg_io_write(otg, flags, ULPI_FUNC_CTRL);
}
static inline int isp1704_test_ulpi(struct isp1704_charger *isp)
{
int vendor;
int product;
int i;
int ret = -ENODEV;
/* Test ULPI interface */
ret = otg_io_write(isp->otg, ULPI_SCRATCH, 0xaa);
if (ret < 0)
return ret;
ret = otg_io_read(isp->otg, ULPI_SCRATCH);
if (ret < 0)
return ret;
if (ret != 0xaa)
return -ENODEV;
/* Verify the product and vendor id matches */
vendor = otg_io_read(isp->otg, ULPI_VENDOR_ID_LOW);
vendor |= otg_io_read(isp->otg, ULPI_VENDOR_ID_HIGH) << 8;
if (vendor != NXP_VENDOR_ID)
return -ENODEV;
product = otg_io_read(isp->otg, ULPI_PRODUCT_ID_LOW);
product |= otg_io_read(isp->otg, ULPI_PRODUCT_ID_HIGH) << 8;
for (i = 0; i < ARRAY_SIZE(isp170x_id); i++) {
if (product == isp170x_id[i]) {
sprintf(isp->model, "isp%x", product);
return product;
}
}
dev_err(isp->dev, "product id %x not matching known ids", product);
return -ENODEV;
}
static int ulpi_set_otg_flags(struct otg_transceiver *otg)
{
unsigned int flags = ULPI_OTG_CTRL_DP_PULLDOWN |
ULPI_OTG_CTRL_DM_PULLDOWN;
if (otg->flags & ULPI_OTG_ID_PULLUP)
flags |= ULPI_OTG_CTRL_ID_PULLUP;
/*
* ULPI Specification rev.1.1 default
* for Dp/DmPulldown is enabled.
*/
if (otg->flags & ULPI_OTG_DP_PULLDOWN_DIS)
flags &= ~ULPI_OTG_CTRL_DP_PULLDOWN;
if (otg->flags & ULPI_OTG_DM_PULLDOWN_DIS)
flags &= ~ULPI_OTG_CTRL_DM_PULLDOWN;
if (otg->flags & ULPI_OTG_EXTVBUSIND)
flags |= ULPI_OTG_CTRL_EXTVBUSIND;
return otg_io_write(otg, flags, ULPI_OTG_CTRL);
}
static int ulpi_set_host(struct otg_transceiver *otg, struct usb_bus *host)
{
unsigned int flags = otg_io_read(otg, ULPI_IFC_CTRL);
if (!host) {
otg->host = NULL;
return 0;
}
otg->host = host;
flags &= ~(ULPI_IFC_CTRL_6_PIN_SERIAL_MODE |
ULPI_IFC_CTRL_3_PIN_SERIAL_MODE |
ULPI_IFC_CTRL_CARKITMODE);
if (otg->flags & ULPI_IC_6PIN_SERIAL)
flags |= ULPI_IFC_CTRL_6_PIN_SERIAL_MODE;
else if (otg->flags & ULPI_IC_3PIN_SERIAL)
flags |= ULPI_IFC_CTRL_3_PIN_SERIAL_MODE;
else if (otg->flags & ULPI_IC_CARKIT)
flags |= ULPI_IFC_CTRL_CARKITMODE;
return otg_io_write(otg, flags, ULPI_IFC_CTRL);
}
static int ehci_mxc_drv_probe(struct platform_device *pdev)
{
struct mxc_usbh_platform_data *pdata = pdev->dev.platform_data;
struct usb_hcd *hcd;
struct resource *res;
int irq, ret;
unsigned int flags;
struct ehci_mxc_priv *priv;
struct device *dev = &pdev->dev;
struct ehci_hcd *ehci;
dev_info(&pdev->dev, "initializing i.MX USB Controller\n");
if (!pdata) {
dev_err(dev, "No platform data given, bailing out.\n");
return -EINVAL;
}
irq = platform_get_irq(pdev, 0);
hcd = usb_create_hcd(&ehci_mxc_hc_driver, dev, dev_name(dev));
if (!hcd)
return -ENOMEM;
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
if (!priv) {
ret = -ENOMEM;
goto err_alloc;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "Found HC with no register addr. Check setup!\n");
ret = -ENODEV;
goto err_get_resource;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(dev, "controller already in use\n");
ret = -EBUSY;
goto err_request_mem;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
dev_err(dev, "error mapping memory\n");
ret = -EFAULT;
goto err_ioremap;
}
/* enable clocks */
priv->usbclk = clk_get(dev, "usb");
if (IS_ERR(priv->usbclk)) {
ret = PTR_ERR(priv->usbclk);
goto err_clk;
}
clk_enable(priv->usbclk);
if (!cpu_is_mx35() && !cpu_is_mx25()) {
priv->ahbclk = clk_get(dev, "usb_ahb");
if (IS_ERR(priv->ahbclk)) {
ret = PTR_ERR(priv->ahbclk);
goto err_clk_ahb;
}
clk_enable(priv->ahbclk);
}
/* "dr" device has its own clock on i.MX51 */
if (cpu_is_mx51() && (pdev->id == 0)) {
priv->phy1clk = clk_get(dev, "usb_phy1");
if (IS_ERR(priv->phy1clk)) {
ret = PTR_ERR(priv->phy1clk);
goto err_clk_phy;
}
clk_enable(priv->phy1clk);
}
/* call platform specific init function */
if (pdata->init) {
ret = pdata->init(pdev);
if (ret) {
dev_err(dev, "platform init failed\n");
goto err_init;
}
/* platforms need some time to settle changed IO settings */
mdelay(10);
}
ehci = hcd_to_ehci(hcd);
/* EHCI registers start at offset 0x100 */
ehci->caps = hcd->regs + 0x100;
ehci->regs = hcd->regs + 0x100 +
HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
/* set up the PORTSCx register */
ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
/* is this really needed? */
msleep(10);
/* Initialize the transceiver */
if (pdata->otg) {
pdata->otg->io_priv = hcd->regs + ULPI_VIEWPORT_OFFSET;
ret = otg_init(pdata->otg);
if (ret) {
dev_err(dev, "unable to init transceiver, probably missing\n");
ret = -ENODEV;
goto err_add;
}
ret = otg_set_vbus(pdata->otg, 1);
if (ret) {
dev_err(dev, "unable to enable vbus on transceiver\n");
goto err_add;
}
}
priv->hcd = hcd;
platform_set_drvdata(pdev, priv);
ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
if (ret)
goto err_add;
if (pdata->otg) {
/*
* efikamx and efikasb have some hardware bug which is
* preventing usb to work unless CHRGVBUS is set.
* It's in violation of USB specs
*/
if (machine_is_mx51_efikamx() || machine_is_mx51_efikasb()) {
flags = otg_io_read(pdata->otg, ULPI_OTG_CTRL);
flags |= ULPI_OTG_CTRL_CHRGVBUS;
ret = otg_io_write(pdata->otg, flags, ULPI_OTG_CTRL);
if (ret) {
dev_err(dev, "unable to set CHRVBUS\n");
goto err_add;
}
}
}
return 0;
err_add:
if (pdata && pdata->exit)
pdata->exit(pdev);
err_init:
if (priv->phy1clk) {
clk_disable(priv->phy1clk);
clk_put(priv->phy1clk);
}
err_clk_phy:
if (priv->ahbclk) {
clk_disable(priv->ahbclk);
clk_put(priv->ahbclk);
}
err_clk_ahb:
clk_disable(priv->usbclk);
clk_put(priv->usbclk);
err_clk:
iounmap(hcd->regs);
err_ioremap:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_request_mem:
err_get_resource:
kfree(priv);
err_alloc:
usb_put_hcd(hcd);
return ret;
}
static int ulpi_link_phy_power_on(struct tegra_usb_phy *phy)
{
int ret;
unsigned long val;
void __iomem *base = phy->regs;
DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
if (phy->phy_clk_on) {
DBG("%s(%d) inst:[%d] phy clk is already On\n", __func__,
__LINE__, phy->inst);
return 0;
}
if (phy->ulpi_clk) {
clk_enable(phy->ulpi_clk);
mdelay(1);
}
val = readl(base + USB_SUSP_CTRL);
val |= UHSIC_RESET;
writel(val, base + USB_SUSP_CTRL);
val = readl(base + ULPI_TIMING_CTRL_0);
val |= ULPI_OUTPUT_PINMUX_BYP | ULPI_CLKOUT_PINMUX_BYP;
writel(val, base + ULPI_TIMING_CTRL_0);
val = readl(base + USB_SUSP_CTRL);
val |= ULPI_PHY_ENABLE;
writel(val, base + USB_SUSP_CTRL);
val = readl(base + USB_SUSP_CTRL);
val |= USB_SUSP_CLR;
writel(val, base + USB_SUSP_CTRL);
if (usb_phy_reg_status_wait(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
USB_PHY_CLK_VALID, 2500))
pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
if (usb_phy_reg_status_wait(base + USB_SUSP_CTRL, USB_CLKEN,
USB_CLKEN, 2500))
pr_err("%s: timeout waiting for AHB clock\n", __func__);
val = readl(base + USB_SUSP_CTRL);
val &= ~USB_SUSP_CLR;
writel(val, base + USB_SUSP_CTRL);
val = 0;
writel(val, base + ULPI_TIMING_CTRL_1);
ulpi_set_trimmer(phy);
/* Fix VbusInvalid due to floating VBUS */
ret = otg_io_write(phy->ulpi_vp, 0x40, 0x08);
if (ret) {
pr_err("%s: ulpi write failed\n", __func__);
return ret;
}
ret = otg_io_write(phy->ulpi_vp, 0x80, 0x0B);
if (ret) {
pr_err("%s: ulpi write failed\n", __func__);
return ret;
}
val = readl(base + USB_PORTSC);
val |= USB_PORTSC_WKOC | USB_PORTSC_WKDS | USB_PORTSC_WKCN;
writel(val, base + USB_PORTSC);
phy->phy_clk_on = true;
phy->hw_accessible = true;
return 0;
}
