/*
* Enter a 4KB PTE mapping for the supplied VA/PA into the resume-time pmap.
*/
void
hibernate_enter_resume_4k_pte(vaddr_t va, paddr_t pa)
{
pt_entry_t *pde, npde;
/* Map the page */
pde = (pt_entry_t *)(HIBERNATE_PT_LOW +
(pl1_pi(va) * sizeof(pt_entry_t)));
npde = (pa & PMAP_PA_MASK) | PG_RW | PG_V;
*pde = npde;
}
/*
* Enter a 4KB PTE mapping for the supplied VA/PA into the resume-time pmap.
*/
void
hibernate_enter_resume_4k_pte(vaddr_t va, paddr_t pa)
{
pt_entry_t *pde, npde;
/* Mappings entered here must be in the first 2MB VA */
KASSERT(va < NBPD_L2);
/* Map the page */
pde = (pt_entry_t *)(HIBERNATE_PT_LOW +
(pl1_pi(va) * sizeof(pt_entry_t)));
npde = (pa & PMAP_PA_MASK) | PG_RW | PG_V | PG_M | PG_U;
*pde = npde;
}
/*
* Translate a kernel virtual address to a physical address.
*/
int
_kvm_kvatop(kvm_t *kd, u_long va, paddr_t *pa)
{
cpu_kcore_hdr_t *cpu_kh;
paddr_t pde_pa, pte_pa;
u_long page_off;
pd_entry_t pde;
pt_entry_t pte;
if (ISALIVE(kd)) {
_kvm_err(kd, 0, "vatop called in live kernel!");
return (0);
}
page_off = va & (kd->nbpg - 1);
if (va >= PMAP_DIRECT_BASE && va <= PMAP_DIRECT_END) {
*pa = va - PMAP_DIRECT_BASE;
return (int)(kd->nbpg - page_off);
}
cpu_kh = kd->cpu_data;
/*
* Find and read all entries to get to the pa.
*/
/*
* Level 4.
*/
pde_pa = cpu_kh->ptdpaddr + (pl4_pi(va) * sizeof(pd_entry_t));
if (pread(kd->pmfd, (void *)&pde, sizeof(pde),
_kvm_pa2off(kd, pde_pa)) != sizeof(pde)) {
_kvm_syserr(kd, 0, "could not read PT level 4 entry");
goto lose;
}
if ((pde & PG_V) == 0) {
_kvm_err(kd, 0, "invalid translation (invalid level 4 PDE)");
goto lose;
}
/*
* Level 3.
*/
pde_pa = (pde & PG_FRAME) + (pl3_pi(va) * sizeof(pd_entry_t));
if (pread(kd->pmfd, (void *)&pde, sizeof(pde),
_kvm_pa2off(kd, pde_pa)) != sizeof(pde)) {
_kvm_syserr(kd, 0, "could not read PT level 3 entry");
goto lose;
}
if ((pde & PG_V) == 0) {
_kvm_err(kd, 0, "invalid translation (invalid level 3 PDE)");
goto lose;
}
/*
* Level 2.
*/
pde_pa = (pde & PG_FRAME) + (pl2_pi(va) * sizeof(pd_entry_t));
if (pread(kd->pmfd, (void *)&pde, sizeof(pde),
_kvm_pa2off(kd, pde_pa)) != sizeof(pde)) {
_kvm_syserr(kd, 0, "could not read PT level 2 entry");
goto lose;
}
if ((pde & PG_V) == 0) {
_kvm_err(kd, 0, "invalid translation (invalid level 2 PDE)");
goto lose;
}
/*
* Might be a large page.
*/
if ((pde & PG_PS) != 0) {
page_off = va & (NBPD_L2 - 1);
*pa = (pde & PG_LGFRAME) | page_off;
return (int)(NBPD_L2 - page_off);
}
/*
* Level 1.
*/
pte_pa = (pde & PG_FRAME) + (pl1_pi(va) * sizeof(pt_entry_t));
if (pread(kd->pmfd, (void *) &pte, sizeof(pte),
_kvm_pa2off(kd, pte_pa)) != sizeof(pte)) {
_kvm_syserr(kd, 0, "could not read PTE");
goto lose;
}
/*
* Validate the PTE and return the physical address.
*/
if ((pte & PG_V) == 0) {
_kvm_err(kd, 0, "invalid translation (invalid PTE)");
goto lose;
}
*pa = (pte & PG_FRAME) + page_off;
return (int)(kd->nbpg - page_off);
lose:
*pa = (u_long)~0L;
return (0);
}
/*
* Used to translate a virtual address to a physical address for systems
* running under PAE mode. Three levels of virtual memory pages are handled
* here: the per-CPU L3 page, the 4 L2 PDs and the PTs.
*/
int
_kvm_kvatop_i386pae(kvm_t *kd, vaddr_t va, paddr_t *pa)
{
cpu_kcore_hdr_t *cpu_kh;
u_long page_off;
pd_entry_t pde;
pt_entry_t pte;
paddr_t pde_pa, pte_pa;
cpu_kh = kd->cpu_data;
page_off = va & PGOFSET;
/*
* Find and read the PDE. Ignore the L3, as it is only a per-CPU
* page, not needed for kernel VA => PA translations.
* Remember that the 4 L2 pages are contiguous, so it is safe
* to increment pdppaddr to compute the address of the PDE.
* pdppaddr being PAGE_SIZE aligned, we mask the option bits.
*/
pde_pa = (cpu_kh->pdppaddr & PG_FRAME) + (pl2_pi(va) * sizeof(pde));
if (_kvm_pread(kd, kd->pmfd, (void *)&pde, sizeof(pde),
_kvm_pa2off(kd, pde_pa)) != sizeof(pde)) {
_kvm_syserr(kd, 0, "could not read PDE");
goto lose;
}
/*
* Find and read the page table entry.
*/
if ((pde & PG_V) == 0) {
_kvm_err(kd, 0, "invalid translation (invalid PDE)");
goto lose;
}
if ((pde & PG_PS) != 0) {
/*
* This is a 2MB page.
*/
page_off = va & ((vaddr_t)~PG_LGFRAME);
*pa = (pde & PG_LGFRAME) + page_off;
return (int)(NBPD_L2 - page_off);
}
pte_pa = (pde & PG_FRAME) + (pl1_pi(va) * sizeof(pt_entry_t));
if (_kvm_pread(kd, kd->pmfd, (void *) &pte, sizeof(pte),
_kvm_pa2off(kd, pte_pa)) != sizeof(pte)) {
_kvm_syserr(kd, 0, "could not read PTE");
goto lose;
}
/*
* Validate the PTE and return the physical address.
*/
if ((pte & PG_V) == 0) {
_kvm_err(kd, 0, "invalid translation (invalid PTE)");
goto lose;
}
*pa = (pte & PG_FRAME) + page_off;
return (int)(NBPG - page_off);
lose:
*pa = (paddr_t)~0L;
return 0;
}
