Ejemplo n.º 1
0
static void
sb_intr_init(int cpuid)
{
    int intrnum, intsrc;

    /*
     * Disable all sources to the interrupt mapper and setup the mapping
     * between an interrupt source and the mips hard interrupt number.
     */
    for (intsrc = 0; intsrc < NUM_INTSRC; ++intsrc) {
        intrnum = sb_route_intsrc(intsrc);
        sb_disable_intsrc(cpuid, intsrc);
        sb_write_intmap(cpuid, intsrc, intrnum);
#ifdef SMP
        /*
         * Set up the mailbox interrupt mapping.
         *
         * The mailbox interrupt is "special" in that it is not shared
         * with any other interrupt source.
         */
        if (intsrc == INTSRC_MAILBOX3) {
            intrnum = platform_ipi_intrnum();
            sb_write_intmap(cpuid, INTSRC_MAILBOX3, intrnum);
            sb_enable_intsrc(cpuid, INTSRC_MAILBOX3);
        }
#endif
    }
}
Ejemplo n.º 2
0
void
platform_init_ap(int cpuid)
{
	unsigned ciu_int_mask, clock_int_mask, ipi_int_mask;

	/*
	 * Set the exception base.
	 */
	mips_wr_ebase(0x80000000);

	/*
	 * Clear any pending IPIs.
	 */
	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff);

	/*
	 * Set up interrupts.
	 */
	octeon_ciu_reset();

	/*
	 * Unmask the clock, ipi and ciu interrupts.
	 */
	ciu_int_mask = hard_int_mask(0);
	clock_int_mask = hard_int_mask(5);
	ipi_int_mask = hard_int_mask(platform_ipi_intrnum());
	set_intr_mask(ciu_int_mask | clock_int_mask | ipi_int_mask);

	mips_wbflush();
}
Ejemplo n.º 3
0
void
platform_init_ap(int cpuid)
{
	int ipi_int_mask, clock_int_mask;

	/*
	 * Unmask the clock and ipi interrupts.
	 */
	clock_int_mask = hard_int_mask(5);
	ipi_int_mask = hard_int_mask(platform_ipi_intrnum());
	set_intr_mask(ipi_int_mask | clock_int_mask);
}
Ejemplo n.º 4
0
void
platform_init_ap(int cpuid)
{
    int ipi_int_mask, clock_int_mask;

    KASSERT(cpuid == 1, ("AP has an invalid cpu id %d", cpuid));

    /*
     * Make sure that kseg0 is mapped cacheable-coherent
     */
    kseg0_map_coherent();

    sb_intr_init(cpuid);

    /*
     * Unmask the clock and ipi interrupts.
     */
    clock_int_mask = hard_int_mask(5);
    ipi_int_mask = hard_int_mask(platform_ipi_intrnum());
    set_intr_mask(ipi_int_mask | clock_int_mask);
}
Ejemplo n.º 5
0
int
sb_route_intsrc(int intsrc)
{
	int intrnum;

	KASSERT(intsrc >= 0 && intsrc < NUM_INTSRC,
		("Invalid interrupt source number (%d)", intsrc));

	/*
	 * Interrupt 5 is used by sources internal to the CPU (e.g. timer).
	 * Use a deterministic mapping for the remaining sources.
	 */
#ifdef SMP
	KASSERT(platform_ipi_intrnum() == 4,
		("Unexpected interrupt number used for IPI"));
	intrnum = intsrc % 4;
#else
	intrnum = intsrc % 5;
#endif

	return (intrnum);
}