static int sgaclk_freq(void)
{
u32 soc0pll = prcmu_read(PRCMU_PLLSOC0);
u32 sgaclk = prcmu_read(PRCMU_SGACLK);
if (!(sgaclk & BIT(5)))
return 0;
if (!(sgaclk & 0xf))
return 0;
return (pllsoc0_freq(soc0pll) / (sgaclk & 0xf));
}
/* Check if the other CPU is in WFI */
bool ux500_pm_other_cpu_wfi(void)
{
if (smp_processor_id()) {
/* We are CPU 1 => check if CPU0 is in WFI */
if (prcmu_read(PRCM_ARM_WFI_STANDBY) &
PRCM_ARM_WFI_STANDBY_CPU0_WFI)
return true;
} else {
/* We are CPU 0 => check if CPU1 is in WFI */
if (prcmu_read(PRCM_ARM_WFI_STANDBY) &
PRCM_ARM_WFI_STANDBY_CPU1_WFI)
return true;
}
return false;
}
static bool u8500_pm_prcmu_pending_interrupt(u32 *pending_irq)
{
u32 it;
u32 im;
int i;
for (i = 0; i < U8500_GIC_DIST_SPI_REGS_NB; i++) { /* There are 4 registers */
it = prcmu_read(PRCM_ARMITVAL31TO0 + i * 4);
im = prcmu_read(PRCM_ARMITMSK31TO0 + i * 4);
if (it & im) { /* Return first pending interrupt */
if (pending_irq)
*pending_irq = i * 32 + __ffs(it & im);
return true;
}
}
return false;
}
/* Decouple GIC from the interrupt bus */
void ux500_pm_gic_decouple(void)
{
prcmu_write_masked(PRCM_A9_MASK_REQ,
PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ);
(void)prcmu_read(PRCM_A9_MASK_REQ);
/* TODO: Use the ack bit when possible */
udelay(GIC_FREEZE_DELAY); /* Wait for the GIC to freeze */
}
static bool ux540_pm_prcmu_pending_interrupt(u32 *pending_irq)
{
u32 it;
u32 im;
int i, j;
if (u8500_pm_prcmu_pending_interrupt(pending_irq))
return true;
i = U8500_GIC_DIST_SPI_REGS_NB;
for (j = 0; i < U9540_GIC_DIST_SPI_REGS_NB; i++, j++) {
it = prcmu_read(PRCM_ARMITVAL159TO128 + j * 4);
im = prcmu_read(PRCM_ARMITMSK159TO128 + j * 4);
if (it & im) { /* Return first pending interrupt */
if (pending_irq)
*pending_irq = i * 32 + __ffs(it & im);
return true;
}
}
return false;
}
static void release_link_reset(u8 link)
{
u32 value;
value = prcmu_read(DB8500_PRCM_DSI_SW_RESET);
switch (link) {
case 0:
value |= DB8500_PRCM_DSI_SW_RESET_DSI0_SW_RESETN;
break;
case 1:
value |= DB8500_PRCM_DSI_SW_RESET_DSI1_SW_RESETN;
break;
case 2:
value |= DB8500_PRCM_DSI_SW_RESET_DSI2_SW_RESETN;
break;
default:
break;
}
prcmu_write(DB8500_PRCM_DSI_SW_RESET, value);
}
