void instruction_smrd(int opcode) {
union si_inst_microcode_t instr;
instr.smrd.offset = opvals.offset;
instr.smrd.imm = opvals.imm;
instr.smrd.sbase = opvals.sbase;
instr.smrd.sdst = opvals.sdest % configs.scalar_reg;
instr.smrd.op = opcode;
instr.smrd.enc = 0x18; // 1 1000
// s_movk_i32 to sbase*2
opvals.sdest = opvals.sbase*2;
opvals.imm16 = 0;
instruction_sopk(0);
// s_mov_b32 with lit_cnst to sbase*2 + 1
opvals.sdest = opvals.sbase*2 + 1;
opvals.ssrc0 = 255;
opvals.lit_cnst = (rand() % MAX_IMM_VAL) * 65536;
instruction_sop1(3);
// s_movk_i32 to offset (may refer sreg)
opvals.sdest = opvals.offset;
opvals.imm16 = rand() % MAX_IMM_VAL;
instruction_sopk(0);
printInstruction32(&instr);
}
void instruction_sopp_endpgm() {
union si_inst_microcode_t instr;
instr.sopp.simm16 = 0;
instr.sopp.op = 1;
instr.sopp.enc = 0x17F; // 1 0111 1111
printInstruction32(&instr);
}
void instruction_sopk(int opcode) {
union si_inst_microcode_t instr;
instr.sopk.simm16 = opvals.imm16;
instr.sopk.sdst = opvals.sdest;
instr.sopk.op = opcode;
instr.sopk.enc = 0xB; // 1011
printInstruction32(&instr);
}
void instruction_vopc(int opcode) {
union si_inst_microcode_t instr;
instr.vopc.src0 = opvals.src0;
instr.vopc.vsrc1 = opvals.vsrc1;
instr.vopc.op = opcode;
instr.vopc.enc = 0x3E; // 011 1110
instr.vopc.lit_cnst = opvals.lit_cnst;
if(instr.vopc.src0 == 255) printInstruction64(&instr);
else printInstruction32(&instr);
}
void instruction_vop1(int opcode) {
union si_inst_microcode_t instr;
instr.vop1.src0 = opvals.src0;
instr.vop1.op = opcode;
instr.vop1.vdst = opvals.vdest;
instr.vop1.enc = 0x3F; // 011 1111
instr.vop1.lit_cnst = opvals.lit_cnst;
if(instr.vop1.src0 == 255) printInstruction64(&instr);
else printInstruction32(&instr);
}
void instruction_sop1(int opcode) {
union si_inst_microcode_t instr;
instr.sop1.ssrc0 = (opcode == 0x24 || opcode == 0x04) ? (rand()%configs.scalar_reg/2)*2 : opvals.ssrc0;
instr.sop1.op = opcode;
instr.sop1.sdst = (opcode == 0x24 || opcode == 0x04) ? (rand()%configs.scalar_reg/2)*2 : opvals.sdest;
instr.sop1.enc = 0x17D; // 1 0111 1101
instr.sop1.lit_cnst = opvals.lit_cnst;
if(instr.sop1.ssrc0 == 255) printInstruction64(&instr);
else printInstruction32(&instr);
}
void instruction_sopp(int opcode) {
union si_inst_microcode_t instr;
instr.sopp.simm16 = (opcode == 1) ? 0 : (opvals.imm16%5);
instr.sopp.op = opcode;
instr.sopp.enc = 0x17F; // 1 0111 1111
randomizeOperand();
instruction_vop2(0x25);
printInstruction32(&instr);
add5scalarinstrs();
}
void instruction_vop2(int opcode) {
union si_inst_microcode_t instr;
instr.vop2.src0 = opvals.src0;
instr.vop2.vsrc1 = opvals.vsrc1;
instr.vop2.vdst = opvals.vdest;
instr.vop2.op = opcode;
instr.vop2.enc = 0x0; // 0
instr.vop2.lit_cnst = opvals.lit_cnst;
if(instr.vop2.src0 == 255) printInstruction64(&instr);
else printInstruction32(&instr);
}
void instruction_sopc(int opcode) {
union si_inst_microcode_t instr;
instr.sopc.ssrc0 = opvals.sdest;
instr.sopc.ssrc1 = opvals.ssrc1;
instr.sopc.op = opcode;
instr.sopc.enc = 0x17E; // 1 0111 1110
instr.sopc.lit_cnst = opvals.lit_cnst;
if(instr.sopc.ssrc0 == 255 || instr.sopc.ssrc1 == 255)
printInstruction64(&instr);
else printInstruction32(&instr);
}
void instruction_sop2(int opcode) {
union si_inst_microcode_t instr;
instr.sop2.ssrc0 = (opcode == 0x15 || opcode == 0x0F) ? (rand()%configs.scalar_reg/2)*2 : opvals.ssrc0;
instr.sop2.ssrc1 = (opcode == 0x15 || opcode == 0x0F) ? (rand()%configs.scalar_reg/2)*2 : opvals.ssrc1;
instr.sop2.sdst = (opcode == 0x15 || opcode == 0x0F) ? (rand()%configs.scalar_reg/2)*2 : opvals.sdest;
instr.sop2.op = opcode;
instr.sop2.enc = 0x2; // 10
instr.sop2.lit_cnst = opvals.lit_cnst;
if(instr.sop2.ssrc0 == 255 || instr.sop2.ssrc1 == 255)
printInstruction64(&instr);
else printInstruction32(&instr);
}
