static int sunxi_pwm_probe(struct platform_device *pdev)
{
int ret;
struct sunxi_pwm_chip*pwm;
pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
if(!pwm) {
dev_err(&pdev->dev, "failed to allocate memory!\n");
return -ENOMEM;
}
platform_set_drvdata(pdev, pwm);
pwm->chip.dev = &pdev->dev;
pwm->chip.ops = &sunxi_pwm_ops;
pwm->chip.base = -1;
pwm->chip.npwm = PWM_NUM;
ret = pwmchip_add(&pwm->chip);
if (ret < 0) {
dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
return ret;
}
return 0;
}
static int vt8500_pwm_probe(struct platform_device *pdev)
{
struct vt8500_chip *chip;
struct resource *r;
struct device_node *np = pdev->dev.of_node;
int ret;
if (!np) {
dev_err(&pdev->dev, "invalid devicetree node\n");
return -EINVAL;
}
chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
if (chip == NULL) {
dev_err(&pdev->dev, "failed to allocate memory\n");
return -ENOMEM;
}
chip->chip.dev = &pdev->dev;
chip->chip.ops = &vt8500_pwm_ops;
chip->chip.of_xlate = of_pwm_xlate_with_flags;
chip->chip.of_pwm_n_cells = 3;
chip->chip.base = -1;
chip->chip.npwm = VT8500_NR_PWMS;
chip->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(chip->clk)) {
dev_err(&pdev->dev, "clock source not specified\n");
return PTR_ERR(chip->clk);
}
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) {
dev_err(&pdev->dev, "no memory resource defined\n");
return -ENODEV;
}
chip->base = devm_ioremap_resource(&pdev->dev, r);
if (IS_ERR(chip->base))
return PTR_ERR(chip->base);
ret = clk_prepare(chip->clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to prepare clock\n");
return ret;
}
ret = pwmchip_add(&chip->chip);
if (ret < 0) {
dev_err(&pdev->dev, "failed to add PWM chip\n");
return ret;
}
platform_set_drvdata(pdev, chip);
return ret;
}
static int tpu_probe(struct platform_device *pdev)
{
struct tpu_device *tpu;
struct resource *res;
int ret;
tpu = devm_kzalloc(&pdev->dev, sizeof(*tpu), GFP_KERNEL);
if (tpu == NULL) {
dev_err(&pdev->dev, "failed to allocate driver data\n");
return -ENOMEM;
}
spin_lock_init(&tpu->lock);
tpu->pdev = pdev;
/* Initialize device configuration from platform data. */
tpu_parse_pdata(tpu);
/* Map memory, get clock and pin control. */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
tpu->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(tpu->base))
return PTR_ERR(tpu->base);
tpu->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(tpu->clk)) {
dev_err(&pdev->dev, "cannot get clock\n");
return PTR_ERR(tpu->clk);
}
/* Initialize and register the device. */
platform_set_drvdata(pdev, tpu);
tpu->chip.dev = &pdev->dev;
tpu->chip.ops = &tpu_pwm_ops;
tpu->chip.of_xlate = of_pwm_xlate_with_flags;
tpu->chip.of_pwm_n_cells = 3;
tpu->chip.base = -1;
tpu->chip.npwm = TPU_CHANNEL_MAX;
ret = pwmchip_add(&tpu->chip);
if (ret < 0) {
dev_err(&pdev->dev, "failed to register PWM chip\n");
return ret;
}
dev_info(&pdev->dev, "TPU PWM %d registered\n", tpu->pdev->id);
pm_runtime_enable(&pdev->dev);
return 0;
}
static int s3c_pwm_probe(struct platform_device *pdev)
{
static struct resource *pwm_mem;
struct device *dev = &pdev->dev;
struct s3c_chip *s3c;
int ret;
pwm_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (pwm_mem == NULL) {
dev_err(dev, "no memory resource specified\n");
return -ENOENT;
}
s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
if (s3c == NULL) {
dev_err(dev, "failed to allocate pwm_device\n");
ret = -ENOMEM;
return ret;
}
s3c->reg_base = devm_ioremap_resource(dev, pwm_mem);
if (!s3c->reg_base) {
dev_err(dev, "failed to map pwm registers\n");
ret = PTR_ERR(s3c->reg_base);
return ret;
}
ret = s3c_pwm_clk_init(pdev, s3c);
if (ret < 0) {
dev_err(dev, "failed to pwm clock init\n");
return ret;
}
s3c->pdev = pdev;
s3c->chip.dev = &pdev->dev;
s3c->chip.ops = &s3c_pwm_ops;
s3c->chip.of_xlate = of_pwm_xlate_with_flags;
s3c->chip.of_pwm_n_cells = 3;
s3c->chip.base = -1;
s3c->chip.npwm = NPWM;
s3c->pwm_type = s3c_pwm_get_driver_data(dev);
ret = pwmchip_add(&s3c->chip);
if (ret < 0) {
dev_err(dev, "failed to register pwm\n");
return ret;
}
platform_set_drvdata(pdev, s3c);
return 0;
}
static int brcmstb_pwm_probe(struct platform_device *pdev)
{
struct brcmstb_pwm *p;
struct resource *res;
int ret;
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
if (!p)
return -ENOMEM;
spin_lock_init(&p->lock);
p->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(p->clk)) {
dev_err(&pdev->dev, "failed to obtain clock\n");
return PTR_ERR(p->clk);
}
ret = clk_prepare_enable(p->clk);
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
return ret;
}
platform_set_drvdata(pdev, p);
p->chip.dev = &pdev->dev;
p->chip.ops = &brcmstb_pwm_ops;
p->chip.base = -1;
p->chip.npwm = 2;
p->chip.can_sleep = true;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
p->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(p->base)) {
ret = PTR_ERR(p->base);
goto out_clk;
}
ret = pwmchip_add(&p->chip);
if (ret) {
dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
goto out_clk;
}
return 0;
out_clk:
clk_disable_unprepare(p->clk);
return ret;
}
static int mxs_pwm_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct mxs_pwm_chip *mxs;
struct resource *res;
int ret;
mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL);
if (!mxs)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
mxs->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(mxs->base))
return PTR_ERR(mxs->base);
mxs->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(mxs->clk))
return PTR_ERR(mxs->clk);
mxs->chip.dev = &pdev->dev;
mxs->chip.ops = &mxs_pwm_ops;
mxs->chip.base = -1;
ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);
if (ret < 0) {
dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret);
return ret;
}
ret = pwmchip_add(&mxs->chip);
if (ret < 0) {
dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
return ret;
}
platform_set_drvdata(pdev, mxs);
ret = stmp_reset_block(mxs->base);
if (ret)
goto pwm_remove;
return 0;
pwm_remove:
pwmchip_remove(&mxs->chip);
return ret;
}
static int pca9685_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct pca9685_device *dev;
struct pca9685_pwm_chip *pc;
int ret;
if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
I2C_FUNC_SMBUS_I2C_BLOCK)) {
printk(KERN_ERR "%s: needed i2c functionality is not supported\n", __func__);
return -ENODEV;
}
dev = kzalloc(sizeof(struct pca9685_device), GFP_KERNEL);
if (dev == NULL) {
printk(KERN_ERR "%s: no memory\n", __func__);
return -ENOMEM;
}
dev->client = client;
i2c_set_clientdata(client, dev);
pc = kzalloc(sizeof(struct pca9685_pwm_chip), GFP_KERNEL);
if (pc == NULL) {
printk(KERN_ERR "%s: no memory\n", __func__);
return -ENOMEM;
}
pc->chip.dev = &client->dev;
pc->chip.ops = &pca9685_pwm_ops;
pc->chip.base = -1;
pc->chip.npwm = 16;
ret = pwmchip_add(&pc->chip);
if (ret < 0) {
pr_err("pwm-pca9685: pwmchip_add() failed: %d\n", ret);
return ret;
}
return 0;
}
static int twl6030_pwm_probe(struct platform_device *pdev)
{
struct twl6030_pwm_chip *twl6030;
int ret;
twl6030 = devm_kzalloc(&pdev->dev, sizeof(*twl6030), GFP_KERNEL);
if (!twl6030)
return -ENOMEM;
twl6030->chip.dev = &pdev->dev;
twl6030->chip.ops = &twl6030_pwm_ops;
twl6030->chip.base = -1;
twl6030->chip.npwm = 1;
ret = pwmchip_add(&twl6030->chip);
if (ret < 0)
return ret;
platform_set_drvdata(pdev, twl6030);
return 0;
}
static int lpc32xx_pwm_probe(struct platform_device *pdev)
{
struct lpc32xx_pwm_chip *lpc32xx;
struct resource *res;
int ret;
lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL);
if (!lpc32xx)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -EINVAL;
lpc32xx->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(lpc32xx->base))
return PTR_ERR(lpc32xx->base);
lpc32xx->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(lpc32xx->clk))
return PTR_ERR(lpc32xx->clk);
lpc32xx->chip.dev = &pdev->dev;
lpc32xx->chip.ops = &lpc32xx_pwm_ops;
lpc32xx->chip.npwm = 2;
lpc32xx->chip.base = -1;
ret = pwmchip_add(&lpc32xx->chip);
if (ret < 0) {
dev_err(&pdev->dev, "failed to add PWM chip, error %d\n", ret);
return ret;
}
platform_set_drvdata(pdev, lpc32xx);
return 0;
}
static int nuc970_pwm_probe(struct platform_device *pdev)
{
struct nuc970_chip *nuc970;
struct pinctrl *p;
int ret;
nuc970 = devm_kzalloc(&pdev->dev, sizeof(*nuc970), GFP_KERNEL);
if (nuc970 == NULL) {
dev_err(&pdev->dev, "failed to allocate memory for pwm_device\n");
return -ENOMEM;
}
/* calculate base of control bits in TCON */
nuc970->chip.dev = &pdev->dev;
nuc970->chip.ops = &nuc970_pwm_ops;
//nuc970->chip.of_xlate = of_pwm_xlate_with_flags;
//nuc970->chip.of_pwm_n_cells = 3;
nuc970->chip.base = pdev->id;
nuc970->chip.npwm = 1;
nuc970->clk = clk_get(NULL, "pwm");
if (IS_ERR(nuc970->clk)) {
dev_err(&pdev->dev, "failed to get pwm clock\n");
ret = PTR_ERR(nuc970->clk);
return ret;
}
clk_prepare(nuc970->clk);
clk_enable(nuc970->clk);
// all channel prescale output div by 1
__raw_writel(0x4444, REG_PWM_CSR);
if(pdev->id == 0) {
#if defined (CONFIG_NUC970_PWM0_PA12)
p = devm_pinctrl_get_select(&pdev->dev, "pwm0-PA");
#elif defined (CONFIG_NUC970_PWM0_PB2)
p = devm_pinctrl_get_select(&pdev->dev, "pwm0-PB");
#elif defined (CONFIG_NUC970_PWM0_PC14)
p = devm_pinctrl_get_select(&pdev->dev, "pwm0-PC");
#elif defined (CONFIG_NUC970_PWM0_PD12)
p = devm_pinctrl_get_select(&pdev->dev, "pwm0-PD");
#endif
#ifndef CONFIG_NUC970_PWM0_NONE
if(IS_ERR(p)) {
dev_err(&pdev->dev, "unable to reserve output pin\n");
}
#endif
}
if(pdev->id == 1) {
#if defined (CONFIG_NUC970_PWM1_PA13)
p = devm_pinctrl_get_select(&pdev->dev, "pwm1-PA");
#elif defined (CONFIG_NUC970_PWM1_PB3)
p = devm_pinctrl_get_select(&pdev->dev, "pwm1-PB");
#elif defined (CONFIG_NUC970_PWM1_PD13)
p = devm_pinctrl_get_select(&pdev->dev, "pwm1-PD");
#endif
#ifndef CONFIG_NUC970_PWM1_NONE
if(IS_ERR(p)) {
dev_err(&pdev->dev, "unable to reserve output pin\n");
}
#endif
}
if(pdev->id == 2) {
#if defined (CONFIG_NUC970_PWM2_PA14)
p = devm_pinctrl_get_select(&pdev->dev, "pwm2-PA");
#elif defined (CONFIG_NUC970_PWM2_PH2)
p = devm_pinctrl_get_select(&pdev->dev, "pwm2-PH");
#elif defined (CONFIG_NUC970_PWM2_PD14)
p = devm_pinctrl_get_select(&pdev->dev, "pwm2-PD");
#endif
#ifndef CONFIG_NUC970_PWM2_NONE
if(IS_ERR(p)) {
dev_err(&pdev->dev, "unable to reserve output pin\n");
}
#endif
}
if(pdev->id == 3) {
#if defined (CONFIG_NUC970_PWM3_PA15)
p = devm_pinctrl_get_select(&pdev->dev, "pwm3-PA");
#elif defined (CONFIG_NUC970_PWM3_PH3)
p = devm_pinctrl_get_select(&pdev->dev, "pwm3-PH");
#elif defined (CONFIG_NUC970_PWM3_PD15)
p = devm_pinctrl_get_select(&pdev->dev, "pwm3-PD");
#endif
#ifndef CONFIG_NUC970_PWM3_NONE
if(IS_ERR(p)) {
dev_err(&pdev->dev, "unable to reserve output pin\n");
}
#endif
}
ret = pwmchip_add(&nuc970->chip);
if (ret < 0) {
dev_err(&pdev->dev, "failed to register pwm\n");
goto err;
}
platform_set_drvdata(pdev, nuc970);
return 0;
err:
//clk_disable(nuc970->clk);
return ret;
}
static int s3c_pwm_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct s3c_chip *s3c;
unsigned long flags;
unsigned long tcon;
unsigned int id = pdev->id;
int ret;
if (id == 4) {
dev_err(dev, "TIMER4 is currently not supported\n");
return -ENXIO;
}
s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
if (s3c == NULL) {
dev_err(dev, "failed to allocate pwm_device\n");
return -ENOMEM;
}
/* calculate base of control bits in TCON */
s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
s3c->chip.dev = &pdev->dev;
s3c->chip.ops = &s3c_pwm_ops;
s3c->chip.base = -1;
s3c->chip.npwm = 1;
s3c->clk = devm_clk_get(dev, "pwm-tin");
if (IS_ERR(s3c->clk)) {
dev_err(dev, "failed to get pwm tin clk\n");
return PTR_ERR(s3c->clk);
}
s3c->clk_div = devm_clk_get(dev, "pwm-tdiv");
if (IS_ERR(s3c->clk_div)) {
dev_err(dev, "failed to get pwm tdiv clk\n");
return PTR_ERR(s3c->clk_div);
}
clk_enable(s3c->clk);
clk_enable(s3c->clk_div);
local_irq_save(flags);
tcon = __raw_readl(S3C2410_TCON);
tcon |= pwm_tcon_invert(s3c);
__raw_writel(tcon, S3C2410_TCON);
local_irq_restore(flags);
ret = pwmchip_add(&s3c->chip);
if (ret < 0) {
dev_err(dev, "failed to register pwm\n");
goto err_clk_tdiv;
}
pwm_dbg(s3c, "config bits %02x\n",
(__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
clk_get_rate(s3c->clk),
clk_get_rate(s3c->clk_div),
pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
platform_set_drvdata(pdev, s3c);
return 0;
err_clk_tdiv:
clk_disable(s3c->clk_div);
clk_disable(s3c->clk);
return ret;
}
