struct pipe_resource *r600_texture_create(struct pipe_screen *screen, const struct pipe_resource *templ) { struct r600_resource_texture *rtex; struct r600_resource *resource; struct r600_screen *rscreen = r600_screen(screen); rtex = CALLOC_STRUCT(r600_resource_texture); if (!rtex) { return NULL; } resource = &rtex->resource; resource->base.b = *templ; resource->base.vtbl = &r600_texture_vtbl; pipe_reference_init(&resource->base.b.reference, 1); resource->base.b.screen = screen; r600_setup_miptree(rscreen, rtex); /* FIXME alignment 4096 enought ? too much ? */ resource->domain = r600_domain_from_usage(resource->base.b.bind); resource->bo = radeon_bo(rscreen->rw, 0, rtex->size, 4096, NULL); if (resource->bo == NULL) { FREE(rtex); return NULL; } return &resource->base.b; }
static struct r600_resource_texture * r600_texture_create_object(struct pipe_screen *screen, const struct pipe_resource *base, unsigned array_mode, unsigned pitch_in_bytes_override, unsigned max_buffer_size, struct pb_buffer *buf, boolean alloc_bo, struct radeon_surface *surface) { struct r600_resource_texture *rtex; struct si_resource *resource; struct r600_screen *rscreen = (struct r600_screen*)screen; int r; rtex = CALLOC_STRUCT(r600_resource_texture); if (rtex == NULL) return NULL; resource = &rtex->resource; resource->b.b = *base; resource->b.vtbl = &r600_texture_vtbl; pipe_reference_init(&resource->b.b.reference, 1); resource->b.b.screen = screen; rtex->pitch_override = pitch_in_bytes_override; rtex->real_format = base->format; /* only mark depth textures the HW can hit as depth textures */ if (util_format_is_depth_or_stencil(rtex->real_format) && permit_hardware_blit(screen, base)) rtex->depth = 1; r600_setup_miptree(screen, rtex, array_mode); rtex->surface = *surface; r = r600_setup_surface(screen, rtex, array_mode, pitch_in_bytes_override); if (r) { FREE(rtex); return NULL; } /* Now create the backing buffer. */ if (!buf && alloc_bo) { struct pipe_resource *ptex = &rtex->resource.b.b; unsigned base_align = r600_get_base_alignment(screen, ptex->format, array_mode); base_align = rtex->surface.bo_alignment; if (!r600_init_resource(rscreen, resource, rtex->size, base_align, base->bind, base->usage)) { FREE(rtex); return NULL; } } else if (buf) { resource->buf = buf; resource->cs_buf = rscreen->ws->buffer_get_cs_handle(buf); resource->domains = RADEON_DOMAIN_GTT | RADEON_DOMAIN_VRAM; } return rtex; }