// DO NOT MODIFY THE CODE BELOW
int w3_node_init() {
int status;
int ret = XST_SUCCESS;
microblaze_enable_exceptions();
//Initialize the AD9512 clock buffers (RF reference and sampling clocks)
status = clk_init(CLK_BASEADDR, 2);
if(status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in clk_init (%d)\n", status);
ret = XST_FAILURE;
}
status = clk_config_dividers (CLK_BASEADDR, 2, CLK_SAMP_OUTSEL_AD_RFA);
if(status != XST_SUCCESS) {
xil_printf("wclk_config_dividers (%d)\n", status);
ret = XST_FAILURE;
}
//Initialize the AD9963 ADCs/DACs for on-board RF interfaces
ad_init(AD_BASEADDR, (RFA_AD_CS | RFB_AD_CS), 2);
if(status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in ad_init (%d)\n", status);
ret = XST_FAILURE;
}
//Initialize the radio_controller core and MAX2829 transceivers for on-board RF interfaces
status = radio_controller_init(RC_BASEADDR, (RC_RFA | RC_RFB), 1, 1);
if(status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in radioController_initialize (%d)\n", status);
ret = XST_FAILURE;
}
return ret;
}
int w3_node_init() {
int status;
u8 CMswitch;
XTmrCtr *TmrCtrInstancePtr = &TimerCounter;
int ret = XST_SUCCESS;
microblaze_enable_exceptions();
//Initialize the AD9512 clock buffers (RF reference and sampling clocks)
CMswitch = clk_config_read_clkmod_status(CLK_BASEADDR);
status = clk_init(CLK_BASEADDR, 2);
if(status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in clk_init (%d)\n", status);
ret = XST_FAILURE;
}
//Configure this node's clock inputs and outputs, based on the state of the CM-MMCX switch
// If no CM-MMCX is present, CMswitch will read as 0x3 (on-board clock sources, off-board outputs disabled)
switch(CMswitch){
// RF | Sample | Outputs
case 0x0: // Off-Board | Off-Board | Off
clk_config_outputs(CLK_BASEADDR, CLK_OUTPUT_OFF, (CLK_SAMP_OUTSEL_CLKMODHDR | CLK_RFREF_OUTSEL_CLKMODHDR));
clk_config_input_rf_ref(CLK_BASEADDR, CLK_INSEL_CLKMOD);
xil_printf("\nClock config %d:\n RF: Off-board\n Samp: Off-board\n Off-board Outputs: Disabled\n\n", CMswitch);
break;
case 0x1: // Off-Board | On-Board | Off
clk_config_outputs(CLK_BASEADDR, CLK_OUTPUT_OFF, (CLK_SAMP_OUTSEL_CLKMODHDR | CLK_RFREF_OUTSEL_CLKMODHDR));
clk_config_input_rf_ref(CLK_BASEADDR, CLK_INSEL_CLKMOD);
xil_printf("\nClock config %d:\n RF: Off-board\n Samp: On-board\n Off-board Outputs: Disabled\n\n", CMswitch);
break;
case 0x2: // On-Board | On-Board | On
clk_config_outputs(CLK_BASEADDR, CLK_OUTPUT_ON, (CLK_SAMP_OUTSEL_CLKMODHDR | CLK_RFREF_OUTSEL_CLKMODHDR));
clk_config_dividers(CLK_BASEADDR, 1, CLK_SAMP_OUTSEL_CLKMODHDR | CLK_RFREF_OUTSEL_CLKMODHDR);
clk_config_input_rf_ref(CLK_BASEADDR, CLK_INSEL_ONBOARD);
xil_printf("\nClock config %d:\n RF: On-board\n Samp: On-board\n Off-board Outputs: Enabled\n\n", CMswitch);
break;
case 0x3: // On-Board | On-Board | Off
clk_config_outputs(CLK_BASEADDR, CLK_OUTPUT_OFF, (CLK_SAMP_OUTSEL_CLKMODHDR | CLK_RFREF_OUTSEL_CLKMODHDR));
clk_config_input_rf_ref(CLK_BASEADDR, CLK_INSEL_ONBOARD);
//xil_printf("\nClock config %d:\n RF: On-board\n Samp: On-board\n Off-board Outputs: Disabled\n\n", CMswitch);
break;
}
#ifdef WLAN_4RF_EN
//Turn on clocks to FMC
clk_config_outputs(CLK_BASEADDR, CLK_OUTPUT_ON, (CLK_SAMP_OUTSEL_FMC | CLK_RFREF_OUTSEL_FMC));
//FMC samp clock divider = 2 (40MHz sampling reference, same as on-board AD9963 ref clk)
clk_config_dividers(CLK_BASEADDR, 2, CLK_SAMP_OUTSEL_FMC);
//FMC RF ref clock divider = 2 (40MHz RF reference, same as on-board MAX2829 ref clk)
clk_config_dividers(CLK_BASEADDR, 2, CLK_RFREF_OUTSEL_FMC);
#endif
//Initialize the AD9963 ADCs/DACs for on-board RF interfaces
ad_init(AD_BASEADDR, AD_ALL_RF, 3);
xil_printf("AD Readback: 0x%08x\n", ad_spi_read(AD_BASEADDR, RFA_AD_CS, 0x32));
if(status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in ad_init (%d)\n", status);
ret = XST_FAILURE;
}
//Initialize the radio_controller core and MAX2829 transceivers for on-board RF interfaces
status = radio_controller_init(RC_BASEADDR, RC_ALL_RF, 1, 1);
if(status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in radioController_initialize (%d)\n", status);
//Comment out allow boot even if an RF interfce doesn't lock (hack for debugging - not for reference release)
ret = XST_FAILURE;
}
//Initialize the EEPROM read/write core
iic_eeprom_init(EEPROM_BASEADDR, 0x64);
#ifdef WLAN_4RF_EN
iic_eeprom_init(FMC_EEPROM_BASEADDR, 0x64);
#endif
//Initialize the timer counter
status = XTmrCtr_Initialize(TmrCtrInstancePtr, TMRCTR_DEVICE_ID);
if (status != XST_SUCCESS) {
xil_printf("w3_node_init: Error in XtmrCtr_Initialize (%d)\n", status);
ret = XST_FAILURE;
}
// Set timer 0 to into a "count down" mode
XTmrCtr_SetOptions(TmrCtrInstancePtr, 0, (XTC_DOWN_COUNT_OPTION));
//Give the PHY control of the red user LEDs (PHY counts 1-hot on SIGNAL errors)
//Note: Uncommenting this line will make the RED LEDs controlled by hardware.
//This will move the LEDs on PHY bad signal events
//userio_set_ctrlSrc_hw(USERIO_BASEADDR, W3_USERIO_CTRLSRC_LEDS_RED);
return ret;
}
