static CORE_ADDR
sparc32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
CORE_ADDR call_pc = (struct_return ? (bp_addr - 12) : (bp_addr - 8));
/* Set return address. */
regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, call_pc);
/* Set up function arguments. */
sp = sparc32_store_arguments (regcache, nargs, args, sp,
struct_return, struct_addr);
/* Allocate the 16-word window save area. */
sp -= 16 * 4;
/* Stack should be doubleword aligned at this point. */
gdb_assert (sp % 8 == 0);
/* Finally, update the stack pointer. */
regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
return sp;
}
static void
mips_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
/* Clear the syscall restart flag. */
if (mips_linux_restart_reg_p (gdbarch))
regcache_cooked_write_unsigned (regcache, MIPS_RESTART_REGNUM, 0);
}
static void
moxie_store_return_value (struct type *type, struct regcache *regcache,
const void *valbuf)
{
CORE_ADDR regval;
int len = TYPE_LENGTH (type);
/* Things always get returned in RET1_REGNUM, RET2_REGNUM. */
regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len);
regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval);
if (len > 4)
{
regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4, len - 4);
regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval);
}
}
static void
ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc);
/* Set special TRAP register to -1 to prevent the kernel from
messing with the PC we just installed, if we happen to be
within an interrupted system call that the kernel wants to
restart.
Note that after we return from the dummy call, the TRAP and
ORIG_R3 registers will be automatically restored, and the
kernel continues to restart the system call at this point. */
if (ppc_linux_trap_reg_p (gdbarch))
regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1);
}
static void
ft32_store_return_value (struct type *type, struct regcache *regcache,
const gdb_byte *valbuf)
{
struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR regval;
int len = TYPE_LENGTH (type);
/* Things always get returned in RET1_REGNUM, RET2_REGNUM. */
regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order);
regcache_cooked_write_unsigned (regcache, FT32_R0_REGNUM, regval);
if (len > 4)
{
regval = extract_unsigned_integer (valbuf + 4,
len - 4, byte_order);
regcache_cooked_write_unsigned (regcache, FT32_R1_REGNUM, regval);
}
}
static void
sparc64_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache));
ULONGEST state;
regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
regcache_cooked_write_unsigned (regcache, tdep->npc_regnum, pc + 4);
/* Clear the "in syscall" bit to prevent the kernel from
messing with the PCs we just installed, if we happen to be
within an interrupted system call that the kernel wants to
restart.
Note that after we return from the dummy call, the TSTATE et al.
registers will be automatically restored, and the kernel
continues to restart the system call at this point. */
regcache_cooked_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
state &= ~TSTATE_SYSCALL;
regcache_cooked_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
}
static void
i386_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
regcache_cooked_write_unsigned (regcache, I386_EIP_REGNUM, pc);
/* We must be careful with modifying the program counter. If we
just interrupted a system call, the kernel might try to restart
it when we resume the inferior. On restarting the system call,
the kernel will try backing up the program counter even though it
no longer points at the system call. This typically results in a
SIGSEGV or SIGILL. We can prevent this by writing `-1' in the
"orig_eax" pseudo-register.
Note that "orig_eax" is saved when setting up a dummy call frame.
This means that it is properly restored when that frame is
popped, and that the interrupted system call will be restarted
when we resume the inferior on return from a function call from
within GDB. In all other cases the system call will not be
restarted. */
regcache_cooked_write_unsigned (regcache, I386_LINUX_ORIG_EAX_REGNUM, -1);
}
static void
tilegx_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
regcache_cooked_write_unsigned (regcache, TILEGX_PC_REGNUM, pc);
/* We must be careful with modifying the program counter. If we
just interrupted a system call, the kernel might try to restart
it when we resume the inferior. On restarting the system call,
the kernel will try backing up the program counter even though it
no longer points at the system call. This typically results in a
SIGSEGV or SIGILL. We can prevent this by writing INT_SWINT_1_SIGRETURN
in the "faultnum" pseudo-register.
Note that "faultnum" is saved when setting up a dummy call frame.
This means that it is properly restored when that frame is
popped, and that the interrupted system call will be restarted
when we resume the inferior on return from a function call from
within GDB. In all other cases the system call will not be
restarted. */
regcache_cooked_write_unsigned (regcache, TILEGX_FAULTNUM_REGNUM,
INT_SWINT_1_SIGRETURN);
}
/* Write into appropriate registers a function return value of type
TYPE, given in virtual format. */
static void
lm32_store_return_value (struct type *type, struct regcache *regcache,
const gdb_byte *valbuf)
{
ULONGEST val;
int len = TYPE_LENGTH (type);
if (len <= 4)
{
val = extract_unsigned_integer (valbuf, len);
regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
}
else if (len <= 8)
{
val = extract_unsigned_integer (valbuf, 4);
regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
val = extract_unsigned_integer (valbuf + 4, len - 4);
regcache_cooked_write_unsigned (regcache, SIM_LM32_R2_REGNUM, val);
}
else
error (_("lm32_store_return_value: type length too large."));
}
static void
enable_watchpoints_in_psr (ptid_t ptid)
{
struct regcache *regcache = get_thread_regcache (ptid);
ULONGEST psr;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
if (!(psr & IA64_PSR_DB))
{
psr |= IA64_PSR_DB; /* Set the db bit - this enables hardware
watchpoints and breakpoints. */
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
}
}
static void
m88k_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
/* According to the MC88100 RISC Microprocessor User's Manual,
section 6.4.3.1.2:
"... can be made to return to a particular instruction by placing
a valid instruction address in the SNIP and the next sequential
instruction address in the SFIP (with V bits set and E bits
clear). The rte resumes execution at the instruction pointed to
by the SNIP, then the SFIP."
The E bit is the least significant bit (bit 0). The V (valid)
bit is bit 1. This is why we logical or 2 into the values we are
writing below. It turns out that SXIP plays no role when
returning from an exception so nothing special has to be done
with it. We could even (presumably) give it a totally bogus
value. */
regcache_cooked_write_unsigned (regcache, M88K_SXIP_REGNUM, pc);
regcache_cooked_write_unsigned (regcache, M88K_SNIP_REGNUM, pc | 2);
regcache_cooked_write_unsigned (regcache, M88K_SFIP_REGNUM, (pc + 4) | 2);
}
static CORE_ADDR
vax_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
struct value **args, CORE_ADDR sp,
function_call_return_method return_method,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR fp = sp;
gdb_byte buf[4];
/* Set up the function arguments. */
sp = vax_store_arguments (regcache, nargs, args, sp);
/* Store return value address. */
if (return_method == return_method_struct)
regcache_cooked_write_unsigned (regcache, VAX_R1_REGNUM, struct_addr);
/* Store return address in the PC slot. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, bp_addr);
write_memory (sp, buf, 4);
/* Store the (fake) frame pointer in the FP slot. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, fp);
write_memory (sp, buf, 4);
/* Skip the AP slot. */
sp -= 4;
/* Store register save mask and control bits. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, 0);
write_memory (sp, buf, 4);
/* Store condition handler. */
sp -= 4;
store_unsigned_integer (buf, 4, byte_order, 0);
write_memory (sp, buf, 4);
/* Update the stack pointer and frame pointer. */
store_unsigned_integer (buf, 4, byte_order, sp);
regcache->cooked_write (VAX_SP_REGNUM, buf);
regcache->cooked_write (VAX_FP_REGNUM, buf);
/* Return the saved (fake) frame pointer. */
return fp;
}
/* Write into appropriate registers a function return value of type
TYPE, given in virtual format. */
static void
lm32_store_return_value (struct type *type, struct regcache *regcache,
const gdb_byte *valbuf)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST val;
int len = TYPE_LENGTH (type);
if (len <= 4)
{
val = extract_unsigned_integer (valbuf, len, byte_order);
regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
}
else if (len <= 8)
{
val = extract_unsigned_integer (valbuf, 4, byte_order);
regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
val = extract_unsigned_integer (valbuf + 4, len - 4, byte_order);
regcache_cooked_write_unsigned (regcache, SIM_LM32_R2_REGNUM, val);
}
else
error (_("lm32_store_return_value: type length too large."));
}
static void
ia64_linux_write_pc (struct regcache *regcache, CORE_ADDR pc)
{
ia64_write_pc (regcache, pc);
/* We must be careful with modifying the instruction-pointer: if we
just interrupt a system call, the kernel would ordinarily try to
restart it when we resume the inferior, which typically results
in SIGSEGV or SIGILL. We prevent this by clearing r10, which
will tell the kernel that r8 does NOT contain a valid error code
and hence it will skip system-call restart.
The clearing of r10 is safe as long as ia64_write_pc() is only
called as part of setting up an inferior call. */
regcache_cooked_write_unsigned (regcache, IA64_GR10_REGNUM, 0);
}
static void
i386fbsd_resume (struct target_ops *ops,
ptid_t ptid, int step, enum gdb_signal signal)
{
pid_t pid = ptid_get_pid (ptid);
int request = PT_STEP;
if (pid == -1)
/* Resume all threads. This only gets used in the non-threaded
case, where "resume all threads" and "resume inferior_ptid" are
the same. */
pid = ptid_get_pid (inferior_ptid);
if (!step)
{
struct regcache *regcache = get_current_regcache ();
ULONGEST eflags;
/* Workaround for a bug in FreeBSD. Make sure that the trace
flag is off when doing a continue. There is a code path
through the kernel which leaves the flag set when it should
have been cleared. If a process has a signal pending (such
as SIGALRM) and we do a PT_STEP, the process never really has
a chance to run because the kernel needs to notify the
debugger that a signal is being sent. Therefore, the process
never goes through the kernel's trap() function which would
normally clear it. */
regcache_cooked_read_unsigned (regcache, I386_EFLAGS_REGNUM,
&eflags);
if (eflags & 0x0100)
regcache_cooked_write_unsigned (regcache, I386_EFLAGS_REGNUM,
eflags & ~0x0100);
request = PT_CONTINUE;
}
/* An addres of (caddr_t) 1 tells ptrace to continue from where it
was. (If GDB wanted it to start some other way, we have already
written a new PC value to the child.) */
if (ptrace (request, pid, (caddr_t) 1,
gdb_signal_to_host (signal)) == -1)
perror_with_name (("ptrace"));
}
static int
ia64_linux_stopped_data_address (struct target_ops *ops, CORE_ADDR *addr_p)
{
CORE_ADDR psr;
siginfo_t siginfo;
struct regcache *regcache = get_current_regcache ();
if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
return 0;
if (siginfo.si_signo != SIGTRAP
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
return 0;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
psr |= IA64_PSR_DD; /* Set the dd bit - this will disable the watchpoint
for the next instruction. */
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
*addr_p = (CORE_ADDR) siginfo.si_addr;
return 1;
}
static void
ft32_write_pc (struct regcache *regcache, CORE_ADDR val)
{
regcache_cooked_write_unsigned (regcache, FT32_PC_REGNUM, val);
}
CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST saved_sp;
int argspace = 0; /* 0 is an initial wrong guess. */
int write_pass;
gdb_assert (tdep->wordsize == 4);
regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
&saved_sp);
/* Go through the argument list twice.
Pass 1: Figure out how much new stack space is required for
arguments and pushed values. Unlike the PowerOpen ABI, the SysV
ABI doesn't reserve any extra space for parameters which are put
in registers, but does always push structures and then pass their
address.
Pass 2: Replay the same computation but this time also write the
values out to the target. */
for (write_pass = 0; write_pass < 2; write_pass++)
{
int argno;
/* Next available floating point register for float and double
arguments. */
int freg = 1;
/* Next available general register for non-float, non-vector
arguments. */
int greg = 3;
/* Next available vector register for vector arguments. */
int vreg = 2;
/* Arguments start above the "LR save word" and "Back chain". */
int argoffset = 2 * tdep->wordsize;
/* Structures start after the arguments. */
int structoffset = argoffset + argspace;
/* If the function is returning a `struct', then the first word
(which will be passed in r3) is used for struct return
address. In that case we should advance one word and start
from r4 register to copy parameters. */
if (struct_return)
{
if (write_pass)
regcache_cooked_write_signed (regcache,
tdep->ppc_gp0_regnum + greg,
struct_addr);
greg++;
}
for (argno = 0; argno < nargs; argno++)
{
struct value *arg = args[argno];
struct type *type = check_typedef (value_type (arg));
int len = TYPE_LENGTH (type);
const bfd_byte *val = value_contents (arg);
if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
&& !tdep->soft_float)
{
/* Floating point value converted to "double" then
passed in an FP register, when the registers run out,
8 byte aligned stack is used. */
if (freg <= 8)
{
if (write_pass)
{
/* Always store the floating point value using
the register's floating-point format. */
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype
= register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
convert_typed_floating (val, type, regval, regtype);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg,
regval);
}
freg++;
}
else
{
/* The SysV ABI tells us to convert floats to
doubles before writing them to an 8 byte aligned
stack location. Unfortunately GCC does not do
that, and stores floats into 4 byte aligned
locations without converting them to doubles.
Since there is no know compiler that actually
follows the ABI here, we implement the GCC
convention. */
/* Align to 4 bytes or 8 bytes depending on the type of
the argument (float or double). */
argoffset = align_up (argoffset, len);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += len;
}
}
else if (TYPE_CODE (type) == TYPE_CODE_FLT
&& len == 16
&& !tdep->soft_float
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
{
/* IBM long double passed in two FP registers if
available, otherwise 8-byte aligned stack. */
if (freg <= 7)
{
if (write_pass)
{
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg,
val);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg + 1,
val + 8);
}
freg += 2;
}
else
{
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += 16;
}
}
else if (len == 8
&& (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
|| TYPE_CODE (type) == TYPE_CODE_FLT /* double */
|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
&& tdep->soft_float)))
{
/* "long long" or soft-float "double" or "_Decimal64"
passed in an odd/even register pair with the low
addressed word in the odd register and the high
addressed word in the even register, or when the
registers run out an 8 byte aligned stack
location. */
if (greg > 9)
{
/* Just in case GREG was 10. */
greg = 11;
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += 8;
}
else
{
/* Must start on an odd register - r3/r4 etc. */
if ((greg & 1) == 0)
greg++;
if (write_pass)
{
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 0,
val + 0);
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 1,
val + 4);
}
greg += 2;
}
}
else if (len == 16
&& ((TYPE_CODE (type) == TYPE_CODE_FLT
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
&& tdep->soft_float)))
{
/* Soft-float IBM long double or _Decimal128 passed in
four consecutive registers, or on the stack. The
registers are not necessarily odd/even pairs. */
if (greg > 7)
{
greg = 11;
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += 16;
}
else
{
if (write_pass)
{
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 0,
val + 0);
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 1,
val + 4);
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 2,
val + 8);
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 3,
val + 12);
}
greg += 4;
}
}
else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
&& !tdep->soft_float)
{
/* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
end up in memory. */
if (freg <= 8)
{
if (write_pass)
{
gdb_byte regval[MAX_REGISTER_SIZE];
const gdb_byte *p;
/* 32-bit decimal floats are right aligned in the
doubleword. */
if (TYPE_LENGTH (type) == 4)
{
memcpy (regval + 4, val, 4);
p = regval;
}
else
p = val;
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg, p);
}
freg++;
}
else
{
argoffset = align_up (argoffset, len);
if (write_pass)
/* Write value in the stack's parameter save area. */
write_memory (sp + argoffset, val, len);
argoffset += len;
}
}
else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
&& !tdep->soft_float)
{
/* 128-bit decimal floats go in f2 .. f7, always in even/odd
pairs. They can end up in memory, using two doublewords. */
if (freg <= 6)
{
/* Make sure freg is even. */
freg += freg & 1;
if (write_pass)
{
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg, val);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg + 1, val + 8);
}
}
else
{
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, 16);
argoffset += 16;
}
/* If a 128-bit decimal float goes to the stack because only f7
and f8 are free (thus there's no even/odd register pair
available), these registers should be marked as occupied.
Hence we increase freg even when writing to memory. */
freg += 2;
}
else if (len == 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& tdep->vector_abi == POWERPC_VEC_ALTIVEC)
{
/* Vector parameter passed in an Altivec register, or
when that runs out, 16 byte aligned stack location. */
if (vreg <= 13)
{
if (write_pass)
regcache_cooked_write (regcache,
tdep->ppc_vr0_regnum + vreg, val);
vreg++;
}
else
{
argoffset = align_up (argoffset, 16);
if (write_pass)
write_memory (sp + argoffset, val, 16);
argoffset += 16;
}
}
else if (len == 8
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& tdep->vector_abi == POWERPC_VEC_SPE)
{
/* Vector parameter passed in an e500 register, or when
that runs out, 8 byte aligned stack location. Note
that since e500 vector and general purpose registers
both map onto the same underlying register set, a
"greg" and not a "vreg" is consumed here. A cooked
write stores the value in the correct locations
within the raw register cache. */
if (greg <= 10)
{
if (write_pass)
regcache_cooked_write (regcache,
tdep->ppc_ev0_regnum + greg, val);
greg++;
}
else
{
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, 8);
argoffset += 8;
}
}
else
{
/* Reduce the parameter down to something that fits in a
"word". */
gdb_byte word[MAX_REGISTER_SIZE];
memset (word, 0, MAX_REGISTER_SIZE);
if (len > tdep->wordsize
|| TYPE_CODE (type) == TYPE_CODE_STRUCT
|| TYPE_CODE (type) == TYPE_CODE_UNION)
{
/* Structs and large values are put in an
aligned stack slot ... */
if (TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& len >= 16)
structoffset = align_up (structoffset, 16);
else
structoffset = align_up (structoffset, 8);
if (write_pass)
write_memory (sp + structoffset, val, len);
/* ... and then a "word" pointing to that address is
passed as the parameter. */
store_unsigned_integer (word, tdep->wordsize, byte_order,
sp + structoffset);
structoffset += len;
}
else if (TYPE_CODE (type) == TYPE_CODE_INT)
/* Sign or zero extend the "int" into a "word". */
store_unsigned_integer (word, tdep->wordsize, byte_order,
unpack_long (type, val));
else
/* Always goes in the low address. */
memcpy (word, val, len);
/* Store that "word" in a register, or on the stack.
The words have "4" byte alignment. */
if (greg <= 10)
{
if (write_pass)
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg, word);
greg++;
}
else
{
argoffset = align_up (argoffset, tdep->wordsize);
if (write_pass)
write_memory (sp + argoffset, word, tdep->wordsize);
argoffset += tdep->wordsize;
}
}
}
/* Compute the actual stack space requirements. */
if (!write_pass)
{
/* Remember the amount of space needed by the arguments. */
argspace = argoffset;
/* Allocate space for both the arguments and the structures. */
sp -= (argoffset + structoffset);
/* Ensure that the stack is still 16 byte aligned. */
sp = align_down (sp, 16);
}
/* The psABI says that "A caller of a function that takes a
variable argument list shall set condition register bit 6 to
1 if it passes one or more arguments in the floating-point
registers. It is strongly recommended that the caller set the
bit to 0 otherwise..." Doing this for normal functions too
shouldn't hurt. */
if (write_pass)
{
ULONGEST cr;
regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
if (freg > 1)
cr |= 0x02000000;
else
cr &= ~0x02000000;
regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
}
}
/* Update %sp. */
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
/* Write the backchain (it occupies WORDSIZED bytes). */
write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
return sp;
}
static CORE_ADDR
lm32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int first_arg_reg = SIM_LM32_R1_REGNUM;
int num_arg_regs = 8;
int i;
/* Set the return address. */
regcache_cooked_write_signed (regcache, SIM_LM32_RA_REGNUM, bp_addr);
/* If we're returning a large struct, a pointer to the address to
store it at is passed as a first hidden parameter. */
if (struct_return)
{
regcache_cooked_write_unsigned (regcache, first_arg_reg, struct_addr);
first_arg_reg++;
num_arg_regs--;
sp -= 4;
}
/* Setup parameters. */
for (i = 0; i < nargs; i++)
{
struct value *arg = args[i];
struct type *arg_type = check_typedef (value_type (arg));
gdb_byte *contents;
int len;
int j;
int reg;
ULONGEST val;
/* Promote small integer types to int. */
switch (TYPE_CODE (arg_type))
{
case TYPE_CODE_INT:
case TYPE_CODE_BOOL:
case TYPE_CODE_CHAR:
case TYPE_CODE_RANGE:
case TYPE_CODE_ENUM:
if (TYPE_LENGTH (arg_type) < 4)
{
arg_type = builtin_type (gdbarch)->builtin_int32;
arg = value_cast (arg_type, arg);
}
break;
}
/* FIXME: Handle structures. */
contents = (gdb_byte *) value_contents (arg);
len = TYPE_LENGTH (arg_type);
val = extract_unsigned_integer (contents, len, byte_order);
/* First num_arg_regs parameters are passed by registers,
and the rest are passed on the stack. */
if (i < num_arg_regs)
regcache_cooked_write_unsigned (regcache, first_arg_reg + i, val);
else
{
write_memory (sp, (void *) &val, len);
sp -= 4;
}
}
/* Update stack pointer. */
regcache_cooked_write_signed (regcache, SIM_LM32_SP_REGNUM, sp);
/* Return adjusted stack pointer. */
return sp;
}
static enum return_value_convention
do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
struct regcache *regcache, gdb_byte *readbuf,
const gdb_byte *writebuf, int broken_gcc)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_assert (tdep->wordsize == 4);
if (TYPE_CODE (type) == TYPE_CODE_FLT
&& TYPE_LENGTH (type) <= 8
&& !tdep->soft_float)
{
if (readbuf)
{
/* Floats and doubles stored in "f1". Convert the value to
the required type. */
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch,
tdep->ppc_fp0_regnum + 1);
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
convert_typed_floating (regval, regtype, readbuf, type);
}
if (writebuf)
{
/* Floats and doubles stored in "f1". Convert the value to
the register's "double" type. */
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
convert_typed_floating (writebuf, type, regval, regtype);
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_CODE (type) == TYPE_CODE_FLT
&& TYPE_LENGTH (type) == 16
&& !tdep->soft_float
&& (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
{
/* IBM long double stored in f1 and f2. */
if (readbuf)
{
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf);
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2,
readbuf + 8);
}
if (writebuf)
{
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf);
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2,
writebuf + 8);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) == 16
&& ((TYPE_CODE (type) == TYPE_CODE_FLT
&& (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double))
|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
{
/* Soft-float IBM long double or _Decimal128 stored in r3, r4,
r5, r6. */
if (readbuf)
{
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
readbuf + 4);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
readbuf + 8);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
readbuf + 12);
}
if (writebuf)
{
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
writebuf + 4);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
writebuf + 8);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
writebuf + 12);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
|| (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
|| (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
&& tdep->soft_float))
{
if (readbuf)
{
/* A long long, double or _Decimal64 stored in the 32 bit
r3/r4. */
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
readbuf + 0);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
readbuf + 4);
}
if (writebuf)
{
/* A long long, double or _Decimal64 stored in the 32 bit
r3/r4. */
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
writebuf + 0);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
writebuf + 4);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
writebuf);
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|| TYPE_CODE (type) == TYPE_CODE_BOOL
|| TYPE_CODE (type) == TYPE_CODE_PTR
|| TYPE_CODE (type) == TYPE_CODE_REF
|| TYPE_CODE (type) == TYPE_CODE_ENUM)
&& TYPE_LENGTH (type) <= tdep->wordsize)
{
if (readbuf)
{
/* Some sort of integer stored in r3. Since TYPE isn't
bigger than the register, sign extension isn't a problem
- just do everything unsigned. */
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
regval);
}
if (writebuf)
{
/* Some sort of integer stored in r3. Use unpack_long since
that should handle any required sign extension. */
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
unpack_long (type, writebuf));
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) == 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& tdep->vector_abi == POWERPC_VEC_ALTIVEC)
{
if (readbuf)
{
/* Altivec places the return value in "v2". */
regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
}
if (writebuf)
{
/* Altivec places the return value in "v2". */
regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) == 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& tdep->vector_abi == POWERPC_VEC_GENERIC)
{
/* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
GCC without AltiVec returns them in memory, but it warns about
ABI risks in that case; we don't try to support it. */
if (readbuf)
{
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
readbuf + 0);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
readbuf + 4);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5,
readbuf + 8);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6,
readbuf + 12);
}
if (writebuf)
{
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
writebuf + 0);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
writebuf + 4);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5,
writebuf + 8);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6,
writebuf + 12);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) == 8
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type)
&& tdep->vector_abi == POWERPC_VEC_SPE)
{
/* The e500 ABI places return values for the 64-bit DSP types
(__ev64_opaque__) in r3. However, in GDB-speak, ev3
corresponds to the entire r3 value for e500, whereas GDB's r3
only corresponds to the least significant 32-bits. So place
the 64-bit DSP type's value in ev3. */
if (readbuf)
regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
if (writebuf)
regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (broken_gcc && TYPE_LENGTH (type) <= 8)
{
/* GCC screwed up for structures or unions whose size is less
than or equal to 8 bytes.. Instead of left-aligning, it
right-aligns the data into the buffer formed by r3, r4. */
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
int len = TYPE_LENGTH (type);
int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
if (readbuf)
{
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (len > tdep->wordsize)
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
memcpy (readbuf, regvals + offset, len);
}
if (writebuf)
{
memset (regvals, 0, sizeof regvals);
memcpy (regvals + offset, writebuf, len);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (len > tdep->wordsize)
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) <= 8)
{
if (readbuf)
{
/* This matches SVr4 PPC, it does not match GCC. */
/* The value is right-padded to 8 bytes and then loaded, as
two "words", into r3/r4. */
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (TYPE_LENGTH (type) > tdep->wordsize)
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
memcpy (readbuf, regvals, TYPE_LENGTH (type));
}
if (writebuf)
{
/* This matches SVr4 PPC, it does not match GCC. */
/* The value is padded out to 8 bytes and then loaded, as
two "words" into r3/r4. */
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
memset (regvals, 0, sizeof regvals);
memcpy (regvals, writebuf, TYPE_LENGTH (type));
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (TYPE_LENGTH (type) > tdep->wordsize)
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
return RETURN_VALUE_STRUCT_CONVENTION;
}
static enum return_value_convention
rs6000_lynx178_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *valtype, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
/* The calling convention this function implements assumes the
processor has floating-point registers. We shouldn't be using it
on PowerPC variants that lack them. */
gdb_assert (ppc_floating_point_unit_p (gdbarch));
/* AltiVec extension: Functions that declare a vector data type as a
return value place that return value in VR2. */
if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
&& TYPE_LENGTH (valtype) == 16)
{
if (readbuf)
regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
if (writebuf)
regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* If the called subprogram returns an aggregate, there exists an
implicit first argument, whose value is the address of a caller-
allocated buffer into which the callee is assumed to store its
return value. All explicit parameters are appropriately
relabeled. */
if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|| TYPE_CODE (valtype) == TYPE_CODE_UNION
|| TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
return RETURN_VALUE_STRUCT_CONVENTION;
/* Scalar floating-point values are returned in FPR1 for float or
double, and in FPR1:FPR2 for quadword precision. Fortran
complex*8 and complex*16 are returned in FPR1:FPR2, and
complex*32 is returned in FPR1:FPR4. */
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
&& (TYPE_LENGTH (valtype) == 4 || TYPE_LENGTH (valtype) == 8))
{
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
gdb_byte regval[8];
/* FIXME: kettenis/2007-01-01: Add support for quadword
precision and complex. */
if (readbuf)
{
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
convert_typed_floating (regval, regtype, readbuf, valtype);
}
if (writebuf)
{
convert_typed_floating (writebuf, valtype, regval, regtype);
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Values of the types int, long, short, pointer, and char (length
is less than or equal to four bytes), as well as bit values of
lengths less than or equal to 32 bits, must be returned right
justified in GPR3 with signed values sign extended and unsigned
values zero extended, as necessary. */
if (TYPE_LENGTH (valtype) <= tdep->wordsize)
{
if (readbuf)
{
ULONGEST regval;
/* For reading we don't have to worry about sign extension. */
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), byte_order,
regval);
}
if (writebuf)
{
/* For writing, use unpack_long since that should handle any
required sign extension. */
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
unpack_long (valtype, writebuf));
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Eight-byte non-floating-point scalar values must be returned in
GPR3:GPR4. */
if (TYPE_LENGTH (valtype) == 8)
{
gdb_assert (TYPE_CODE (valtype) != TYPE_CODE_FLT);
gdb_assert (tdep->wordsize == 4);
if (readbuf)
{
gdb_byte regval[8];
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, regval);
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4,
regval + 4);
memcpy (readbuf, regval, 8);
}
if (writebuf)
{
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
writebuf + 4);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
return RETURN_VALUE_STRUCT_CONVENTION;
}
CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
CORE_ADDR func_addr = find_function_addr (function, NULL);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST back_chain;
/* See for-loop comment below. */
int write_pass;
/* Size of the Altivec's vector parameter region, the final value is
computed in the for-loop below. */
LONGEST vparam_size = 0;
/* Size of the general parameter region, the final value is computed
in the for-loop below. */
LONGEST gparam_size = 0;
/* Kevin writes ... I don't mind seeing tdep->wordsize used in the
calls to align_up(), align_down(), etc. because this makes it
easier to reuse this code (in a copy/paste sense) in the future,
but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
at some point makes it easier to verify that this function is
correct without having to do a non-local analysis to figure out
the possible values of tdep->wordsize. */
gdb_assert (tdep->wordsize == 8);
/* This function exists to support a calling convention that
requires floating-point registers. It shouldn't be used on
processors that lack them. */
gdb_assert (ppc_floating_point_unit_p (gdbarch));
/* By this stage in the proceedings, SP has been decremented by "red
zone size" + "struct return size". Fetch the stack-pointer from
before this and use that as the BACK_CHAIN. */
regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
&back_chain);
/* Go through the argument list twice.
Pass 1: Compute the function call's stack space and register
requirements.
Pass 2: Replay the same computation but this time also write the
values out to the target. */
for (write_pass = 0; write_pass < 2; write_pass++)
{
int argno;
/* Next available floating point register for float and double
arguments. */
int freg = 1;
/* Next available general register for non-vector (but possibly
float) arguments. */
int greg = 3;
/* Next available vector register for vector arguments. */
int vreg = 2;
/* The address, at which the next general purpose parameter
(integer, struct, float, ...) should be saved. */
CORE_ADDR gparam;
/* Address, at which the next Altivec vector parameter should be
saved. */
CORE_ADDR vparam;
if (!write_pass)
{
/* During the first pass, GPARAM and VPARAM are more like
offsets (start address zero) than addresses. That way
they accumulate the total stack space each region
requires. */
gparam = 0;
vparam = 0;
}
else
{
/* Decrement the stack pointer making space for the Altivec
and general on-stack parameters. Set vparam and gparam
to their corresponding regions. */
vparam = align_down (sp - vparam_size, 16);
gparam = align_down (vparam - gparam_size, 16);
/* Add in space for the TOC, link editor double word,
compiler double word, LR save area, CR save area. */
sp = align_down (gparam - 48, 16);
}
/* If the function is returning a `struct', then there is an
extra hidden parameter (which will be passed in r3)
containing the address of that struct.. In that case we
should advance one word and start from r4 register to copy
parameters. This also consumes one on-stack parameter slot. */
if (struct_return)
{
if (write_pass)
regcache_cooked_write_signed (regcache,
tdep->ppc_gp0_regnum + greg,
struct_addr);
greg++;
gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
}
for (argno = 0; argno < nargs; argno++)
{
struct value *arg = args[argno];
struct type *type = check_typedef (value_type (arg));
const bfd_byte *val = value_contents (arg);
if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
{
/* Floats and Doubles go in f1 .. f13. They also
consume a left aligned GREG,, and can end up in
memory. */
if (write_pass)
{
gdb_byte regval[MAX_REGISTER_SIZE];
const gdb_byte *p;
/* Version 1.7 of the 64-bit PowerPC ELF ABI says:
"Single precision floating point values are mapped to
the first word in a single doubleword."
And version 1.9 says:
"Single precision floating point values are mapped to
the second word in a single doubleword."
GDB then writes single precision floating point values
at both words in a doubleword, to support both ABIs. */
if (TYPE_LENGTH (type) == 4)
{
memcpy (regval, val, 4);
memcpy (regval + 4, val, 4);
p = regval;
}
else
p = val;
/* Write value in the stack's parameter save area. */
write_memory (gparam, p, 8);
if (freg <= 13)
{
struct type *regtype
= register_type (gdbarch, tdep->ppc_fp0_regnum);
convert_typed_floating (val, type, regval, regtype);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg,
regval);
}
if (greg <= 10)
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg,
regval);
}
freg++;
greg++;
/* Always consume parameter stack space. */
gparam = align_up (gparam + 8, tdep->wordsize);
}
else if (TYPE_CODE (type) == TYPE_CODE_FLT
&& TYPE_LENGTH (type) == 16
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
{
/* IBM long double stored in two doublewords of the
parameter save area and corresponding registers. */
if (write_pass)
{
if (!tdep->soft_float && freg <= 13)
{
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg,
val);
if (freg <= 12)
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg + 1,
val + 8);
}
if (greg <= 10)
{
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg,
val);
if (greg <= 9)
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg + 1,
val + 8);
}
write_memory (gparam, val, TYPE_LENGTH (type));
}
freg += 2;
greg += 2;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
&& TYPE_LENGTH (type) <= 8)
{
/* 32-bit and 64-bit decimal floats go in f1 .. f13. They can
end up in memory. */
if (write_pass)
{
gdb_byte regval[MAX_REGISTER_SIZE];
const gdb_byte *p;
/* 32-bit decimal floats are right aligned in the
doubleword. */
if (TYPE_LENGTH (type) == 4)
{
memcpy (regval + 4, val, 4);
p = regval;
}
else
p = val;
/* Write value in the stack's parameter save area. */
write_memory (gparam, p, 8);
if (freg <= 13)
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg, p);
}
freg++;
greg++;
/* Always consume parameter stack space. */
gparam = align_up (gparam + 8, tdep->wordsize);
}
else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT &&
TYPE_LENGTH (type) == 16)
{
/* 128-bit decimal floats go in f2 .. f12, always in even/odd
pairs. They can end up in memory, using two doublewords. */
if (write_pass)
{
if (freg <= 12)
{
/* Make sure freg is even. */
freg += freg & 1;
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg, val);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg + 1, val + 8);
}
write_memory (gparam, val, TYPE_LENGTH (type));
}
freg += 2;
greg += 2;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& tdep->ppc_vr0_regnum >= 0)
{
/* In the Altivec ABI, vectors go in the vector
registers v2 .. v13, or when that runs out, a vector
annex which goes above all the normal parameters.
NOTE: cagney/2003-09-21: This is a guess based on the
PowerOpen Altivec ABI. */
if (vreg <= 13)
{
if (write_pass)
regcache_cooked_write (regcache,
tdep->ppc_vr0_regnum + vreg, val);
vreg++;
}
else
{
if (write_pass)
write_memory (vparam, val, TYPE_LENGTH (type));
vparam = align_up (vparam + TYPE_LENGTH (type), 16);
}
}
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|| TYPE_CODE (type) == TYPE_CODE_ENUM
|| TYPE_CODE (type) == TYPE_CODE_BOOL
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|| TYPE_CODE (type) == TYPE_CODE_PTR
|| TYPE_CODE (type) == TYPE_CODE_REF)
&& TYPE_LENGTH (type) <= 8)
{
/* Scalars and Pointers get sign[un]extended and go in
gpr3 .. gpr10. They can also end up in memory. */
if (write_pass)
{
/* Sign extend the value, then store it unsigned. */
ULONGEST word = unpack_long (type, val);
/* Convert any function code addresses into
descriptors. */
if (TYPE_CODE (type) == TYPE_CODE_PTR
|| TYPE_CODE (type) == TYPE_CODE_REF)
{
struct type *target_type;
target_type = check_typedef (TYPE_TARGET_TYPE (type));
if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
|| TYPE_CODE (target_type) == TYPE_CODE_METHOD)
{
CORE_ADDR desc = word;
convert_code_addr_to_desc_addr (word, &desc);
word = desc;
}
}
if (greg <= 10)
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum +
greg, word);
write_memory_unsigned_integer (gparam, tdep->wordsize,
byte_order, word);
}
greg++;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
else
{
int byte;
for (byte = 0; byte < TYPE_LENGTH (type);
byte += tdep->wordsize)
{
if (write_pass && greg <= 10)
{
gdb_byte regval[MAX_REGISTER_SIZE];
int len = TYPE_LENGTH (type) - byte;
if (len > tdep->wordsize)
len = tdep->wordsize;
memset (regval, 0, sizeof regval);
/* The ABI (version 1.9) specifies that values
smaller than one doubleword are right-aligned
and those larger are left-aligned. GCC
versions before 3.4 implemented this
incorrectly; see
<http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
if (byte == 0)
memcpy (regval + tdep->wordsize - len,
val + byte, len);
else
memcpy (regval, val + byte, len);
regcache_cooked_write (regcache, greg, regval);
}
greg++;
}
if (write_pass)
{
/* WARNING: cagney/2003-09-21: Strictly speaking, this
isn't necessary, unfortunately, GCC appears to get
"struct convention" parameter passing wrong putting
odd sized structures in memory instead of in a
register. Work around this by always writing the
value to memory. Fortunately, doing this
simplifies the code. */
int len = TYPE_LENGTH (type);
if (len < tdep->wordsize)
write_memory (gparam + tdep->wordsize - len, val, len);
else
write_memory (gparam, val, len);
}
if (freg <= 13
&& TYPE_CODE (type) == TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type) == 1
&& TYPE_LENGTH (type) <= 16)
{
/* The ABI (version 1.9) specifies that structs
containing a single floating-point value, at any
level of nesting of single-member structs, are
passed in floating-point registers. */
while (TYPE_CODE (type) == TYPE_CODE_STRUCT
&& TYPE_NFIELDS (type) == 1)
type = check_typedef (TYPE_FIELD_TYPE (type, 0));
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
if (TYPE_LENGTH (type) <= 8)
{
if (write_pass)
{
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype
= register_type (gdbarch,
tdep->ppc_fp0_regnum);
convert_typed_floating (val, type, regval,
regtype);
regcache_cooked_write (regcache,
(tdep->ppc_fp0_regnum
+ freg),
regval);
}
freg++;
}
else if (TYPE_LENGTH (type) == 16
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
{
if (write_pass)
{
regcache_cooked_write (regcache,
(tdep->ppc_fp0_regnum
+ freg),
val);
if (freg <= 12)
regcache_cooked_write (regcache,
(tdep->ppc_fp0_regnum
+ freg + 1),
val + 8);
}
freg += 2;
}
}
}
/* Always consume parameter stack space. */
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
}
if (!write_pass)
{
/* Save the true region sizes ready for the second pass. */
vparam_size = vparam;
/* Make certain that the general parameter save area is at
least the minimum 8 registers (or doublewords) in size. */
if (greg < 8)
gparam_size = 8 * tdep->wordsize;
else
gparam_size = gparam;
}
}
/* Update %sp. */
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
/* Write the backchain (it occupies WORDSIZED bytes). */
write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
/* Use the func_addr to find the descriptor, and use that to find
the TOC. If we're calling via a function pointer, the pointer
itself identifies the descriptor. */
{
struct type *ftype = check_typedef (value_type (function));
CORE_ADDR desc_addr = value_as_address (function);
if (TYPE_CODE (ftype) == TYPE_CODE_PTR
|| convert_code_addr_to_desc_addr (func_addr, &desc_addr))
{
/* The TOC is the second double word in the descriptor. */
CORE_ADDR toc =
read_memory_unsigned_integer (desc_addr + tdep->wordsize,
tdep->wordsize, byte_order);
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum + 2, toc);
}
}
return sp;
}
static void
moxie_write_pc (struct regcache *regcache, CORE_ADDR val)
{
regcache_cooked_write_unsigned (regcache, MOXIE_PC_REGNUM, val);
}
static CORE_ADDR
mn10300_push_dummy_call (struct gdbarch *gdbarch,
struct value *target_func,
struct regcache *regcache,
CORE_ADDR bp_addr,
int nargs, struct value **args,
CORE_ADDR sp,
int struct_return,
CORE_ADDR struct_addr)
{
const int push_size = register_size (gdbarch, E_PC_REGNUM);
int regs_used;
int len, arg_len;
int stack_offset = 0;
int argnum;
char *val, valbuf[MAX_REGISTER_SIZE];
/* This should be a nop, but align the stack just in case something
went wrong. Stacks are four byte aligned on the mn10300. */
sp &= ~3;
/* Now make space on the stack for the args.
XXX This doesn't appear to handle pass-by-invisible reference
arguments. */
regs_used = struct_return ? 1 : 0;
for (len = 0, argnum = 0; argnum < nargs; argnum++)
{
arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
while (regs_used < 2 && arg_len > 0)
{
regs_used++;
arg_len -= push_size;
}
len += arg_len;
}
/* Allocate stack space. */
sp -= len;
if (struct_return)
{
regs_used = 1;
write_register (E_D0_REGNUM, struct_addr);
}
else
regs_used = 0;
/* Push all arguments onto the stack. */
for (argnum = 0; argnum < nargs; argnum++)
{
/* FIXME what about structs? Unions? */
if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
&& TYPE_LENGTH (value_type (*args)) > 8)
{
/* Change to pointer-to-type. */
arg_len = push_size;
store_unsigned_integer (valbuf, push_size,
VALUE_ADDRESS (*args));
val = &valbuf[0];
}
else
{
arg_len = TYPE_LENGTH (value_type (*args));
val = (char *) value_contents (*args);
}
while (regs_used < 2 && arg_len > 0)
{
write_register (regs_used,
extract_unsigned_integer (val, push_size));
val += push_size;
arg_len -= push_size;
regs_used++;
}
while (arg_len > 0)
{
write_memory (sp + stack_offset, val, push_size);
arg_len -= push_size;
val += push_size;
stack_offset += push_size;
}
args++;
}
/* Make space for the flushback area. */
sp -= 8;
/* Push the return address that contains the magic breakpoint. */
sp -= 4;
write_memory_unsigned_integer (sp, push_size, bp_addr);
/* Update $sp. */
regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
return sp;
}
CORE_ADDR
ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
CORE_ADDR func_addr = find_function_addr (function, NULL);
struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
/* By this stage in the proceedings, SP has been decremented by "red
zone size" + "struct return size". Fetch the stack-pointer from
before this and use that as the BACK_CHAIN. */
const CORE_ADDR back_chain = read_sp ();
/* See for-loop comment below. */
int write_pass;
/* Size of the Altivec's vector parameter region, the final value is
computed in the for-loop below. */
LONGEST vparam_size = 0;
/* Size of the general parameter region, the final value is computed
in the for-loop below. */
LONGEST gparam_size = 0;
/* Kevin writes ... I don't mind seeing tdep->wordsize used in the
calls to align_up(), align_down(), etc. because this makes it
easier to reuse this code (in a copy/paste sense) in the future,
but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
at some point makes it easier to verify that this function is
correct without having to do a non-local analysis to figure out
the possible values of tdep->wordsize. */
gdb_assert (tdep->wordsize == 8);
/* Go through the argument list twice.
Pass 1: Compute the function call's stack space and register
requirements.
Pass 2: Replay the same computation but this time also write the
values out to the target. */
for (write_pass = 0; write_pass < 2; write_pass++)
{
int argno;
/* Next available floating point register for float and double
arguments. */
int freg = 1;
/* Next available general register for non-vector (but possibly
float) arguments. */
int greg = 3;
/* Next available vector register for vector arguments. */
int vreg = 2;
/* The address, at which the next general purpose parameter
(integer, struct, float, ...) should be saved. */
CORE_ADDR gparam;
/* Address, at which the next Altivec vector parameter should be
saved. */
CORE_ADDR vparam;
if (!write_pass)
{
/* During the first pass, GPARAM and VPARAM are more like
offsets (start address zero) than addresses. That way
the accumulate the total stack space each region
requires. */
gparam = 0;
vparam = 0;
}
else
{
/* Decrement the stack pointer making space for the Altivec
and general on-stack parameters. Set vparam and gparam
to their corresponding regions. */
vparam = align_down (sp - vparam_size, 16);
gparam = align_down (vparam - gparam_size, 16);
/* Add in space for the TOC, link editor double word,
compiler double word, LR save area, CR save area. */
sp = align_down (gparam - 48, 16);
}
/* If the function is returning a `struct', then there is an
extra hidden parameter (which will be passed in r3)
containing the address of that struct.. In that case we
should advance one word and start from r4 register to copy
parameters. This also consumes one on-stack parameter slot. */
if (struct_return)
{
if (write_pass)
regcache_cooked_write_signed (regcache,
tdep->ppc_gp0_regnum + greg,
struct_addr);
greg++;
gparam = align_up (gparam + tdep->wordsize, tdep->wordsize);
}
for (argno = 0; argno < nargs; argno++)
{
struct value *arg = args[argno];
struct type *type = check_typedef (value_type (arg));
const bfd_byte *val = value_contents (arg);
if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8)
{
/* Floats and Doubles go in f1 .. f13. They also
consume a left aligned GREG,, and can end up in
memory. */
if (write_pass)
{
if (ppc_floating_point_unit_p (current_gdbarch)
&& freg <= 13)
{
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype
= register_type (gdbarch, tdep->ppc_fp0_regnum);
convert_typed_floating (val, type, regval, regtype);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + freg,
regval);
}
if (greg <= 10)
{
/* The ABI states "Single precision floating
point values are mapped to the first word in
a single doubleword" and "... floating point
values mapped to the first eight doublewords
of the parameter save area are also passed in
general registers").
This code interprets that to mean: store it,
left aligned, in the general register. */
gdb_byte regval[MAX_REGISTER_SIZE];
memset (regval, 0, sizeof regval);
memcpy (regval, val, TYPE_LENGTH (type));
regcache_cooked_write (regcache,
tdep->ppc_gp0_regnum + greg,
regval);
}
write_memory (gparam, val, TYPE_LENGTH (type));
}
/* Always consume parameter stack space. */
freg++;
greg++;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type)
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& tdep->ppc_vr0_regnum >= 0)
{
/* In the Altivec ABI, vectors go in the vector
registers v2 .. v13, or when that runs out, a vector
annex which goes above all the normal parameters.
NOTE: cagney/2003-09-21: This is a guess based on the
PowerOpen Altivec ABI. */
if (vreg <= 13)
{
if (write_pass)
regcache_cooked_write (regcache,
tdep->ppc_vr0_regnum + vreg, val);
vreg++;
}
else
{
if (write_pass)
write_memory (vparam, val, TYPE_LENGTH (type));
vparam = align_up (vparam + TYPE_LENGTH (type), 16);
}
}
else if ((TYPE_CODE (type) == TYPE_CODE_INT
|| TYPE_CODE (type) == TYPE_CODE_ENUM
|| TYPE_CODE (type) == TYPE_CODE_PTR)
&& TYPE_LENGTH (type) <= 8)
{
/* Scalars and Pointers get sign[un]extended and go in
gpr3 .. gpr10. They can also end up in memory. */
if (write_pass)
{
/* Sign extend the value, then store it unsigned. */
ULONGEST word = unpack_long (type, val);
/* Convert any function code addresses into
descriptors. */
if (TYPE_CODE (type) == TYPE_CODE_PTR
&& TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC)
{
CORE_ADDR desc = word;
convert_code_addr_to_desc_addr (word, &desc);
word = desc;
}
if (greg <= 10)
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum +
greg, word);
write_memory_unsigned_integer (gparam, tdep->wordsize,
word);
}
greg++;
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
else
{
int byte;
for (byte = 0; byte < TYPE_LENGTH (type);
byte += tdep->wordsize)
{
if (write_pass && greg <= 10)
{
gdb_byte regval[MAX_REGISTER_SIZE];
int len = TYPE_LENGTH (type) - byte;
if (len > tdep->wordsize)
len = tdep->wordsize;
memset (regval, 0, sizeof regval);
/* WARNING: cagney/2003-09-21: As best I can
tell, the ABI specifies that the value should
be left aligned. Unfortunately, GCC doesn't
do this - it instead right aligns even sized
values and puts odd sized values on the
stack. Work around that by putting both a
left and right aligned value into the
register (hopefully no one notices :-^).
Arrrgh! */
/* Left aligned (8 byte values such as pointers
fill the buffer). */
memcpy (regval, val + byte, len);
/* Right aligned (but only if even). */
if (len == 1 || len == 2 || len == 4)
memcpy (regval + tdep->wordsize - len,
val + byte, len);
regcache_cooked_write (regcache, greg, regval);
}
greg++;
}
if (write_pass)
/* WARNING: cagney/2003-09-21: Strictly speaking, this
isn't necessary, unfortunately, GCC appears to get
"struct convention" parameter passing wrong putting
odd sized structures in memory instead of in a
register. Work around this by always writing the
value to memory. Fortunately, doing this
simplifies the code. */
write_memory (gparam, val, TYPE_LENGTH (type));
if (write_pass)
/* WARNING: cagney/2004-06-20: It appears that GCC
likes to put structures containing a single
floating-point member in an FP register instead of
general general purpose. */
/* Always consume parameter stack space. */
gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize);
}
}
if (!write_pass)
{
/* Save the true region sizes ready for the second pass. */
vparam_size = vparam;
/* Make certain that the general parameter save area is at
least the minimum 8 registers (or doublewords) in size. */
if (greg < 8)
gparam_size = 8 * tdep->wordsize;
else
gparam_size = gparam;
}
}
/* Update %sp. */
regcache_cooked_write_signed (regcache, SP_REGNUM, sp);
/* Write the backchain (it occupies WORDSIZED bytes). */
write_memory_signed_integer (sp, tdep->wordsize, back_chain);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
/* Use the func_addr to find the descriptor, and use that to find
the TOC. */
{
CORE_ADDR desc_addr;
if (convert_code_addr_to_desc_addr (func_addr, &desc_addr))
{
/* The TOC is the second double word in the descriptor. */
CORE_ADDR toc =
read_memory_unsigned_integer (desc_addr + tdep->wordsize,
tdep->wordsize);
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum + 2, toc);
}
}
return sp;
}
static enum return_value_convention
do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type,
/* APPLE LOCAL gdb_byte */
struct regcache *regcache, gdb_byte *readbuf,
/* APPLE LOCAL gdb_byte */
const gdb_byte *writebuf, int broken_gcc)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
gdb_assert (tdep->wordsize == 4);
if (TYPE_CODE (type) == TYPE_CODE_FLT
&& TYPE_LENGTH (type) <= 8
&& ppc_floating_point_unit_p (gdbarch))
{
if (readbuf)
{
/* Floats and doubles stored in "f1". Convert the value to
the required type. */
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch,
tdep->ppc_fp0_regnum + 1);
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
convert_typed_floating (regval, regtype, readbuf, type);
}
if (writebuf)
{
/* Floats and doubles stored in "f1". Convert the value to
the register's "double" type. */
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
convert_typed_floating (writebuf, type, regval, regtype);
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* APPLE LOCAL: gcc 3.3 had 8 byte long doubles, but gcc 4.0 uses 16 byte
long doubles even for 32 bit ppc. They are stored across f1 & f2. */
/* Big floating point values get stored in adjacent floating
point registers. */
if (TYPE_CODE (type) == TYPE_CODE_FLT
&& (TYPE_LENGTH (type) == 16 || TYPE_LENGTH (type) == 32))
{
if (writebuf || readbuf != NULL)
{
int i;
for (i = 0; i < TYPE_LENGTH (type) / 8; i++)
{
if (writebuf != NULL)
regcache_cooked_write (regcache, FP0_REGNUM + 1 + i,
(const bfd_byte *) writebuf + i * 8);
if (readbuf != NULL)
regcache_cooked_read (regcache, FP0_REGNUM + 1 + i,
(bfd_byte *) readbuf + i * 8);
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* END APPLE LOCAL */
if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
|| (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8))
{
if (readbuf)
{
/* A long long, or a double stored in the 32 bit r3/r4. */
ppc_copy_from_greg (regcache, tdep->ppc_gp0_regnum + 3,
tdep->wordsize, 8, (bfd_byte *) readbuf);
}
if (writebuf)
{
/* A long long, or a double stored in the 32 bit r3/r4. */
ppc_copy_into_greg (regcache, tdep->ppc_gp0_regnum + 3,
tdep->wordsize, 8, writebuf);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_CODE (type) == TYPE_CODE_INT
&& TYPE_LENGTH (type) <= tdep->wordsize)
{
if (readbuf)
{
/* Some sort of integer stored in r3. Since TYPE isn't
bigger than the register, sign extension isn't a problem
- just do everything unsigned. */
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval);
}
if (writebuf)
{
/* Some sort of integer stored in r3. Use unpack_long since
that should handle any required sign extension. */
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
unpack_long (type, writebuf));
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) == 16
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0)
{
if (readbuf)
{
/* Altivec places the return value in "v2". */
regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf);
}
if (writebuf)
{
/* Altivec places the return value in "v2". */
regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) == 8
&& TYPE_CODE (type) == TYPE_CODE_ARRAY
&& TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0)
{
/* The e500 ABI places return values for the 64-bit DSP types
(__ev64_opaque__) in r3. However, in GDB-speak, ev3
corresponds to the entire r3 value for e500, whereas GDB's r3
only corresponds to the least significant 32-bits. So place
the 64-bit DSP type's value in ev3. */
if (readbuf)
regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf);
if (writebuf)
regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (broken_gcc && TYPE_LENGTH (type) <= 8)
{
if (readbuf)
{
/* GCC screwed up. The last register isn't "left" aligned.
Need to extract the least significant part of each
register and then store that. */
/* Transfer any full words. */
int word = 0;
while (1)
{
ULONGEST reg;
int len = TYPE_LENGTH (type) - word * tdep->wordsize;
if (len <= 0)
break;
if (len > tdep->wordsize)
len = tdep->wordsize;
regcache_cooked_read_unsigned (regcache,
tdep->ppc_gp0_regnum + 3 + word,
®);
store_unsigned_integer (((bfd_byte *) readbuf
+ word * tdep->wordsize), len, reg);
word++;
}
}
if (writebuf)
{
/* GCC screwed up. The last register isn't "left" aligned.
Need to extract the least significant part of each
register and then store that. */
/* Transfer any full words. */
int word = 0;
while (1)
{
ULONGEST reg;
int len = TYPE_LENGTH (type) - word * tdep->wordsize;
if (len <= 0)
break;
if (len > tdep->wordsize)
len = tdep->wordsize;
reg = extract_unsigned_integer (((const bfd_byte *) writebuf
+ word * tdep->wordsize), len);
regcache_cooked_write_unsigned (regcache,
tdep->ppc_gp0_regnum + 3 + word,
reg);
word++;
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_LENGTH (type) <= 8)
{
if (readbuf)
{
/* This matches SVr4 PPC, it does not match GCC. */
/* The value is right-padded to 8 bytes and then loaded, as
two "words", into r3/r4. */
ppc_copy_from_greg (regcache, tdep->ppc_gp0_regnum + 3,
tdep->wordsize, TYPE_LENGTH (type), readbuf);
}
if (writebuf)
{
/* This matches SVr4 PPC, it does not match GCC. */
/* The value is padded out to 8 bytes and then loaded, as
two "words" into r3/r4. */
gdb_byte regvals[MAX_REGISTER_SIZE * 2];
memset (regvals, 0, sizeof regvals);
memcpy (regvals, writebuf, TYPE_LENGTH (type));
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (TYPE_LENGTH (type) > tdep->wordsize)
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
return RETURN_VALUE_STRUCT_CONVENTION;
}
/* The 64 bit ABI retun value convention.
Return non-zero if the return-value is stored in a register, return
0 if the return-value is instead stored on the stack (a.k.a.,
struct return convention).
For a return-value stored in a register: when WRITEBUF is non-NULL,
copy the buffer to the corresponding register return-value location
location; when READBUF is non-NULL, fill the buffer from the
corresponding register return-value location. */
enum return_value_convention
ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype,
struct regcache *regcache, gdb_byte *readbuf,
const gdb_byte *writebuf)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* This function exists to support a calling convention that
requires floating-point registers. It shouldn't be used on
processors that lack them. */
gdb_assert (ppc_floating_point_unit_p (gdbarch));
/* Floats and doubles in F1. */
if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8)
{
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
if (writebuf != NULL)
{
convert_typed_floating (writebuf, valtype, regval, regtype);
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval);
}
if (readbuf != NULL)
{
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval);
convert_typed_floating (regval, regtype, readbuf, valtype);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if ((TYPE_CODE (valtype) == TYPE_CODE_INT
|| TYPE_CODE (valtype) == TYPE_CODE_ENUM)
&& TYPE_LENGTH (valtype) <= 8)
{
/* Integers in r3. */
if (writebuf != NULL)
{
/* Be careful to sign extend the value. */
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
unpack_long (valtype, writebuf));
}
if (readbuf != NULL)
{
/* Extract the integer from r3. Since this is truncating the
value, there isn't a sign extension problem. */
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* All pointers live in r3. */
if (TYPE_CODE (valtype) == TYPE_CODE_PTR)
{
/* All pointers live in r3. */
if (writebuf != NULL)
regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf);
if (readbuf != NULL)
regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
&& TYPE_LENGTH (valtype) <= 8
&& TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
&& TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
{
/* Small character arrays are returned, right justified, in r3. */
int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3)
- TYPE_LENGTH (valtype));
if (writebuf != NULL)
regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3,
offset, TYPE_LENGTH (valtype), writebuf);
if (readbuf != NULL)
regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3,
offset, TYPE_LENGTH (valtype), readbuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Big floating point values get stored in adjacent floating
point registers. */
if (TYPE_CODE (valtype) == TYPE_CODE_FLT
&& (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32))
{
if (writebuf || readbuf != NULL)
{
int i;
for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++)
{
if (writebuf != NULL)
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
(const bfd_byte *) writebuf + i * 8);
if (readbuf != NULL)
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
(bfd_byte *) readbuf + i * 8);
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Complex values get returned in f1:f2, need to convert. */
if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX
&& (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16))
{
if (regcache != NULL)
{
int i;
for (i = 0; i < 2; i++)
{
gdb_byte regval[MAX_REGISTER_SIZE];
struct type *regtype =
register_type (current_gdbarch, tdep->ppc_fp0_regnum);
if (writebuf != NULL)
{
convert_typed_floating ((const bfd_byte *) writebuf +
i * (TYPE_LENGTH (valtype) / 2),
valtype, regval, regtype);
regcache_cooked_write (regcache,
tdep->ppc_fp0_regnum + 1 + i,
regval);
}
if (readbuf != NULL)
{
regcache_cooked_read (regcache,
tdep->ppc_fp0_regnum + 1 + i,
regval);
convert_typed_floating (regval, regtype,
(bfd_byte *) readbuf +
i * (TYPE_LENGTH (valtype) / 2),
valtype);
}
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Big complex values get stored in f1:f4. */
if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32)
{
if (regcache != NULL)
{
int i;
for (i = 0; i < 4; i++)
{
if (writebuf != NULL)
regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i,
(const bfd_byte *) writebuf + i * 8);
if (readbuf != NULL)
regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i,
(bfd_byte *) readbuf + i * 8);
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
return RETURN_VALUE_STRUCT_CONVENTION;
}
static enum return_value_convention
d10v_return_value (struct gdbarch *gdbarch, struct type *valtype,
struct regcache *regcache, void *readbuf,
const void *writebuf)
{
if (TYPE_LENGTH (valtype) > 8)
/* Anything larger than 8 bytes (4 registers) goes on the stack. */
return RETURN_VALUE_STRUCT_CONVENTION;
if (TYPE_LENGTH (valtype) == 5
|| TYPE_LENGTH (valtype) == 6)
/* Anything 5 or 6 bytes in size goes in memory. Contents don't
appear to matter. Note that 7 and 8 byte objects do end up in
registers! */
return RETURN_VALUE_STRUCT_CONVENTION;
if (TYPE_LENGTH (valtype) == 1)
{
/* All single byte values go in a register stored right-aligned.
Note: 2 byte integer values are handled further down. */
if (readbuf)
{
/* Since TYPE is smaller than the register, there isn't a
sign extension problem. Let the extraction truncate the
register value. */
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, R0_REGNUM,
®val);
store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval);
}
if (writebuf)
{
ULONGEST regval;
if (TYPE_CODE (valtype) == TYPE_CODE_INT)
/* Some sort of integer value stored in R0. Use
unpack_long since that should handle any required sign
extension. */
regval = unpack_long (valtype, writebuf);
else
/* Some other type. Don't sign-extend the value when
storing it in the register. */
regval = extract_unsigned_integer (writebuf, 1);
regcache_cooked_write_unsigned (regcache, R0_REGNUM, regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|| TYPE_CODE (valtype) == TYPE_CODE_UNION)
&& TYPE_NFIELDS (valtype) > 1
&& TYPE_FIELD_BITPOS (valtype, 1) == 8)
/* If a composite is 8 bit aligned (determined by looking at the
start address of the second field), put it in memory. */
return RETURN_VALUE_STRUCT_CONVENTION;
/* Assume it is in registers. */
if (writebuf || readbuf)
{
int reg;
/* Per above, the value is never more than 8 bytes long. */
gdb_assert (TYPE_LENGTH (valtype) <= 8);
/* Xfer 2 bytes at a time. */
for (reg = 0; (reg * 2) + 1 < TYPE_LENGTH (valtype); reg++)
{
if (readbuf)
regcache_cooked_read (regcache, R0_REGNUM + reg,
(bfd_byte *) readbuf + reg * 2);
if (writebuf)
regcache_cooked_write (regcache, R0_REGNUM + reg,
(bfd_byte *) writebuf + reg * 2);
}
/* Any trailing byte ends up _left_ aligned. */
if ((reg * 2) < TYPE_LENGTH (valtype))
{
if (readbuf)
regcache_cooked_read_part (regcache, R0_REGNUM + reg,
0, 1, (bfd_byte *) readbuf + reg * 2);
if (writebuf)
regcache_cooked_write_part (regcache, R0_REGNUM + reg,
0, 1, (bfd_byte *) writebuf + reg * 2);
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
static CORE_ADDR
tilegx_push_dummy_call (struct gdbarch *gdbarch,
struct value *function,
struct regcache *regcache,
CORE_ADDR bp_addr, int nargs,
struct value **args,
CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR stack_dest = sp;
int argreg = TILEGX_R0_REGNUM;
int i, j;
int typelen, slacklen;
static const gdb_byte four_zero_words[16] = { 0 };
/* If struct_return is 1, then the struct return address will
consume one argument-passing register. */
if (struct_return)
regcache_cooked_write_unsigned (regcache, argreg++, struct_addr);
/* Arguments are passed in R0 - R9, and as soon as an argument
will not fit completely in the remaining registers, then it,
and all remaining arguments, are put on the stack. */
for (i = 0; i < nargs && argreg <= TILEGX_R9_REGNUM; i++)
{
const gdb_byte *val;
typelen = TYPE_LENGTH (value_enclosing_type (args[i]));
if (typelen > (TILEGX_R9_REGNUM - argreg + 1) * tilegx_reg_size)
break;
/* Put argument into registers wordwise. */
val = value_contents (args[i]);
for (j = 0; j < typelen; j += tilegx_reg_size)
{
/* ISSUE: Why special handling for "typelen = 4x + 1"?
I don't ever see "typelen" values except 4 and 8. */
int n = (typelen - j == 1) ? 1 : tilegx_reg_size;
ULONGEST w = extract_unsigned_integer (val + j, n, byte_order);
regcache_cooked_write_unsigned (regcache, argreg++, w);
}
}
/* Align SP. */
stack_dest = tilegx_frame_align (gdbarch, stack_dest);
/* Loop backwards through remaining arguments and push them on
the stack, word aligned. */
for (j = nargs - 1; j >= i; j--)
{
gdb_byte *val;
struct cleanup *back_to;
const gdb_byte *contents = value_contents (args[j]);
typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
slacklen = align_up (typelen, 8) - typelen;
val = (gdb_byte *) xmalloc (typelen + slacklen);
back_to = make_cleanup (xfree, val);
memcpy (val, contents, typelen);
memset (val + typelen, 0, slacklen);
/* Now write data to the stack. The stack grows downwards. */
stack_dest -= typelen + slacklen;
write_memory (stack_dest, val, typelen + slacklen);
do_cleanups (back_to);
}
/* Add 16 bytes for linkage space to the stack. */
stack_dest = stack_dest - 16;
write_memory (stack_dest, four_zero_words, 16);
/* Update stack pointer. */
regcache_cooked_write_unsigned (regcache, TILEGX_SP_REGNUM, stack_dest);
/* Set the return address register to point to the entry point of
the program, where a breakpoint lies in wait. */
regcache_cooked_write_unsigned (regcache, TILEGX_LR_REGNUM, bp_addr);
return stack_dest;
}
static CORE_ADDR
xstormy16_push_dummy_call (struct gdbarch *gdbarch,
struct value *function,
struct regcache *regcache,
CORE_ADDR bp_addr, int nargs,
struct value **args,
CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR stack_dest = sp;
int argreg = E_1ST_ARG_REGNUM;
int i, j;
int typelen, slacklen;
const gdb_byte *val;
gdb_byte buf[xstormy16_pc_size];
/* If struct_return is true, then the struct return address will
consume one argument-passing register. */
if (struct_return)
{
regcache_cooked_write_unsigned (regcache, E_PTR_RET_REGNUM, struct_addr);
argreg++;
}
/* Arguments are passed in R2-R7 as they fit. If an argument doesn't
fit in the remaining registers we're switching over to the stack.
No argument is put on stack partially and as soon as we switched
over to stack no further argument is put in a register even if it
would fit in the remaining unused registers. */
for (i = 0; i < nargs && argreg <= E_LST_ARG_REGNUM; i++)
{
typelen = TYPE_LENGTH (value_enclosing_type (args[i]));
if (typelen > E_MAX_RETTYPE_SIZE (argreg))
break;
/* Put argument into registers wordwise. */
val = value_contents (args[i]);
for (j = 0; j < typelen; j += xstormy16_reg_size)
{
ULONGEST regval;
int size = (typelen - j == 1) ? 1 : xstormy16_reg_size;
regval = extract_unsigned_integer (val + j, size, byte_order);
regcache_cooked_write_unsigned (regcache, argreg++, regval);
}
}
/* Align SP */
stack_dest = xstormy16_frame_align (gdbarch, stack_dest);
/* Loop backwards through remaining arguments and push them on the stack,
wordaligned. */
for (j = nargs - 1; j >= i; j--)
{
gdb_byte *val;
struct cleanup *back_to;
const gdb_byte *bytes = value_contents (args[j]);
typelen = TYPE_LENGTH (value_enclosing_type (args[j]));
slacklen = typelen & 1;
val = xmalloc (typelen + slacklen);
back_to = make_cleanup (xfree, val);
memcpy (val, bytes, typelen);
memset (val + typelen, 0, slacklen);
/* Now write this data to the stack. The stack grows upwards. */
write_memory (stack_dest, val, typelen + slacklen);
stack_dest += typelen + slacklen;
do_cleanups (back_to);
}
store_unsigned_integer (buf, xstormy16_pc_size, byte_order, bp_addr);
write_memory (stack_dest, buf, xstormy16_pc_size);
stack_dest += xstormy16_pc_size;
/* Update stack pointer. */
regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, stack_dest);
/* Return the new stack pointer minus the return address slot since
that's what DWARF2/GCC uses as the frame's CFA. */
return stack_dest - xstormy16_pc_size;
}