static int ltr501_write_intr_prst(struct ltr501_data *data,
enum iio_chan_type type,
int val, int val2)
{
int ret, samp_period, new_val;
unsigned long period;
if (val < 0 || val2 < 0)
return -EINVAL;
/* period in microseconds */
period = ((val * 1000000) + val2);
switch (type) {
case IIO_INTENSITY:
ret = ltr501_als_read_samp_period(data, &samp_period);
if (ret < 0)
return ret;
/* period should be atleast equal to sampling period */
if (period < samp_period)
return -EINVAL;
new_val = DIV_ROUND_UP(period, samp_period);
if (new_val < 0 || new_val > 0x0f)
return -EINVAL;
mutex_lock(&data->lock_als);
ret = regmap_field_write(data->reg_als_prst, new_val);
mutex_unlock(&data->lock_als);
if (ret >= 0)
data->als_period = period;
return ret;
case IIO_PROXIMITY:
ret = ltr501_ps_read_samp_period(data, &samp_period);
if (ret < 0)
return ret;
/* period should be atleast equal to rate */
if (period < samp_period)
return -EINVAL;
new_val = DIV_ROUND_UP(period, samp_period);
if (new_val < 0 || new_val > 0x0f)
return -EINVAL;
mutex_lock(&data->lock_ps);
ret = regmap_field_write(data->reg_ps_prst, new_val);
mutex_unlock(&data->lock_ps);
if (ret >= 0)
data->ps_period = period;
return ret;
default:
return -EINVAL;
}
return -EINVAL;
}
static int ltr501_write_event_config(struct iio_dev *indio_dev,
const struct iio_chan_spec *chan,
enum iio_event_type type,
enum iio_event_direction dir, int state)
{
struct ltr501_data *data = iio_priv(indio_dev);
int ret;
/* only 1 and 0 are valid inputs */
if (state != 1 && state != 0)
return -EINVAL;
switch (chan->type) {
case IIO_INTENSITY:
mutex_lock(&data->lock_als);
ret = regmap_field_write(data->reg_als_intr, state);
mutex_unlock(&data->lock_als);
return ret;
case IIO_PROXIMITY:
mutex_lock(&data->lock_ps);
ret = regmap_field_write(data->reg_ps_intr, state);
mutex_unlock(&data->lock_ps);
return ret;
default:
return -EINVAL;
}
return -EINVAL;
}
static int ltr501_set_it_time(struct ltr501_data *data, int it)
{
int ret, i, index = -1, status;
for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
if (int_time_mapping[i] == it) {
index = i;
break;
}
}
/* Make sure integ time index is valid */
if (index < 0)
return -EINVAL;
ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
if (ret < 0)
return ret;
if (status & LTR501_CONTR_ALS_GAIN_MASK) {
/*
* 200 ms and 400 ms integ time can only be
* used in dynamic range 1
*/
if (index > 1)
return -EINVAL;
} else
/* 50 ms integ time can only be used in dynamic range 2 */
if (index == 1)
return -EINVAL;
return regmap_field_write(data->reg_it, index);
}
static int st_thermal_calibration(struct st_thermal_sensor *sensor)
{
int ret;
unsigned int val;
struct device *dev = sensor->dev;
/* Check if sensor calibration data is already written */
ret = regmap_field_read(sensor->dcorrect, &val);
if (ret) {
dev_err(dev, "failed to read calibration data\n");
return ret;
}
if (!val) {
/*
* Sensor calibration value not set by bootloader,
* default calibration data to be used
*/
ret = regmap_field_write(sensor->dcorrect,
sensor->cdata->calibration_val);
if (ret)
dev_err(dev, "failed to set calibration data\n");
}
return ret;
}
static int da9063_set_current_limit(struct regulator_dev *rdev,
int min_uA, int max_uA)
{
struct da9063_regulator *regl = rdev_get_drvdata(rdev);
const struct da9063_regulator_info *rinfo = regl->info;
int n, tval;
for (n = 0; n < rinfo->n_current_limits; n++) {
tval = rinfo->current_limits[n];
if (tval >= min_uA && tval <= max_uA)
return regmap_field_write(regl->ilimit, n);
}
return -EINVAL;
}
static int da9063_ldo_set_suspend_mode(struct regulator_dev *rdev, unsigned mode)
{
struct da9063_regulator *regl = rdev_get_drvdata(rdev);
unsigned val;
switch (mode) {
case REGULATOR_MODE_NORMAL:
val = 0;
break;
case REGULATOR_MODE_STANDBY:
val = 1;
break;
default:
return -EINVAL;
}
return regmap_field_write(regl->suspend_sleep, val);
}
static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
int val, int val2)
{
int i, ret;
i = ltr501_match_samp_freq(ltr501_ps_samp_table,
ARRAY_SIZE(ltr501_ps_samp_table),
val, val2);
if (i < 0)
return i;
mutex_lock(&data->lock_ps);
ret = regmap_field_write(data->reg_ps_rate, i);
mutex_unlock(&data->lock_ps);
return ret;
}
static int da9063_buck_set_suspend_mode(struct regulator_dev *rdev, unsigned mode)
{
struct da9063_regulator *regl = rdev_get_drvdata(rdev);
int val;
switch (mode) {
case REGULATOR_MODE_FAST:
val = BUCK_MODE_SYNC;
break;
case REGULATOR_MODE_NORMAL:
val = BUCK_MODE_AUTO;
break;
case REGULATOR_MODE_STANDBY:
val = BUCK_MODE_SLEEP;
break;
default:
return -EINVAL;
}
return regmap_field_write(regl->mode, val);
}
int uni_player_resume(struct uniperif *player)
{
int ret;
/* Select the frequency synthesizer clock */
if (player->clk_sel) {
ret = regmap_field_write(player->clk_sel, 1);
if (ret) {
dev_err(player->dev,
"%s: Failed to select freq synth clock\n",
__func__);
return ret;
}
}
SET_UNIPERIF_CONFIG_BACK_STALL_REQ_DISABLE(player);
SET_UNIPERIF_CTRL_ROUNDING_OFF(player);
SET_UNIPERIF_CTRL_SPDIF_LAT_OFF(player);
SET_UNIPERIF_CONFIG_IDLE_MOD_DISABLE(player);
return 0;
}
static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
unsigned long idx, int assert)
{
struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
const struct syscfg_reset_channel *ch;
u32 ctrl_val = rst->active_low ? !assert : !!assert;
int err;
if (idx >= rcdev->nr_resets)
return -EINVAL;
ch = &rst->channels[idx];
err = regmap_field_write(ch->reset, ctrl_val);
if (err)
return err;
if (ch->ack) {
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
u32 ack_val;
while (true) {
err = regmap_field_read(ch->ack, &ack_val);
if (err)
return err;
if (ack_val == ctrl_val)
break;
if (time_after(jiffies, timeout))
return -ETIME;
cpu_relax();
}
}
return 0;
}
static int da9063_suspend_disable(struct regulator_dev *rdev)
{
struct da9063_regulator *regl = rdev_get_drvdata(rdev);
return regmap_field_write(regl->suspend, 0);
}
int uni_player_init(struct platform_device *pdev,
struct uniperif *player)
{
int ret = 0;
player->dev = &pdev->dev;
player->state = UNIPERIF_STATE_STOPPED;
player->dai_ops = &uni_player_dai_ops;
/* Get PCM_CLK_SEL & PCMP_VALID_SEL from audio-glue-ctrl SoC reg */
ret = uni_player_parse_dt_audio_glue(pdev, player);
if (ret < 0) {
dev_err(player->dev, "Failed to parse DeviceTree\n");
return ret;
}
/* Underflow recovery is only supported on later ip revisions */
if (player->ver >= SND_ST_UNIPERIF_VERSION_UNI_PLR_TOP_1_0)
player->underflow_enabled = 1;
if (UNIPERIF_TYPE_IS_TDM(player))
player->hw = &uni_tdm_hw;
else
player->hw = &uni_player_pcm_hw;
/* Get uniperif resource */
player->clk = of_clk_get(pdev->dev.of_node, 0);
if (IS_ERR(player->clk)) {
dev_err(player->dev, "Failed to get clock\n");
ret = PTR_ERR(player->clk);
}
/* Select the frequency synthesizer clock */
if (player->clk_sel) {
ret = regmap_field_write(player->clk_sel, 1);
if (ret) {
dev_err(player->dev,
"%s: Failed to select freq synth clock\n",
__func__);
return ret;
}
}
/* connect to I2S/TDM TX bus */
if (player->valid_sel &&
(player->id == UNIPERIF_PLAYER_I2S_OUT)) {
ret = regmap_field_write(player->valid_sel, player->id);
if (ret) {
dev_err(player->dev,
"%s: unable to connect to tdm bus\n", __func__);
return ret;
}
}
ret = devm_request_irq(&pdev->dev, player->irq,
uni_player_irq_handler, IRQF_SHARED,
dev_name(&pdev->dev), player);
if (ret < 0) {
dev_err(player->dev, "unable to request IRQ %d\n", player->irq);
return ret;
}
mutex_init(&player->ctrl_lock);
/* Ensure that disabled by default */
SET_UNIPERIF_CONFIG_BACK_STALL_REQ_DISABLE(player);
SET_UNIPERIF_CTRL_ROUNDING_OFF(player);
SET_UNIPERIF_CTRL_SPDIF_LAT_OFF(player);
SET_UNIPERIF_CONFIG_IDLE_MOD_DISABLE(player);
if (UNIPERIF_TYPE_IS_IEC958(player)) {
/* Set default iec958 status bits */
/* Consumer, PCM, copyright, 2ch, mode 0 */
player->stream_settings.iec958.status[0] = 0x00;
/* Broadcast reception category */
player->stream_settings.iec958.status[1] =
IEC958_AES1_CON_GENERAL;
/* Do not take into account source or channel number */
player->stream_settings.iec958.status[2] =
IEC958_AES2_CON_SOURCE_UNSPEC;
/* Sampling frequency not indicated */
player->stream_settings.iec958.status[3] =
IEC958_AES3_CON_FS_NOTID;
/* Max sample word 24-bit, sample word length not indicated */
player->stream_settings.iec958.status[4] =
IEC958_AES4_CON_MAX_WORDLEN_24 |
IEC958_AES4_CON_WORDLEN_24_20;
player->num_ctrls = ARRAY_SIZE(snd_sti_iec_ctl);
player->snd_ctrls = snd_sti_iec_ctl[0];
} else {
player->num_ctrls = ARRAY_SIZE(snd_sti_pcm_ctl);
player->snd_ctrls = snd_sti_pcm_ctl[0];
}
return 0;
}