/* Write to destination operand in ALU instruction */
void evg_isa_enqueue_write_dest(struct evg_work_item_t *work_item,
struct evg_inst_t *inst, unsigned int value)
{
struct evg_isa_write_task_t *wt;
/* If pixel is inactive, do not enqueue the task */
assert(inst->info->fmt[0] == EVG_FMT_ALU_WORD0);
if (!evg_work_item_get_pred(work_item))
return;
/* Fields 'dst_gpr', 'dst_rel', and 'dst_chan' are at the same bit positions in both
* EVG_ALU_WORD1_OP2 and EVG_ALU_WORD1_OP3 formats. */
wt = repos_create_object(evg_isa_write_task_repos);
wt->work_item = work_item;
wt->kind = EVG_ISA_WRITE_TASK_WRITE_DEST;
wt->inst = inst;
wt->gpr = EVG_ALU_WORD1_OP2.dst_gpr;
wt->rel = EVG_ALU_WORD1_OP2.dst_rel;
wt->chan = EVG_ALU_WORD1_OP2.dst_chan;
wt->index_mode = EVG_ALU_WORD0.index_mode;
wt->value = value;
/* For EVG_ALU_WORD1_OP2, check 'write_mask' field */
wt->write_mask = 1;
if (inst->info->fmt[1] == EVG_FMT_ALU_WORD1_OP2 && !EVG_ALU_WORD1_OP2.write_mask)
wt->write_mask = 0;
/* Enqueue task */
linked_list_add(work_item->write_task_list, wt);
}
struct frm_uop_t *frm_uop_create()
{
struct frm_uop_t *uop;
uop = repos_create_object(gpu_uop_repos);
uop->id = gpu_uop_id_counter++;
return uop;
}
struct moesi_stack_t *moesi_stack_create(uint64_t id, struct ccache_t *ccache,
uint32_t addr, int retevent, void *retstack)
{
struct moesi_stack_t *stack;
stack = repos_create_object(moesi_stack_repos);
stack->ccache = ccache;
stack->addr = addr;
stack->retevent = retevent;
stack->retstack = retstack;
stack->id = id;
return stack;
}
void evg_isa_enqueue_push_before(struct evg_work_item_t *work_item,
struct evg_inst_t *inst)
{
struct evg_wavefront_t *wavefront = work_item->wavefront;
struct evg_isa_write_task_t *wt;
/* Do only if instruction initiating ALU clause is ALU_PUSH_BEFORE */
if (wavefront->cf_inst.info->inst != EVG_INST_ALU_PUSH_BEFORE)
return;
/* Create and enqueue task */
wt = repos_create_object(evg_isa_write_task_repos);
wt->work_item = work_item;
wt->kind = EVG_ISA_WRITE_TASK_PUSH_BEFORE;
wt->inst = inst;
linked_list_add(work_item->write_task_list, wt);
}
void evg_isa_enqueue_pred_set(struct evg_work_item_t *work_item,
struct evg_inst_t *inst, int cond)
{
struct evg_isa_write_task_t *wt;
/* If pixel is inactive, predicate is not changed */
assert(inst->info->fmt[0] == EVG_FMT_ALU_WORD0);
assert(inst->info->fmt[1] == EVG_FMT_ALU_WORD1_OP2);
if (!evg_work_item_get_pred(work_item))
return;
/* Create and enqueue task */
wt = repos_create_object(evg_isa_write_task_repos);
wt->work_item = work_item;
wt->kind = EVG_ISA_WRITE_TASK_SET_PRED;
wt->inst = inst;
wt->cond = cond;
linked_list_add(work_item->write_task_list, wt);
}
void evg_isa_enqueue_write_lds(struct evg_work_item_t *work_item,
struct evg_inst_t *inst, unsigned int addr, unsigned int value,
int value_size)
{
struct evg_isa_write_task_t *wt;
/* Inactive pixel not enqueued */
if (!evg_work_item_get_pred(work_item))
return;
/* Create task */
wt = repos_create_object(evg_isa_write_task_repos);
wt->work_item = work_item;
wt->kind = EVG_ISA_WRITE_TASK_WRITE_LDS;
wt->inst = inst;
wt->lds_addr = addr;
wt->lds_value = value;
wt->lds_value_size = value_size;
/* Enqueue task */
linked_list_add(work_item->write_task_list, wt);
}