t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag) { t_stat r; int32 val; uint32 origin, limit; if (flag) /* dump? */ return sim_messagef (SCPE_NOFNC, "Command Not Implemented\n"); origin = 0; /* memory */ limit = (uint32) cpu_unit.capac; if (sim_switches & SWMASK ('O')) { /* origin? */ origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r); if (r != SCPE_OK) return SCPE_ARG; } while ((val = Fgetc (fileref)) != EOF) { /* read byte stream */ if (sim_switches & SWMASK ('R')) { /* ROM0? */ if (origin >= ROMSIZE) return SCPE_NXM; rom_wr_B (ROM0BASE + origin, val); } else if (sim_switches & SWMASK ('S')) { /* ROM1? */ if (origin >= ROMSIZE) return SCPE_NXM; rom_wr_B (ROM1BASE + origin, val); } else { if (origin >= limit) /* NXM? */ return SCPE_NXM; WriteB (origin, val); /* memory */ } origin = origin + 1; } return SCPE_OK; }
t_stat sim_load (FILE *fileref, CONST char *cptr, CONST char *fnam, int flag) { t_stat r; int32 i; uint32 origin, limit; extern int32 ssc_cnf; #define SSCCNF_BLO 0x80000000 if (flag) /* dump? */ return sim_messagef (SCPE_NOFNC, "Command Not Implemented\n"); if (sim_switches & SWMASK ('R')) { /* ROM? */ origin = ROMBASE; limit = ROMBASE + ROMSIZE; } else if (sim_switches & SWMASK ('N')) { /* NVR? */ origin = NVRBASE; limit = NVRBASE + NVRSIZE; ssc_cnf = ssc_cnf & ~SSCCNF_BLO; } else { origin = 0; /* memory */ limit = (uint32) cpu_unit.capac; if (sim_switches & SWMASK ('O')) { /* origin? */ origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r); if (r != SCPE_OK) return SCPE_ARG; } } while ((i = Fgetc (fileref)) != EOF) { /* read byte stream */ if (origin >= limit) /* NXM? */ return SCPE_NXM; if (sim_switches & SWMASK ('R')) /* ROM? */ rom_wr_B (origin, i); /* not writeable */ else WriteB (origin, i); /* store byte */ origin = origin + 1; } return SCPE_OK; }
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag) { t_stat r; int32 i; uint32 origin, limit, step = 1; if (flag) /* dump? */ return SCPE_ARG; if (sim_switches & SWMASK ('R')) { /* ROM? */ origin = ROMBASE; limit = ROMBASE + ROMSIZE; } else if (sim_switches & SWMASK ('N')) { /* NVR? */ origin = NVRBASE; limit = NVRBASE + NVRASIZE; step = 2; } else { origin = 0; /* memory */ limit = (uint32) cpu_unit.capac; if (sim_switches & SWMASK ('O')) { /* origin? */ origin = (int32) get_uint (cptr, 16, 0xFFFFFFFF, &r); if (r != SCPE_OK) return SCPE_ARG; } } while ((i = getc (fileref)) != EOF) { /* read byte stream */ if (origin >= limit) /* NXM? */ return SCPE_NXM; if (sim_switches & SWMASK ('R')) /* ROM? */ rom_wr_B (origin, i); /* not writeable */ else WriteB (origin, i); /* store byte */ origin = origin + step; } return SCPE_OK; }