Ejemplo n.º 1
0
int
rtems_monitor_command_read(char *command,
                           int  *argc,
                           char **argv)
{
	char *env_prompt;

	env_prompt = getenv("RTEMS_MONITOR_PROMPT");

  /*
   * put node number in the prompt if we are multiprocessing
   */
#if defined(RTEMS_MULTIPROCESSING)
  if (!rtems_configuration_get_user_multiprocessing_table ())
    snprintf (monitor_prompt, sizeof(monitor_prompt), "%s",
             (env_prompt == NULL) ? MONITOR_PROMPT: env_prompt);
  else /* .... */
#endif
  if (rtems_monitor_default_node != rtems_monitor_node)
    snprintf (monitor_prompt, sizeof(monitor_prompt),
              "%" PRId32 "-%s-%" PRId32 "", rtems_monitor_node,
             (env_prompt == NULL) ? MONITOR_PROMPT : env_prompt,
             rtems_monitor_default_node);
  else
    snprintf (monitor_prompt, sizeof(monitor_prompt),
             "%" PRId32 "-%s", rtems_monitor_node,
             (env_prompt == NULL) ? MONITOR_PROMPT : env_prompt);

  rtems_monitor_line_editor (command);

  return rtems_monitor_make_argv (command, argc, argv);
}
Ejemplo n.º 2
0
void Shm_Get_configuration(
  uint32_t   localnode,
  shm_config_table **shmcfg
)
{
  int i;
  unsigned int tmp;
  rtems_multiprocessing_table *mptable;

  BSP_shm_cfgtbl.format       = SHM_BIG;

  /*
   *  Override cause_intr or shm_isr if your target has
   *  special requirements.
   */

  BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;

#ifdef NEUTRAL_BIG
  BSP_shm_cfgtbl.convert      = NULL_CONVERT;
#else
  BSP_shm_cfgtbl.convert      = CPU_swap_u32;
#endif

  BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
  BSP_shm_cfgtbl.Intr.address =
     (vol_u32 *) &(LEON3_IrqCtrl_Regs->force[LEON3_Cpu_Index]);
  if (BSP_shm_cfgtbl.Intr.value == 0)
    BSP_shm_cfgtbl.Intr.value = 1 << LEON3_mp_irq; /* Use default MP-IRQ */
  BSP_shm_cfgtbl.Intr.length  = 4;

  if (LEON3_Cpu_Index == 0) {
    tmp = 0;
    mptable = rtems_configuration_get_user_multiprocessing_table();
    for (i = 1; i < mptable->maximum_nodes; i++)
      tmp |= (1 << i);
    LEON3_IrqCtrl_Regs->mpstat = tmp;
  }

  *shmcfg = &BSP_shm_cfgtbl;
}
Ejemplo n.º 3
0
/*
 *  bsp_start
 *
 *  This routine does the bulk of the system initialization.
 */
void bsp_start( void )
{
  rtems_isr_entry       *monitors_vector_table;
  int                   index;
  uint8_t               node_number;

  monitors_vector_table = (rtems_isr_entry *)0;   /* 147Bug Vectors are at 0 */
  m68k_set_vbr( monitors_vector_table );

  for ( index=2 ; index<=255 ; index++ )
    M68Kvec[ index ] = monitors_vector_table[ 32 ];

  M68Kvec[  2 ] = monitors_vector_table[  2 ];   /* bus error vector */
  M68Kvec[  4 ] = monitors_vector_table[  4 ];   /* breakpoints vector */
  M68Kvec[  9 ] = monitors_vector_table[  9 ];   /* trace vector */
  M68Kvec[ 47 ] = monitors_vector_table[ 47 ];   /* system call vector */

  m68k_set_vbr( &M68Kvec );

  pcc->int_base_vector = PCC_BASE_VECTOR & 0xF0;
  /* Set the PCC int vectors base */

  /* VME shared memory configuration */
  /* Only the first node shares its top 128k DRAM */

  vme_lcsr->utility_interrupt_vector = VME_BASE_VECTOR & 0xF8;
  /* Set VMEchip base interrupt vector */
  vme_lcsr->utility_interrupt_mask |= 0x02;
  /* Enable SIGLP interruption (see shm support) */
  pcc->general_purpose_control &= 0x10;
  /* Enable VME master interruptions */

  if (vme_lcsr->system_controller & 0x01) {
    /* the board is system controller */
    vme_lcsr->system_controller = 0x08;
    /* Make VME access round-robin */
  }

#if defined(RTEMS_MULTIPROCESSING)
  node_number = (uint8_t)
    (rtems_configuration_get_user_multiprocessing_table()->node - 1) & 0xF;
#else
   node_number = 1;
#endif
  /* Get and store node ID, first node_number = 0 */
  vme_gcsr->board_identification = node_number;

  vme_lcsr->gcsr_base_address = node_number;
  /* Setup the base address of this board's gcsr */
  vme_lcsr->timer_configuration = 0x6a;
  /* Enable VME time outs, maximum periods */

  if (node_number == 0) {
    pcc->slave_base_address = 0x01;
    /* Set local DRAM base address on the VME bus to the DRAM size */

    vme_lcsr->vme_bus_requester = 0x80;
    while (! (vme_lcsr->vme_bus_requester & 0x40));
    /* Get VMEbus mastership */
    vme_lcsr->slave_address_modifier = 0xfb;
    /* Share everything */
    vme_lcsr->slave_configuration = 0x80;
    /* Share local DRAM */
    vme_lcsr->vme_bus_requester = 0x0;
    /* release bus */
  } else {
    pcc->slave_base_address = 0;
    /* Set local DRAM base address on the VME bus to 0 */

    vme_lcsr->vme_bus_requester = 0x80;
    while (! (vme_lcsr->vme_bus_requester & 0x40));
    /* Get VMEbus mastership */
    vme_lcsr->slave_address_modifier = 0x08;
    /* Share only the short adress range */
    vme_lcsr->slave_configuration = 0;
    /* Don't share local DRAM */
    vme_lcsr->vme_bus_requester = 0x0;
    /* release bus */
  }

  vme_lcsr->master_address_modifier = 0;
  /* Automatically set the address modifier */
  vme_lcsr->master_configuration = 1;
  /* Disable D32 transfers : they don't work on my VMEbus rack */

  rtems_cache_enable_instruction();
  rtems_cache_enable_data();
}
Ejemplo n.º 4
0
Archivo: exinit.c Proyecto: fsmd/RTEMS
void rtems_initialize_data_structures(void)
{
  /*
   *  Dispatching and interrupts are disabled until the end of the
   *  initialization sequence.  This prevents an inadvertent context
   *  switch before the executive is initialized.
   *
   *  WARNING: Interrupts should have been disabled by the BSP and
   *           are disabled by boot_card().
   */

  #if defined(RTEMS_MULTIPROCESSING)
    /*
     *  Initialize the system state based on whether this is an MP system.
     *  In an MP configuration, internally we view single processor
     *  systems as a very restricted multiprocessor system.
     */
    _Configuration_MP_table = rtems_configuration_get_user_multiprocessing_table();

    if ( _Configuration_MP_table == NULL ) {
      _Configuration_MP_table =
	(void *)&_Initialization_Default_multiprocessing_table;
      _System_state_Handler_initialization( FALSE );
    } else {
      _System_state_Handler_initialization( TRUE );
    }
  #else
    _System_state_Handler_initialization( FALSE );
  #endif

  /*
   * Initialize any target architecture specific support as early as possible
   */
  _CPU_Initialize();

  #if defined(RTEMS_MULTIPROCESSING)
    _Objects_MP_Handler_early_initialization();
  #endif

  /*
   *  Do this as early as possible to ensure no debugging output
   *  is even attempted to be printed.
   */
  _Debug_Manager_initialization();

  _API_extensions_Initialization();

  _Thread_Dispatch_initialization();

  _User_extensions_Handler_initialization();
  _ISR_Handler_initialization();

  /*
   * Initialize the internal support API and allocator Mutex
   */
  _Objects_Information_table[OBJECTS_INTERNAL_API] = _Internal_Objects;

  _API_Mutex_Initialization( 2 );
  _API_Mutex_Allocate( &_RTEMS_Allocator_Mutex );
  _API_Mutex_Allocate( &_Once_Mutex );

  _Watchdog_Handler_initialization();
  _TOD_Handler_initialization();

  _Thread_Handler_initialization();

  _Scheduler_Handler_initialization();

  #if defined(RTEMS_MULTIPROCESSING)
    _Objects_MP_Handler_initialization();
    _MPCI_Handler_initialization( RTEMS_TIMEOUT );
  #endif

  _SMP_Handler_initialize();

  _CPU_set_Handler_initialization();

/* MANAGERS */

  _RTEMS_API_Initialize();

  _Extension_Manager_initialization();

  _POSIX_API_Initialize();

  _System_state_Set( SYSTEM_STATE_BEFORE_MULTITASKING );

  /*
   *  No threads should be created before this point!!!
   *  _Thread_Executing and _Thread_Heir are not set.
   *
   *  At this point all API extensions are in place.  After the call to
   *  _Thread_Create_idle() _Thread_Executing and _Thread_Heir will be set.
   */
  _Thread_Create_idle();

  /*
   *  Scheduling can properly occur now as long as we avoid dispatching.
   */
}