void rtl8225_rf_wakeup(struct net_device *dev)
{
write_rtl8225(dev,0x4,0x9ff);
rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
force_pci_posting(dev);
}
void rtl8225_rf_sleep(struct net_device *dev)
{
write_rtl8225(dev,0x4,0xdff);
force_pci_posting(dev);
mdelay(1);
rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_SLEEP);
rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_SLEEP);
force_pci_posting(dev);
}
void rtl8225_rf_close(struct net_device *dev)
{
write_rtl8225(dev, 0x4, 0x1f);
force_pci_posting(dev);
mdelay(1);
rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
}
void rtl8225_rf_close(struct net_device *dev)
{
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
if( priv->bSurpriseRemoved == _FALSE) {
write_rtl8225(dev, 0x4, 0x1f);
force_pci_posting(dev);
mdelay(1);
rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
}
}
void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
{
struct r8180_priv *priv = ieee80211_priv(dev);
int GainIdx;
int GainSetting;
int i;
u8 power;
u8 *cck_power_table;
u8 max_cck_power_level;
u8 max_ofdm_power_level;
u8 min_ofdm_power_level;
u8 cck_power_level = 0xff & priv->chtxpwr[ch];
u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
if(priv->card_type == USB){
max_cck_power_level = 11;
max_ofdm_power_level = 25; // 12 -> 25
min_ofdm_power_level = 10;
}else{
max_cck_power_level = 35;
max_ofdm_power_level = 35;
min_ofdm_power_level = 0;
}
/* CCK power setting */
if(cck_power_level > max_cck_power_level)
cck_power_level = max_cck_power_level;
GainIdx=cck_power_level % 6;
GainSetting=cck_power_level / 6;
if(ch == 14)
cck_power_table = rtl8225_tx_power_cck_ch14;
else
cck_power_table = rtl8225_tx_power_cck;
// if(priv->card_8185 == 1 && priv->card_8185_Bversion ){
/*Ver B*/
// write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]);
// }else{
/*Ver C - D */
write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
// }
for(i=0;i<8;i++){
power = cck_power_table[GainIdx * 8 + i];
write_phy_cck(dev, 0x44 + i, power);
}
/* FIXME Is this delay really needeed ? */
force_pci_posting(dev);
mdelay(1);
/* OFDM power setting */
// Old:
// if(ofdm_power_level > max_ofdm_power_level)
// ofdm_power_level = 35;
// ofdm_power_level += min_ofdm_power_level;
// Latest:
if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
ofdm_power_level = max_ofdm_power_level;
else
ofdm_power_level += min_ofdm_power_level;
if(ofdm_power_level > 35)
ofdm_power_level = 35;
//
GainIdx=ofdm_power_level % 6;
GainSetting=ofdm_power_level / 6;
#if 1
// if(priv->card_type == USB){
rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
write_phy_ofdm(dev,2,0x42);
write_phy_ofdm(dev,6,0);
write_phy_ofdm(dev,8,0);
// }
#endif
// if(priv->card_8185 == 1 && priv->card_8185_Bversion){
// /*Ver B*/
// write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]);
// }else{
/*Ver C - D */
write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
// }
power = rtl8225_tx_power_ofdm[GainIdx];
write_phy_ofdm(dev, 0x5, power);
write_phy_ofdm(dev, 0x7, power);
force_pci_posting(dev);
mdelay(1);
//write_nic_byte(dev, TX_AGC_CONTROL,4);
}
static void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
{
struct r8180_priv *priv = ieee80211_priv(dev);
int GainIdx;
int GainSetting;
int i;
u8 power;
const u8 *cck_power_table;
u8 max_cck_power_level;
u8 max_ofdm_power_level;
u8 min_ofdm_power_level;
u8 cck_power_level = 0xff & priv->chtxpwr[ch];
u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
max_cck_power_level = 35;
max_ofdm_power_level = 35;
min_ofdm_power_level = 0;
if (cck_power_level > max_cck_power_level)
cck_power_level = max_cck_power_level;
GainIdx = cck_power_level % 6;
GainSetting = cck_power_level / 6;
if (ch == 14)
cck_power_table = rtl8225_tx_power_cck_ch14;
else
cck_power_table = rtl8225_tx_power_cck;
write_nic_byte(dev, TX_GAIN_CCK,
rtl8225_tx_gain_cck_ofdm[GainSetting] >> 1);
for (i = 0; i < 8; i++) {
power = cck_power_table[GainIdx * 8 + i];
write_phy_cck(dev, 0x44 + i, power);
}
/* FIXME Is this delay really needeed ? */
force_pci_posting(dev);
mdelay(1);
if (ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
ofdm_power_level = max_ofdm_power_level;
else
ofdm_power_level += min_ofdm_power_level;
if (ofdm_power_level > 35)
ofdm_power_level = 35;
GainIdx = ofdm_power_level % 6;
GainSetting = ofdm_power_level / 6;
rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
write_phy_ofdm(dev, 2, 0x42);
write_phy_ofdm(dev, 6, 0x00);
write_phy_ofdm(dev, 8, 0x00);
write_nic_byte(dev, TX_GAIN_OFDM,
rtl8225_tx_gain_cck_ofdm[GainSetting] >> 1);
power = rtl8225_tx_power_ofdm[GainIdx];
write_phy_ofdm(dev, 5, power);
write_phy_ofdm(dev, 7, power);
force_pci_posting(dev);
mdelay(1);
}
void rtl8225z2_SetTXPowerLevel(struct net_device *dev, short ch)
{
struct r8180_priv *priv = ieee80211_priv(dev);
// int GainIdx;
// int GainSetting;
int i;
u8 power;
u8 *cck_power_table;
u8 max_cck_power_level;
//u8 min_cck_power_level;
u8 max_ofdm_power_level;
u8 min_ofdm_power_level;
u8 cck_power_level = 0xff & priv->chtxpwr[ch];
u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
max_cck_power_level = 15;
//min_cck_power_level = 0;
max_ofdm_power_level = 25; // 12 -> 25
min_ofdm_power_level = 10;
/* CCK power setting */
if(cck_power_level > max_cck_power_level)
cck_power_level = max_cck_power_level;
cck_power_level += priv->cck_txpwr_base;
if(cck_power_level > 35)
cck_power_level = 35;
if(ch == 14)
cck_power_table = rtl8225z2_tx_power_cck_ch14;
else
cck_power_table = rtl8225z2_tx_power_cck;
for(i=0;i<8;i++){
power = cck_power_table[i];
write_phy_cck(dev, 0x44 + i, power);
}
//write_nic_byte(dev, TX_GAIN_CCK, power);
//2005.11.17,
write_nic_byte(dev, TX_GAIN_CCK, ZEBRA2_CCK_OFDM_GAIN_SETTING[cck_power_level]);
force_pci_posting(dev);
mdelay(1);
/* OFDM power setting */
// Old:
// if(ofdm_power_level > max_ofdm_power_level)
// ofdm_power_level = 35;
// ofdm_power_level += min_ofdm_power_level;
// Latest:
if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
ofdm_power_level = max_ofdm_power_level;
else
ofdm_power_level += min_ofdm_power_level;
ofdm_power_level += priv->ofdm_txpwr_base;
if(ofdm_power_level > 35)
ofdm_power_level = 35;
rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
write_phy_ofdm(dev,2,0x42);
write_phy_ofdm(dev,5,0);
write_phy_ofdm(dev,6,0x40);
write_phy_ofdm(dev,7,0);
write_phy_ofdm(dev,8,0x40);
//write_nic_byte(dev, TX_GAIN_OFDM, ofdm_power_level);
//2005.11.17,
write_nic_byte(dev, TX_GAIN_OFDM, ZEBRA2_CCK_OFDM_GAIN_SETTING[ofdm_power_level]);
force_pci_posting(dev);
mdelay(1);
//write_nic_byte(dev, TX_AGC_CONTROL,4);
}
