static void rtl8723e_dm_initial_gain_multi_sta(struct ieee80211_hw *hw)
{
static u8 binitialized;
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
long rssi_strength = rtlpriv->dm.entry_min_undec_sm_pwdb;
bool multi_sta = false;
if (mac->opmode == NL80211_IFTYPE_ADHOC)
multi_sta = true;
if ((multi_sta == false) || (dm_digtable->cur_sta_cstate !=
DIG_STA_DISCONNECT)) {
binitialized = false;
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
return;
} else if (binitialized == false) {
binitialized = true;
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
dm_digtable->cur_igvalue = 0x20;
rtl8723e_dm_write_dig(hw);
}
if (dm_digtable->curmultista_cstate == DIG_MULTISTA_CONNECT) {
if ((rssi_strength < dm_digtable->rssi_lowthresh) &&
(dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_1)) {
if (dm_digtable->dig_ext_port_stage ==
DIG_EXT_PORT_STAGE_2) {
dm_digtable->cur_igvalue = 0x20;
rtl8723e_dm_write_dig(hw);
}
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_1;
} else if (rssi_strength > dm_digtable->rssi_highthresh) {
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_2;
rtl92c_dm_ctrl_initgain_by_fa(hw);
}
} else if (dm_digtable->dig_ext_port_stage != DIG_EXT_PORT_STAGE_0) {
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_0;
dm_digtable->cur_igvalue = 0x20;
rtl8723e_dm_write_dig(hw);
}
RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
"curmultista_cstate = %x dig_ext_port_stage %x\n",
dm_digtable->curmultista_cstate,
dm_digtable->dig_ext_port_stage);
}
static void rtl8723e_dm_initial_gain_sta(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
"pre_sta_cstate = %x, cur_sta_cstate = %x\n",
dm_digtable->pre_sta_cstate,
dm_digtable->cur_sta_cstate);
if (dm_digtable->pre_sta_cstate == dm_digtable->cur_sta_cstate
|| dm_digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT
|| dm_digtable->cur_sta_cstate == DIG_STA_CONNECT) {
if (dm_digtable->cur_sta_cstate != DIG_STA_DISCONNECT) {
dm_digtable->rssi_val_min =
rtl8723e_dm_initial_gain_min_pwdb(hw);
rtl92c_dm_ctrl_initgain_by_rssi(hw);
}
} else {
dm_digtable->rssi_val_min = 0;
dm_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
dm_digtable->back_val = DM_DIG_BACKOFF_DEFAULT;
dm_digtable->cur_igvalue = 0x20;
dm_digtable->pre_igvalue = 0;
rtl8723e_dm_write_dig(hw);
}
}
static void rtl8723e_dm_initial_gain_sta(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
RT_TRACE(COMP_DIG, DBG_TRACE,
("presta_connectstate = %x,"
" cursta_connectctate = %x\n",
dm_digtable.presta_connectstate,
dm_digtable.cursta_connectctate));
if (dm_digtable.presta_connectstate == dm_digtable.cursta_connectctate
|| dm_digtable.cursta_connectctate == DIG_STA_BEFORE_CONNECT
|| dm_digtable.cursta_connectctate == DIG_STA_CONNECT) {
if (dm_digtable.cursta_connectctate != DIG_STA_DISCONNECT) {
dm_digtable.rssi_val_min =
rtl8723e_dm_initial_gain_min_pwdb(hw);
rtl92c_dm_ctrl_initgain_by_rssi(hw);
}
} else {
dm_digtable.rssi_val_min = 0;
dm_digtable.dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
dm_digtable.backoff_val = DM_DIG_BACKOFF_DEFAULT;
dm_digtable.cur_igvalue = 0x20;
dm_digtable.pre_igvalue = 0;
rtl8723e_dm_write_dig(hw);
}
}
static void rtl92c_dm_ctrl_initgain_by_fa(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
u8 value_igi = dm_digtable.cur_igvalue;
if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH0)
value_igi--;
else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH1)
value_igi += 0;
else if (rtlpriv->falsealm_cnt.cnt_all < DM_DIG_FA_TH2)
value_igi++;
else if (rtlpriv->falsealm_cnt.cnt_all >= DM_DIG_FA_TH2)
value_igi += 2;
if (value_igi > DM_DIG_FA_UPPER)
value_igi = DM_DIG_FA_UPPER;
else if (value_igi < DM_DIG_FA_LOWER)
value_igi = DM_DIG_FA_LOWER;
if (rtlpriv->falsealm_cnt.cnt_all > 10000)
value_igi = 0x32;
dm_digtable.cur_igvalue = value_igi;
rtl8723e_dm_write_dig(hw);
}
static void rtl92c_dm_ctrl_initgain_by_rssi(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
if (rtlpriv->falsealm_cnt.cnt_all > dm_digtable->fa_highthresh) {
if ((dm_digtable->back_val - 2) <
dm_digtable->back_range_min)
dm_digtable->back_val =
dm_digtable->back_range_min;
else
dm_digtable->back_val -= 2;
} else if (rtlpriv->falsealm_cnt.cnt_all < dm_digtable->fa_lowthresh) {
if ((dm_digtable->back_val + 2) >
dm_digtable->back_range_max)
dm_digtable->back_val =
dm_digtable->back_range_max;
else
dm_digtable->back_val += 2;
}
if ((dm_digtable->rssi_val_min + 10 - dm_digtable->back_val) >
dm_digtable->rx_gain_max)
dm_digtable->cur_igvalue = dm_digtable->rx_gain_max;
else if ((dm_digtable->rssi_val_min + 10 -
dm_digtable->back_val) < dm_digtable->rx_gain_min)
dm_digtable->cur_igvalue = dm_digtable->rx_gain_min;
else
dm_digtable->cur_igvalue = dm_digtable->rssi_val_min + 10 -
dm_digtable->back_val;
RT_TRACE(rtlpriv, COMP_DIG, DBG_TRACE,
"rssi_val_min = %x back_val %x\n",
dm_digtable->rssi_val_min, dm_digtable->back_val);
rtl8723e_dm_write_dig(hw);
}
