u32 sdio_read32(struct intf_hdl *pintfhdl, u32 addr)
{
PADAPTER padapter;
u8 bMacPwrCtrlOn;
u8 deviceId;
u16 offset;
u32 ftaddr;
u8 shift;
u32 val;
s32 err;
_func_enter_;
padapter = pintfhdl->padapter;
ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset);
rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100))
|| (_FALSE == bMacPwrCtrlOn)
#ifdef CONFIG_LPS_LCLK
|| (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode)
#endif
)
{
err = sd_cmd52_read(pintfhdl, ftaddr, 4, (u8*)&val);
#ifdef SDIO_DEBUG_IO
if (!err) {
#endif
val = le32_to_cpu(val);
return val;
#ifdef SDIO_DEBUG_IO
}
DBG_8192C(KERN_ERR "%s: Mac Power off, Read FAIL(%d)! addr=0x%x\n", __func__, err, addr);
return SDIO_ERR_VAL32;
#endif
}
// 4 bytes alignment
shift = ftaddr & 0x3;
if (shift == 0) {
val = sd_read32(pintfhdl, ftaddr, NULL);
} else {
u8 *ptmpbuf;
ptmpbuf = (u8*)rtw_malloc(8);
if (NULL == ptmpbuf) {
DBG_8192C(KERN_ERR "%s: Allocate memory FAIL!(size=8) addr=0x%x\n", __func__, addr);
return SDIO_ERR_VAL32;
}
ftaddr &= ~(u16)0x3;
sd_read(pintfhdl, ftaddr, 8, ptmpbuf);
_rtw_memcpy(&val, ptmpbuf+shift, 4);
val = le32_to_cpu(val);
rtw_mfree(ptmpbuf, 8);
}
_func_exit_;
return val;
}
/* dummy routines */
void rtw_proc_remove_one(struct net_device *dev)
{
}
void rtw_proc_init_one(struct net_device *dev)
{
}
#if 0 /* TODO: Convert these to /sys */
void rtw_proc_init_one(struct net_device *dev)
{
struct proc_dir_entry *dir_dev = NULL;
struct proc_dir_entry *entry = NULL;
struct adapter *padapter = rtw_netdev_priv(dev);
u8 rf_type;
if (rtw_proc == NULL) {
memcpy(rtw_proc_name, DRV_NAME, sizeof(DRV_NAME));
rtw_proc = create_proc_entry(rtw_proc_name, S_IFDIR, init_net.proc_net);
if (rtw_proc == NULL) {
DBG_88E(KERN_ERR "Unable to create rtw_proc directory\n");
return;
}
entry = create_proc_read_entry("ver_info", S_IFREG | S_IRUGO, rtw_proc, proc_get_drv_version, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
}
if (padapter->dir_dev == NULL) {
padapter->dir_dev = create_proc_entry(dev->name,
S_IFDIR | S_IRUGO | S_IXUGO,
rtw_proc);
dir_dev = padapter->dir_dev;
if (dir_dev == NULL) {
if (rtw_proc_cnt == 0) {
if (rtw_proc) {
remove_proc_entry(rtw_proc_name, init_net.proc_net);
rtw_proc = NULL;
}
}
pr_info("Unable to create dir_dev directory\n");
return;
}
} else {
return;
}
rtw_proc_cnt++;
entry = create_proc_read_entry("write_reg", S_IFREG | S_IRUGO,
dir_dev, proc_get_write_reg, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_write_reg;
entry = create_proc_read_entry("read_reg", S_IFREG | S_IRUGO,
dir_dev, proc_get_read_reg, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_read_reg;
entry = create_proc_read_entry("fwstate", S_IFREG | S_IRUGO,
dir_dev, proc_get_fwstate, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("sec_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_sec_info, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mlmext_state", S_IFREG | S_IRUGO,
dir_dev, proc_get_mlmext_state, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("qos_option", S_IFREG | S_IRUGO,
dir_dev, proc_get_qos_option, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("ht_option", S_IFREG | S_IRUGO,
dir_dev, proc_get_ht_option, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_info, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("ap_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_ap_info, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("adapter_state", S_IFREG | S_IRUGO,
dir_dev, proc_getstruct adapter_state, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("trx_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_trx_info, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mac_reg_dump1", S_IFREG | S_IRUGO,
dir_dev, proc_get_mac_reg_dump1, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mac_reg_dump2", S_IFREG | S_IRUGO,
dir_dev, proc_get_mac_reg_dump2, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mac_reg_dump3", S_IFREG | S_IRUGO,
dir_dev, proc_get_mac_reg_dump3, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("bb_reg_dump1", S_IFREG | S_IRUGO,
dir_dev, proc_get_bb_reg_dump1, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("bb_reg_dump2", S_IFREG | S_IRUGO,
dir_dev, proc_get_bb_reg_dump2, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("bb_reg_dump3", S_IFREG | S_IRUGO,
dir_dev, proc_get_bb_reg_dump3, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_reg_dump1", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump1, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_reg_dump2", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump2, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type)) {
entry = create_proc_read_entry("rf_reg_dump3", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump3, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_reg_dump4", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump4, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
}
#ifdef CONFIG_88EU_AP_MODE
entry = create_proc_read_entry("all_sta_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_all_sta_info, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
#endif
entry = create_proc_read_entry("best_channel", S_IFREG | S_IRUGO,
dir_dev, proc_get_best_channel, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rx_signal", S_IFREG | S_IRUGO,
dir_dev, proc_get_rx_signal, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_rx_signal;
entry = create_proc_read_entry("ht_enable", S_IFREG | S_IRUGO,
dir_dev, proc_get_ht_enable, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_ht_enable;
entry = create_proc_read_entry("cbw40_enable", S_IFREG | S_IRUGO,
dir_dev, proc_get_cbw40_enable, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_cbw40_enable;
entry = create_proc_read_entry("ampdu_enable", S_IFREG | S_IRUGO,
dir_dev, proc_get_ampdu_enable, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_ampdu_enable;
entry = create_proc_read_entry("rx_stbc", S_IFREG | S_IRUGO,
dir_dev, proc_get_rx_stbc, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_rx_stbc;
entry = create_proc_read_entry("path_rssi", S_IFREG | S_IRUGO,
dir_dev, proc_get_two_path_rssi, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rssi_disp", S_IFREG | S_IRUGO,
dir_dev, proc_get_rssi_disp, dev);
if (!entry) {
pr_info("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_rssi_disp;
}
void rtw_proc_remove_one(struct net_device *dev)
{
struct proc_dir_entry *dir_dev = NULL;
struct adapter *padapter = rtw_netdev_priv(dev);
u8 rf_type;
dir_dev = padapter->dir_dev;
padapter->dir_dev = NULL;
if (dir_dev) {
remove_proc_entry("write_reg", dir_dev);
remove_proc_entry("read_reg", dir_dev);
remove_proc_entry("fwstate", dir_dev);
remove_proc_entry("sec_info", dir_dev);
remove_proc_entry("mlmext_state", dir_dev);
remove_proc_entry("qos_option", dir_dev);
remove_proc_entry("ht_option", dir_dev);
remove_proc_entry("rf_info", dir_dev);
remove_proc_entry("ap_info", dir_dev);
remove_proc_entry("adapter_state", dir_dev);
remove_proc_entry("trx_info", dir_dev);
remove_proc_entry("mac_reg_dump1", dir_dev);
remove_proc_entry("mac_reg_dump2", dir_dev);
remove_proc_entry("mac_reg_dump3", dir_dev);
remove_proc_entry("bb_reg_dump1", dir_dev);
remove_proc_entry("bb_reg_dump2", dir_dev);
remove_proc_entry("bb_reg_dump3", dir_dev);
remove_proc_entry("rf_reg_dump1", dir_dev);
remove_proc_entry("rf_reg_dump2", dir_dev);
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type)) {
remove_proc_entry("rf_reg_dump3", dir_dev);
remove_proc_entry("rf_reg_dump4", dir_dev);
}
#ifdef CONFIG_88EU_AP_MODE
remove_proc_entry("all_sta_info", dir_dev);
#endif
remove_proc_entry("best_channel", dir_dev);
remove_proc_entry("rx_signal", dir_dev);
remove_proc_entry("cbw40_enable", dir_dev);
remove_proc_entry("ht_enable", dir_dev);
remove_proc_entry("ampdu_enable", dir_dev);
remove_proc_entry("rx_stbc", dir_dev);
remove_proc_entry("path_rssi", dir_dev);
remove_proc_entry("rssi_disp", dir_dev);
remove_proc_entry(dev->name, rtw_proc);
dir_dev = NULL;
} else {
return;
}
rtw_proc_cnt--;
if (rtw_proc_cnt == 0) {
if (rtw_proc) {
remove_proc_entry("ver_info", rtw_proc);
remove_proc_entry(rtw_proc_name, init_net.proc_net);
rtw_proc = NULL;
}
}
}
/*
* Description:
* This function MUST be called under power lock protect
*
* Parameters
* padapter
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
*
*/
void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
{
u8 rpwm;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
u8 cpwm_orig;
pslv = PS_STATE(pslv);
if (pwrpriv->brpwmtimeout == true)
{
DBG_871X("%s: RPWM timeout, force to set RPWM(0x%02X) again!\n", __FUNCTION__, pslv);
}
else
{
if ((pwrpriv->rpwm == pslv)
|| ((pwrpriv->rpwm >= PS_STATE_S2)&&(pslv >= PS_STATE_S2)))
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: Already set rpwm[0x%02X], new =0x%02X!\n", __FUNCTION__, pwrpriv->rpwm, pslv));
return;
}
}
if ((padapter->bSurpriseRemoved == true) ||
(padapter->hw_init_completed == false))
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n",
__FUNCTION__, padapter->bSurpriseRemoved, padapter->hw_init_completed));
pwrpriv->cpwm = PS_STATE_S4;
return;
}
if (padapter->bDriverStopped == true)
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: change power state(0x%02X) when DriverStopped\n", __FUNCTION__, pslv));
if (pslv < PS_STATE_S2) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: Reject to enter PS_STATE(0x%02X) lower than S2 when DriverStopped!!\n", __FUNCTION__, pslv));
return;
}
}
rpwm = pslv | pwrpriv->tog;
/* only when from PS_STATE S0/S1 to S2 and higher needs ACK */
if ((pwrpriv->cpwm < PS_STATE_S2) && (pslv >= PS_STATE_S2))
rpwm |= PS_ACK;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("rtw_set_rpwm: rpwm =0x%02x cpwm =0x%02x\n", rpwm, pwrpriv->cpwm));
pwrpriv->rpwm = pslv;
cpwm_orig = 0;
if (rpwm & PS_ACK)
{
rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig);
}
if (rpwm & PS_ACK)
_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS);
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
pwrpriv->tog += 0x80;
/* No LPS 32K, No Ack */
if (rpwm & PS_ACK)
{
unsigned long start_time;
u8 cpwm_now;
u8 poll_cnt =0;
start_time = jiffies;
/* polling cpwm */
do {
mdelay(1);
poll_cnt++;
rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
if ((cpwm_orig ^ cpwm_now) & 0x80)
{
pwrpriv->cpwm = PS_STATE_S4;
pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
break;
}
if (jiffies_to_msecs(jiffies - start_time) > LPS_RPWM_WAIT_MS)
{
DBG_871X("%s: polling cpwm timeout! poll_cnt =%d, cpwm_orig =%02x, cpwm_now =%02x \n", __FUNCTION__, poll_cnt, cpwm_orig, cpwm_now);
_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
break;
}
} while (1);
}
else
{
pwrpriv->cpwm = pslv;
}
}
void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg)
{
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("%s: PowerMode =%d Smart_PS =%d\n",
__FUNCTION__, ps_mode, smart_ps));
if (ps_mode > PM_Card_Disable) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("ps_mode:%d error\n", ps_mode));
return;
}
if (pwrpriv->pwr_mode == ps_mode)
{
if (PS_MODE_ACTIVE == ps_mode) return;
}
down(&pwrpriv->lock);
/* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */
if (ps_mode == PS_MODE_ACTIVE)
{
if (1
&& (((rtw_btcoex_IsBtControlLps(padapter) == false)
)
|| ((rtw_btcoex_IsBtControlLps(padapter) == true)
&& (rtw_btcoex_IsLpsOn(padapter) == false))
)
)
{
DBG_871X(FUNC_ADPT_FMT" Leave 802.11 power save - %s\n",
FUNC_ADPT_ARG(padapter), msg);
pwrpriv->pwr_mode = ps_mode;
rtw_set_rpwm(padapter, PS_STATE_S4);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
if (pwrpriv->wowlan_mode == true ||
pwrpriv->wowlan_ap_mode == true)
{
unsigned long start_time;
u32 delay_ms;
u8 val8;
delay_ms = 20;
start_time = jiffies;
do {
rtw_hal_get_hwreg(padapter, HW_VAR_SYS_CLKR, &val8);
if (!(val8 & BIT(4))){ /* 0x08 bit4 =1 --> in 32k, bit4 = 0 --> leave 32k */
pwrpriv->cpwm = PS_STATE_S4;
break;
}
if (jiffies_to_msecs(jiffies - start_time) > delay_ms)
{
DBG_871X("%s: Wait for FW 32K leave more than %u ms!!!\n",
__FUNCTION__, delay_ms);
pdbgpriv->dbg_wow_leave_ps_fail_cnt++;
break;
}
msleep(1);
} while (1);
}
#endif
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pwrpriv->bFwCurrentInPSMode = false;
rtw_btcoex_LpsNotify(padapter, ps_mode);
}
}
else
{
if ((PS_RDY_CHECK(padapter) && check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE))
|| ((rtw_btcoex_IsBtControlLps(padapter) == true)
&& (rtw_btcoex_IsLpsOn(padapter) == true))
)
{
u8 pslv;
DBG_871X(FUNC_ADPT_FMT" Enter 802.11 power save - %s\n",
FUNC_ADPT_ARG(padapter), msg);
rtw_btcoex_LpsNotify(padapter, ps_mode);
pwrpriv->bFwCurrentInPSMode = true;
pwrpriv->pwr_mode = ps_mode;
pwrpriv->smart_ps = smart_ps;
pwrpriv->bcn_ant_mode = bcn_ant_mode;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pslv = PS_STATE_S2;
if (pwrpriv->alives == 0)
pslv = PS_STATE_S0;
if ((rtw_btcoex_IsBtDisabled(padapter) == false)
&& (rtw_btcoex_IsBtControlLps(padapter) == true))
{
u8 val8;
val8 = rtw_btcoex_LpsVal(padapter);
if (val8 & BIT(4))
pslv = PS_STATE_S2;
}
rtw_set_rpwm(padapter, pslv);
}
}
up(&pwrpriv->lock);
}
VOID
rtl8812_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
u8 hw_init_completed = _FALSE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
#endif //CONFIG_CONCURRENT_MODE
_func_enter_;
hw_init_completed = Adapter->hw_init_completed;
if (hw_init_completed == _FALSE)
goto skip_dm;
#ifdef CONFIG_LPS
bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
#endif
#ifdef CONFIG_P2P_PS
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P_PS
if( (hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
//
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
rtw_hal_check_rxfifo_full(Adapter);
//
// Dynamically switch RTS/CTS protection.
//
//dm_CheckProtection(Adapter);
#ifdef CONFIG_PCI_HCI
// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
}
//ODM
if (hw_init_completed == _TRUE)
{
u8 bLinked=_FALSE;
u8 bsta_state=_FALSE;
#ifdef CONFIG_DISABLE_ODM
pHalData->odmpriv.SupportAbility = 0;
#endif
if(rtw_linked_check(Adapter)){
bLinked = _TRUE;
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
}
#ifdef CONFIG_CONCURRENT_MODE
if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){
bLinked = _TRUE;
if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
}
#endif //CONFIG_CONCURRENT_MODE
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state);
ODM_DMWatchdog(&pHalData->odmpriv);
}
skip_dm:
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
// Check GPIO to determine current Pbc status.
dm_CheckPbcGPIO(Adapter);
#endif
return;
}
void rtw_proc_remove_one(struct net_device *ndev)
{
struct proc_dir_entry *dir_dev = NULL;
struct rtl_priv *rtlpriv = rtl_priv(dev);
uint8_t rf_type;
dir_dev = rtlpriv->dir_dev;
rtlpriv->dir_dev = NULL;
if (dir_dev) {
remove_proc_entry("write_reg", dir_dev);
remove_proc_entry("read_reg", dir_dev);
remove_proc_entry("fwstate", dir_dev);
remove_proc_entry("sec_info", dir_dev);
remove_proc_entry("mlmext_state", dir_dev);
remove_proc_entry("qos_option", dir_dev);
remove_proc_entry("ht_option", dir_dev);
remove_proc_entry("rf_info", dir_dev);
remove_proc_entry("ap_info", dir_dev);
remove_proc_entry("adapter_state", dir_dev);
remove_proc_entry("trx_info", dir_dev);
remove_proc_entry("mac_reg_dump1", dir_dev);
remove_proc_entry("mac_reg_dump2", dir_dev);
remove_proc_entry("mac_reg_dump3", dir_dev);
remove_proc_entry("bb_reg_dump1", dir_dev);
remove_proc_entry("bb_reg_dump2", dir_dev);
remove_proc_entry("bb_reg_dump3", dir_dev);
remove_proc_entry("rf_reg_dump1", dir_dev);
remove_proc_entry("rf_reg_dump2", dir_dev);
rtw_hal_get_hwreg(rtlpriv, HW_VAR_RF_TYPE, (uint8_t *)(&rf_type));
if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type)) {
remove_proc_entry("rf_reg_dump3", dir_dev);
remove_proc_entry("rf_reg_dump4", dir_dev);
}
#ifdef CONFIG_AP_MODE
remove_proc_entry("all_sta_info", dir_dev);
#endif
remove_proc_entry("rx_signal", dir_dev);
#ifdef CONFIG_80211N_HT
remove_proc_entry("bw_mode", dir_dev);
remove_proc_entry("ht_enable", dir_dev);
remove_proc_entry("ampdu_enable", dir_dev);
remove_proc_entry("rx_stbc", dir_dev);
#endif
remove_proc_entry("path_rssi", dir_dev);
remove_proc_entry("rssi_disp", dir_dev);
#if defined(DBG_CONFIG_ERROR_DETECT)
remove_proc_entry("sreset", dir_dev);
#endif
remove_proc_entry(dev->name, rtw_proc);
dir_dev = NULL;
} else {
return;
}
rtw_proc_cnt--;
if (rtw_proc_cnt == 0) {
if (rtw_proc) {
remove_proc_entry("ver_info", rtw_proc);
remove_proc_entry(rtw_proc_name, init_net.proc_net);
rtw_proc = NULL;
}
}
}
/*
* rtw_get_cur_max_rate -
* @adapter: pointer to _adapter structure
*
* Return 0 or 100Kbps
*/
u16 rtw_get_cur_max_rate(_adapter *adapter)
{
int i = 0;
u8 *p;
u16 rate = 0, max_rate = 0;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct registry_priv *pregistrypriv = &adapter->registrypriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network;
#ifdef CONFIG_80211N_HT
struct rtw_ieee80211_ht_cap *pht_capie;
u8 rf_type = 0;
u8 bw_40MHz=0, short_GI_20=0, short_GI_40=0;
u16 mcs_rate=0;
u32 ht_ielen = 0;
#endif
if (adapter->registrypriv.mp_mode == 1)
{
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == true)
return 0;
}
if ((check_fwstate(pmlmepriv, _FW_LINKED) != true)
&& (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != true))
return 0;
#ifdef CONFIG_80211N_HT
if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N|WIRELESS_11_5N)) {
p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12);
if (p && ht_ielen>0)
{
pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2);
_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
/* cur_bwmod is updated by beacon, pmlmeinfo is updated by association response */
bw_40MHz = (pmlmeext->cur_bwmode && (HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH & pmlmeinfo->HT_info.infos[0])) ? 1:0;
short_GI_20 = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info)&IEEE80211_HT_CAP_SGI_20) ? 1:0;
short_GI_40 = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info)&IEEE80211_HT_CAP_SGI_40) ? 1:0;
rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
max_rate = rtw_mcs_rate(
rf_type,
bw_40MHz & (pregistrypriv->cbw40_enable),
short_GI_20,
short_GI_40,
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate
);
}
}
else
#endif /* CONFIG_80211N_HT */
{
while ( (pcur_bss->SupportedRates[i]!=0) && (pcur_bss->SupportedRates[i]!=0xFF))
{
rate = pcur_bss->SupportedRates[i]&0x7F;
if (rate>max_rate)
max_rate = rate;
i++;
}
max_rate = max_rate*10/2;
}
return max_rate;
}
/*
* rtw_get_cur_max_rate -
* @adapter: pointer to _adapter structure
*
* Return 0 or 100Kbps
*/
u16 rtw_get_cur_max_rate(_adapter *adapter)
{
int i = 0;
u8 *p;
u16 rate = 0, max_rate = 0;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct registry_priv *pregistrypriv = &adapter->registrypriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network;
#ifdef CONFIG_80211N_HT
struct rtw_ieee80211_ht_cap *pht_capie;
u8 rf_type = 0;
u8 bw_40MHz=0, short_GI_20=0, short_GI_40=0, cbw40_enable=0;
u16 mcs_rate=0;
u32 ht_ielen = 0;
#endif
#ifdef CONFIG_80211AC_VHT
struct vht_priv *pvhtpriv = &pmlmepriv->vhtpriv;
#endif
#ifdef CONFIG_MP_INCLUDED
if (adapter->registrypriv.mp_mode == 1)
{
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
return 0;
}
#endif
if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE)
&& (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE))
return 0;
#ifdef CONFIG_80211N_HT
if (IsSupportedTxHT(pmlmeext->cur_wireless_mode)) {
p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12);
if(p && ht_ielen>0)
{
pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2);
_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
//bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0;
//cur_bwmod is updated by beacon, pmlmeinfo is updated by association response
bw_40MHz = (pmlmeext->cur_bwmode && (HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH & pmlmeinfo->HT_info.infos[0])) ? 1:0;
//short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0;
short_GI_20 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_20) ? 1:0;
short_GI_40 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_40) ? 1:0;
rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if (pmlmeext->cur_channel > 14) {
if ((pregistrypriv->bw_mode & 0xf0) > 0)
cbw40_enable = 1;
} else {
if ((pregistrypriv->bw_mode & 0x0f) > 0)
cbw40_enable = 1;
}
max_rate = rtw_mcs_rate(
rf_type,
bw_40MHz & cbw40_enable,
short_GI_20,
short_GI_40,
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate
);
}
}
#ifdef CONFIG_80211AC_VHT
else if (IsSupportedVHT(pmlmeext->cur_wireless_mode)) {
max_rate = ((rtw_vht_data_rate(pvhtpriv->bwmode, pvhtpriv->sgi, pvhtpriv->vht_highest_rate) + 1) >> 1) * 10;
}
/*
*
* Parameters
* padapter
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
*
*/
void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
{
u8 rpwm;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
u8 cpwm_orig = 0;
u8 cpwm_now = 0;
u32 cpwm_polling_start_time = 0;
u8 pollingRes = _FAIL;
#endif
_func_enter_;
pslv = PS_STATE(pslv);
if (_TRUE == pwrpriv->btcoex_rfon)
{
if (pslv < PS_STATE_S4)
pslv = PS_STATE_S3;
}
#ifdef CONFIG_LPS_RPWM_TIMER
if (pwrpriv->brpwmtimeout == _TRUE)
{
DBG_871X("%s: RPWM timeout, force to set RPWM(0x%02X) again!\n", __FUNCTION__, pslv);
}
else
#endif // CONFIG_LPS_RPWM_TIMER
{
if ( (pwrpriv->rpwm == pslv)
#ifdef CONFIG_LPS_LCLK
#ifndef CONFIG_RTL8723A
|| ((pwrpriv->rpwm >= PS_STATE_S2)&&(pslv >= PS_STATE_S2))
#endif
#endif
)
{
RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,
("%s: Already set rpwm[0x%02X], new=0x%02X!\n", __FUNCTION__, pwrpriv->rpwm, pslv));
return;
}
}
if ((padapter->bSurpriseRemoved == _TRUE) ||
(padapter->hw_init_completed == _FALSE))
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n",
__FUNCTION__, padapter->bSurpriseRemoved, padapter->hw_init_completed));
pwrpriv->cpwm = PS_STATE_S4;
return;
}
if (padapter->bDriverStopped == _TRUE)
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: change power state(0x%02X) when DriverStopped\n", __FUNCTION__, pslv));
if (pslv < PS_STATE_S2) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: Reject to enter PS_STATE(0x%02X) lower than S2 when DriverStopped!!\n", __FUNCTION__, pslv));
return;
}
}
rpwm = pslv | pwrpriv->tog;
#ifdef CONFIG_LPS_LCLK
// only when from PS_STATE S0/S1 to S2 and higher needs ACK
if ((pwrpriv->cpwm < PS_STATE_S2) && (pslv >= PS_STATE_S2))
rpwm |= PS_ACK;
#endif
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("rtw_set_rpwm: rpwm=0x%02x cpwm=0x%02x\n", rpwm, pwrpriv->cpwm));
pwrpriv->rpwm = pslv;
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
if (rpwm & PS_ACK)
{
//cpwm_orig = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1);
rtw_hal_get_hwreg(padapter, HW_VAR_GET_CPWM, (u8 *)(&cpwm_orig));
}
#endif
#if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING)
if (rpwm & PS_ACK)
_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS);
#endif // CONFIG_LPS_RPWM_TIMER && !CONFIG_DETECT_CPWM_BY_POLLING
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
pwrpriv->tog += 0x80;
#ifdef CONFIG_LPS_LCLK
// No LPS 32K, No Ack
if (!(rpwm & PS_ACK))
#endif
{
pwrpriv->cpwm = pslv;
}
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
if (rpwm & PS_ACK)
{
cpwm_polling_start_time = rtw_get_current_time();
//polling cpwm
do{
rtw_mdelay_os(1);
//cpwm_now = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1);
rtw_hal_get_hwreg(padapter, HW_VAR_GET_CPWM, (u8 *)(&cpwm_now));
if ((cpwm_orig ^ cpwm_now) & 0x80)
{
#ifdef CONFIG_LPS_LCLK
#ifdef CONFIG_RTL8723A
pwrpriv->cpwm = PS_STATE(cpwm_now);
#else // !CONFIG_RTL8723A
pwrpriv->cpwm = PS_STATE_S4;
#endif // !CONFIG_RTL8723A
pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
#endif
pollingRes = _SUCCESS;
break;
}
}while (rtw_get_passing_time_ms(cpwm_polling_start_time) < LPS_RPWM_WAIT_MS);
if (pollingRes == _FAIL)
{
#ifdef CONFIG_LPS_RPWM_TIMER
_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
#endif
DBG_871X("%s polling cpwm timeout!!!!!!!!!!\n", __FUNCTION__);
}
}
#endif
_func_exit_;
}
void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode)
{
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
#ifdef CONFIG_P2P
struct wifidirect_info *pwdinfo = &( padapter->wdinfo );
#endif //CONFIG_P2P
#ifdef CONFIG_TDLS
struct sta_priv *pstapriv = &padapter->stapriv;
_irqL irqL;
int i, j;
_list *plist, *phead;
struct sta_info *ptdls_sta;
#endif //CONFIG_TDLS
_func_enter_;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("%s: PowerMode=%d Smart_PS=%d\n",
__FUNCTION__, ps_mode, smart_ps));
if(ps_mode > PM_Card_Disable) {
RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("ps_mode:%d error\n", ps_mode));
return;
}
if (pwrpriv->pwr_mode == ps_mode)
{
if (PS_MODE_ACTIVE == ps_mode) return;
if ((pwrpriv->smart_ps == smart_ps) &&
(pwrpriv->bcn_ant_mode == bcn_ant_mode))
{
return;
}
}
#ifdef CONFIG_LPS_LCLK
_enter_pwrlock(&pwrpriv->lock);
#endif
//if(pwrpriv->pwr_mode == PS_MODE_ACTIVE)
if(ps_mode == PS_MODE_ACTIVE)
{
#ifdef CONFIG_P2P_PS
if(pwdinfo->opp_ps == 0)
#endif //CONFIG_P2P_PS
{
DBG_871X("rtw_set_ps_mode: Leave 802.11 power save\n");
#ifdef CONFIG_TDLS
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for(i=0; i< NUM_STA; i++)
{
phead = &(pstapriv->sta_hash[i]);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE)
{
ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
if( ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE )
issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 0);
plist = get_next(plist);
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
#endif //CONFIG_TDLS
pwrpriv->pwr_mode = ps_mode;
rtw_set_rpwm(padapter, PS_STATE_S4);
#ifdef CONFIG_WOWLAN
if (pwrpriv->wowlan_mode == _TRUE)
{
u32 start_time, delay_ms;
u8 val8;
delay_ms = 20;
start_time = rtw_get_current_time();
do {
rtw_hal_get_hwreg(padapter, HW_VAR_SYS_CLKR, &val8);
if (!(val8 & BIT(4))){ //0x08 bit4 =1 --> in 32k, bit4 = 0 --> leave 32k
pwrpriv->cpwm = PS_STATE_S4;
break;
}
if (rtw_get_passing_time_ms(start_time) > delay_ms)
{
DBG_871X("%s: Wait for FW 32K leave more than %u ms!!!\n", __FUNCTION__, delay_ms);
break;
}
rtw_usleep_os(100);
} while (1);
}
#endif
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pwrpriv->bFwCurrentInPSMode = _FALSE;
}
}
VOID
rtl8723b_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
#endif //CONFIG_CONCURRENT_MODE
//#if MP_DRIVER
if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0) // for MP power tracking
return;
//#endif
if (!rtw_is_hw_init_completed(Adapter))
goto skip_dm;
#ifdef CONFIG_LPS
bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
#endif
#ifdef CONFIG_P2P
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P
if ((rtw_is_hw_init_completed(Adapter))
&& ((!bFwCurrentInPSMode) && bFwPSAwake)) {
//
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
rtw_hal_check_rxfifo_full(Adapter);
//
// Dynamically switch RTS/CTS protection.
//
//dm_CheckProtection(Adapter);
#ifdef CONFIG_PCI_HCI
// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
}
//ODM
if (rtw_is_hw_init_completed(Adapter))
{
u8 bLinked=_FALSE;
u8 bsta_state=_FALSE;
u8 bBtDisabled = _TRUE;
if(rtw_linked_check(Adapter)){
bLinked = _TRUE;
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
}
#ifdef CONFIG_CONCURRENT_MODE
if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){
bLinked = _TRUE;
if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
}
#endif //CONFIG_CONCURRENT_MODE
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state);
//ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
#ifdef CONFIG_BT_COEXIST
bBtDisabled = rtw_btcoex_IsBtDisabled(Adapter);
#endif // CONFIG_BT_COEXIST
ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, ((bBtDisabled == _TRUE)?_FALSE:_TRUE));
ODM_DMWatchdog(&pHalData->odmpriv);
}
skip_dm:
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
//if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
//{
//RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
// dm_CheckRfCtrlGPIO(Adapter);
//}
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
dm_CheckPbcGPIO(Adapter);
#endif
return;
}
void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus)
{
JOINBSSRPT_PARM_88E JoinBssRptParm;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
#ifdef CONFIG_WOWLAN
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_info *psta = NULL;
#endif
BOOLEAN bSendBeacon=_FALSE;
BOOLEAN bcn_valid = _FALSE;
u8 DLBcnCount=0;
u32 poll = 0;
_func_enter_;
DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus);
if(mstatus == 1)
{
// We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C.
// Suggested by filen. Added by tynli.
rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
// Do not set TSF again here or vWiFi beacon DMA INT will not work.
//correct_TSF(padapter, pmlmeext);
// Hw sequende enable by dedault. 2010.06.23. by tynli.
//rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF));
//rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF);
//Set REG_CR bit 8. DMA beacon by SW.
pHalData->RegCR_1 |= BIT0;
rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1);
// Disable Hw protection for a time which revserd for Hw sending beacon.
// Fix download reserved page packet fail that access collision with the protection time.
// 2010.05.11. Added by tynli.
//SetBcnCtrlReg(padapter, 0, BIT3);
//SetBcnCtrlReg(padapter, BIT4, 0);
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3)));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4));
if(pHalData->RegFwHwTxQCtrl&BIT6)
{
DBG_871X("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
bSendBeacon = _TRUE;
}
// Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6)));
pHalData->RegFwHwTxQCtrl &= (~BIT6);
// Clear beacon valid check bit.
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
poll = 0;
do
{
// download rsvd page.
SetFwRsvdPagePkt(padapter, _FALSE);
DLBcnCount++;
do
{
rtw_yield_os();
//rtw_mdelay_os(10);
// check rsvd page download OK.
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid));
poll++;
} while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
}while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
//RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n"));
if(padapter->bSurpriseRemoved || padapter->bDriverStopped)
{
}
else if(!bcn_valid)
DBG_871X(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
ADPT_ARG(padapter) ,DLBcnCount, poll);
else {
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
pwrctl->fw_psmode_iface_id = padapter->iface_id;
DBG_871X(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n",
ADPT_ARG(padapter), DLBcnCount, poll);
}
//
// We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower)
// becuase we need to free the Tx BCN Desc which is used by the first reserved page packet.
// At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return
// the beacon TCB in the following code. 2011.11.23. by tynli.
//
//if(bcn_valid && padapter->bEnterPnpSleep)
if(0)
{
if(bSendBeacon)
{
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
poll = 0;
do
{
SetFwRsvdPagePkt(padapter, _TRUE);
DLBcnCount++;
do
{
rtw_yield_os();
//rtw_mdelay_os(10);
// check rsvd page download OK.
rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid));
poll++;
} while(!bcn_valid && (poll%10)!=0 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
}while(!bcn_valid && DLBcnCount<=100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped);
//RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n"));
if(padapter->bSurpriseRemoved || padapter->bDriverStopped)
{
}
else if(!bcn_valid)
DBG_871X("%s: 2 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll);
else
DBG_871X("%s: 2 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll);
}
}
// Enable Bcn
//SetBcnCtrlReg(padapter, BIT3, 0);
//SetBcnCtrlReg(padapter, 0, BIT4);
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3));
rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4)));
// To make sure that if there exists an adapter which would like to send beacon.
// If exists, the origianl value of 0x422[6] will be 1, we should check this to
// prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
// the beacon cannot be sent by HW.
// 2010.06.23. Added by tynli.
if(bSendBeacon)
{
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6));
pHalData->RegFwHwTxQCtrl |= BIT6;
}
//
// Update RSVD page location H2C to Fw.
//
if(bcn_valid)
{
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
DBG_871X("Set RSVD page location to Fw.\n");
//FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc);
}
// Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.
//if(!padapter->bEnterPnpSleep)
{
// Clear CR[8] or beacon packet will not be send to TxBuf anymore.
pHalData->RegCR_1 &= (~BIT0);
rtw_write8(padapter, REG_CR+1, pHalData->RegCR_1);
}
}
#ifdef CONFIG_WOWLAN
if (adapter_to_pwrctl(padapter)->wowlan_mode){
JoinBssRptParm.OpMode = mstatus;
psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(pmlmepriv));
if (psta != NULL) {
JoinBssRptParm.MacID = psta->mac_id;
} else {
JoinBssRptParm.MacID = 0;
}
FillH2CCmd_88E(padapter, H2C_COM_MEDIA_STATUS_RPT, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm);
DBG_871X_LEVEL(_drv_info_, "%s opmode:%d MacId:%d\n", __func__, JoinBssRptParm.OpMode, JoinBssRptParm.MacID);
} else {
DBG_871X_LEVEL(_drv_info_, "%s wowlan_mode is off\n", __func__);
}
#endif //CONFIG_WOWLAN
_func_exit_;
}
VOID
rtl8723b_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
u8 hw_init_completed = _FALSE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
#endif //CONFIG_CONCURRENT_MODE
hw_init_completed = Adapter->hw_init_completed;
if (hw_init_completed == _FALSE)
goto skip_dm;
#ifdef CONFIG_LPS
bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
#endif
#ifdef CONFIG_P2P
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P
if( (hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
//
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
rtw_hal_check_rxfifo_full(Adapter);
}
//ODM
if (hw_init_completed == _TRUE)
{
u8 bLinked=_FALSE;
u8 bsta_state=_FALSE;
u8 bBtDisabled = _TRUE;
if(rtw_linked_check(Adapter)){
bLinked = _TRUE;
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
}
#ifdef CONFIG_CONCURRENT_MODE
if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter)){
bLinked = _TRUE;
if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
}
#endif //CONFIG_CONCURRENT_MODE
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state);
//FindMinimumRSSI_8723b(Adapter);
//ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
#ifdef CONFIG_BT_COEXIST
bBtDisabled = rtw_btcoex_IsBtDisabled(Adapter);
#endif // CONFIG_BT_COEXIST
ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, ((bBtDisabled == _TRUE)?_FALSE:_TRUE));
ODM_DMWatchdog(&pHalData->odmpriv);
}
skip_dm:
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
//if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
//{
//RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
// dm_CheckRfCtrlGPIO(Adapter);
//}
#ifdef CONFIG_SUPPORT_HW_WPS_PBC
dm_CheckPbcGPIO(Adapter);
#endif
return;
}
s32 sdio_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
{
PADAPTER padapter;
u8 bMacPwrCtrlOn;
u8 deviceId;
u16 offset;
u32 ftaddr;
u8 shift;
s32 err;
_func_enter_;
padapter = pintfhdl->padapter;
err = 0;
ftaddr = _cvrt2ftaddr(addr, &deviceId, &offset);
rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
if (((deviceId == WLAN_IOREG_DEVICE_ID) && (offset < 0x100))
|| (_FALSE == bMacPwrCtrlOn)
#ifdef CONFIG_LPS_LCLK
|| (_TRUE == adapter_to_pwrctl(padapter)->bFwCurrentInPSMode)
#endif
)
{
val = cpu_to_le32(val);
err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val);
return err;
}
// 4 bytes alignment
shift = ftaddr & 0x3;
#if 1
if (shift == 0)
{
sd_write32(pintfhdl, ftaddr, val, &err);
}
else
{
val = cpu_to_le32(val);
err = sd_cmd52_write(pintfhdl, ftaddr, 4, (u8*)&val);
}
#else
if (shift == 0) {
sd_write32(pintfhdl, ftaddr, val, &err);
} else {
u8 *ptmpbuf;
ptmpbuf = (u8*)rtw_malloc(8);
if (NULL == ptmpbuf) return (-1);
ftaddr &= ~(u16)0x3;
err = sd_read(pintfhdl, ftaddr, 8, ptmpbuf);
if (err) {
rtw_mfree(ptmpbuf, 8);
return err;
}
val = cpu_to_le32(val);
_rtw_memcpy(ptmpbuf+shift, &val, 4);
err = sd_write(pintfhdl, ftaddr, 8, ptmpbuf);
rtw_mfree(ptmpbuf, 8);
}
#endif
_func_exit_;
return err;
}
VOID
rtl8188e_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
u8 hw_init_completed = _FALSE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
#endif //CONFIG_CONCURRENT_MODE
_func_enter_;
hw_init_completed = Adapter->hw_init_completed;
if (hw_init_completed == _FALSE)
goto skip_dm;
#ifdef CONFIG_LPS
#ifdef CONFIG_CONCURRENT_MODE
if (Adapter->iface_type != IFACE_PORT0 && pbuddy_adapter) {
bFwCurrentInPSMode = pbuddy_adapter->pwrctrlpriv.bFwCurrentInPSMode;
rtw_hal_get_hwreg(pbuddy_adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
} else
#endif //CONFIG_CONCURRENT_MODE
{
bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
}
#endif
#ifdef CONFIG_P2P_PS
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P_PS
if( (hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
//
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
//
// Dynamically switch RTS/CTS protection.
//
//dm_CheckProtection(Adapter);
#ifdef CONFIG_PCI_HCI
// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
}
//ODM
if (hw_init_completed == _TRUE)
{
u8 bLinked=_FALSE;
#ifdef CONFIG_DISABLE_ODM
pHalData->odmpriv.SupportAbility = 0;
#endif
if(rtw_linked_check(Adapter))
bLinked = _TRUE;
#ifdef CONFIG_CONCURRENT_MODE
if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter))
bLinked = _TRUE;
#endif //CONFIG_CONCURRENT_MODE
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
ODM_DMWatchdog(&pHalData->odmpriv);
}
skip_dm:
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
#ifdef CONFIG_PCI_HCI
if(pHalData->bGpioHwWpsPbc)
#endif
{
//temp removed
//dm_CheckPbcGPIO(Adapter);
}
return;
}
VOID
rtl8723a_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
u8 hw_init_completed = _FALSE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
#endif //CONFIG_CONCURRENT_MODE
hw_init_completed = Adapter->hw_init_completed;
#if (MP_DRIVER == 1)
if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0)
return;
#endif
if (hw_init_completed == _FALSE)
goto skip_dm;
#ifdef CONFIG_LPS
bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
#endif
#ifdef CONFIG_P2P_PS
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_mode)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P_PS
if( (hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
//
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
#ifdef CONFIG_CONCURRENT_MODE
if(Adapter->adapter_type > PRIMARY_ADAPTER)
goto _record_initrate;
#endif
//
// Dynamically switch RTS/CTS protection.
//
//dm_CheckProtection(Adapter);
#ifdef CONFIG_PCI_HCI
// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
_record_initrate:
// Read REG_INIDATA_RATE_SEL value for TXDESC.
if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
{
pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
}
else
{
u8 i;
for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
{
pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
}
}
}
//ODM
if (hw_init_completed == _TRUE)
{
u8 bLinked=_FALSE;
u8 bsta_state=_FALSE;
#ifdef CONFIG_DISABLE_ODM
pHalData->odmpriv.SupportAbility = 0;
#endif
if(rtw_linked_check(Adapter))
bLinked = _TRUE;
#ifdef CONFIG_CONCURRENT_MODE
if(pbuddy_adapter && rtw_linked_check(pbuddy_adapter))
bLinked = _TRUE;
#endif //CONFIG_CONCURRENT_MODE
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
#ifdef CONFIG_CONCURRENT_MODE
if(pbuddy_adapter && check_fwstate(&pbuddy_adapter->mlmepriv, WIFI_STATION_STATE))
bsta_state = _TRUE;
#endif //CONFIG_CONCURRENT_MODE
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_STATION_STATE, bsta_state);
ODM_DMWatchdog(&pHalData->odmpriv);
}
skip_dm:
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
#ifdef CONFIG_PCI_HCI
if(pHalData->bGpioHwWpsPbc)
#endif
{
dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11
}
}
VOID
rtl8723a_HalDmWatchDog(
IN PADAPTER Adapter
)
{
BOOLEAN bFwCurrentInPSMode = _FALSE;
BOOLEAN bFwPSAwake = _TRUE;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter;
#endif //CONFIG_CONCURRENT_MODE
//#if MP_DRIVER
if (Adapter->registrypriv.mp_mode == 1)
return;
//#endif
#ifdef CONFIG_LPS
bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
#endif
#ifdef CONFIG_P2P
// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
// modifed by thomas. 2011.06.11.
if(Adapter->wdinfo.p2p_ps_enable)
bFwPSAwake = _FALSE;
#endif //CONFIG_P2P
if( (Adapter->hw_init_completed == _TRUE)
&& ((!bFwCurrentInPSMode) && bFwPSAwake))
{
#ifdef CONFIG_CONCURRENT_MODE
if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE) &&
check_fwstate(&pbuddy_adapter->mlmepriv, _FW_LINKED))
{
if(Adapter->iface_type == IFACE_PORT1)
{
//reset TSF
rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1));
//BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked
rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3));
}
else if(Adapter->iface_type == IFACE_PORT0)
{
//reset TSF
rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
//BCN0 TSF will sync to BCN1 TSF with offset(0x518) if if2_sta linked
rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(2));
}
else
DBG_8192C("Error Condition\n");
}
#endif
//
// Calculate Tx/Rx statistics.
//
dm_CheckStatistics(Adapter);
#ifdef CONFIG_CONCURRENT_MODE
if(Adapter->adapter_type > PRIMARY_ADAPTER)
goto _record_initrate;
#endif
//
// Dynamically switch RTS/CTS protection.
//
//dm_CheckProtection(Adapter);
#ifdef CONFIG_PCI_HCI
// 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput.
// Tx Migration settings.
//dm_InterruptMigration(Adapter);
//if(Adapter->HalFunc.TxCheckStuckHandler(Adapter))
// PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem));
#endif
_record_initrate:
// Read REG_INIDATA_RATE_SEL value for TXDESC.
if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE)
{
pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
}
else
{
u8 i;
for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
{
pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
}
}
}
//ODM
if (Adapter->hw_init_completed == _TRUE)
{
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 bLinked=_FALSE;
if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE))
{
if(Adapter->stapriv.asoc_sta_count > 2)
bLinked = _TRUE;
}
else{//Station mode
if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
bLinked = _TRUE;
}
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_LINK, bLinked);
FindMinimumRSSI_8723a(Adapter);
ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
ODM_DMWatchdog(&pHalData->odmpriv);
}
// Check GPIO to determine current RF on/off and Pbc status.
// Check Hardware Radio ON/OFF or not
//if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)
//{
//RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n"));
// dm_CheckRfCtrlGPIO(Adapter);
//}
#ifdef CONFIG_PCI_HCI
if(pHalData->bGpioHwWpsPbc)
#endif
{
dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11
}
}
/*
* rtw_get_cur_max_rate -
* @adapter: pointer to _adapter structure
*
* Return 0 or 100Kbps
*/
u16 rtw_get_cur_max_rate(_adapter *adapter)
{
int i = 0;
u8 *p;
u16 rate = 0, max_rate = 0, ht_cap=_FALSE;
u32 ht_ielen = 0;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct registry_priv *pregistrypriv = &adapter->registrypriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network;
struct rtw_ieee80211_ht_cap *pht_capie;
u8 bw_40MHz=0, short_GI_20=0, short_GI_40=0;
u16 mcs_rate=0;
u8 rf_type = 0;
struct registry_priv *pregpriv = &adapter->registrypriv;
#ifdef CONFIG_MP_INCLUDED
if (adapter->registrypriv.mp_mode == 1)
{
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
return 0;
}
#endif
if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE)
&& (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE))
return 0;
p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12);
if(p && ht_ielen>0)
{
ht_cap = _TRUE;
pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2);
_rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2);
//bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0;
//cur_bwmod is updated by beacon, pmlmeinfo is updated by association response
bw_40MHz = (pmlmeext->cur_bwmode && (HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH & pmlmeinfo->HT_info.infos[0])) ? 1:0;
//short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0;
short_GI_20 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_20) ? 1:0;
short_GI_40 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_40) ? 1:0;
}
while( (pcur_bss->SupportedRates[i]!=0) && (pcur_bss->SupportedRates[i]!=0xFF))
{
rate = pcur_bss->SupportedRates[i]&0x7F;
if(rate>max_rate)
max_rate = rate;
i++;
}
if(ht_cap == _TRUE)
{
rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
max_rate = rtw_mcs_rate(
rf_type,
bw_40MHz & pregistrypriv->cbw40_enable,
short_GI_20,
short_GI_40,
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate
);
}
else
{
max_rate = max_rate*10/2;
}
return max_rate;
}
void rtw_proc_init_one(struct net_device *ndev)
{
struct proc_dir_entry *dir_dev = NULL;
struct proc_dir_entry *entry = NULL;
struct rtl_priv *rtlpriv = rtl_priv(dev);
uint8_t rf_type;
if (rtw_proc == NULL) {
memcpy(rtw_proc_name, RTW_PROC_NAME, sizeof(RTW_PROC_NAME));
rtw_proc = create_proc_entry(rtw_proc_name, S_IFDIR, init_net.proc_net);
if (rtw_proc == NULL) {
DBG_871X(KERN_ERR "Unable to create rtw_proc directory\n");
return;
}
entry = create_proc_read_entry("ver_info", S_IFREG | S_IRUGO, rtw_proc, proc_get_drv_version, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
}
if (rtlpriv->dir_dev == NULL) {
rtlpriv->dir_dev = create_proc_entry(dev->name,
S_IFDIR | S_IRUGO | S_IXUGO,
rtw_proc);
dir_dev = rtlpriv->dir_dev;
if (dir_dev == NULL) {
if (rtw_proc_cnt == 0) {
if (rtw_proc) {
remove_proc_entry(rtw_proc_name, init_net.proc_net);
rtw_proc = NULL;
}
}
DBG_871X("Unable to create dir_dev directory\n");
return;
}
} else {
return;
}
rtw_proc_cnt++;
entry = create_proc_read_entry("write_reg", S_IFREG | S_IRUGO,
dir_dev, proc_get_write_reg, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_write_reg;
entry = create_proc_read_entry("read_reg", S_IFREG | S_IRUGO,
dir_dev, proc_get_read_reg, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_read_reg;
entry = create_proc_read_entry("fwstate", S_IFREG | S_IRUGO,
dir_dev, proc_get_fwstate, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("sec_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_sec_info, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mlmext_state", S_IFREG | S_IRUGO,
dir_dev, proc_get_mlmext_state, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("qos_option", S_IFREG | S_IRUGO,
dir_dev, proc_get_qos_option, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("ht_option", S_IFREG | S_IRUGO,
dir_dev, proc_get_ht_option, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_info, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("ap_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_ap_info, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("adapter_state", S_IFREG | S_IRUGO,
dir_dev, proc_getstruct rtl_priv_state, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("trx_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_trx_info, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mac_reg_dump1", S_IFREG | S_IRUGO,
dir_dev, proc_get_mac_reg_dump1, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mac_reg_dump2", S_IFREG | S_IRUGO,
dir_dev, proc_get_mac_reg_dump2, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("mac_reg_dump3", S_IFREG | S_IRUGO,
dir_dev, proc_get_mac_reg_dump3, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("bb_reg_dump1", S_IFREG | S_IRUGO,
dir_dev, proc_get_bb_reg_dump1, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("bb_reg_dump2", S_IFREG | S_IRUGO,
dir_dev, proc_get_bb_reg_dump2, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("bb_reg_dump3", S_IFREG | S_IRUGO,
dir_dev, proc_get_bb_reg_dump3, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_reg_dump1", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump1, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_reg_dump2", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump2, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
rtw_hal_get_hwreg(rtlpriv, HW_VAR_RF_TYPE, (uint8_t *)(&rf_type));
if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type)) {
entry = create_proc_read_entry("rf_reg_dump3", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump3, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry = create_proc_read_entry("rf_reg_dump4", S_IFREG | S_IRUGO,
dir_dev, proc_get_rf_reg_dump4, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
}
#ifdef CONFIG_AP_MODE
entry = create_proc_read_entry("all_sta_info", S_IFREG | S_IRUGO,
dir_dev, proc_get_all_sta_info, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
#endif
entry = create_proc_read_entry("rx_signal", S_IFREG | S_IRUGO,
dir_dev, proc_get_rx_signal, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_rx_signal;
#ifdef CONFIG_80211N_HT
entry = create_proc_read_entry("ht_enable", S_IFREG | S_IRUGO,
dir_dev, proc_get_ht_enable, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_ht_enable;
entry = create_proc_read_entry("bw_mode", S_IFREG | S_IRUGO,
dir_dev, proc_get_bw_mode, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_bw_mode;
entry = create_proc_read_entry("ampdu_enable", S_IFREG | S_IRUGO,
dir_dev, proc_get_ampdu_enable, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_ampdu_enable;
entry = create_proc_read_entry("rx_stbc", S_IFREG | S_IRUGO,
dir_dev, proc_get_rx_stbc, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_rx_stbc;
#endif
entry = create_proc_read_entry("path_rssi", S_IFREG | S_IRUGO,
dir_dev, proc_get_two_path_rssi, dev);
entry = create_proc_read_entry("rssi_disp", S_IFREG | S_IRUGO,
dir_dev, proc_get_rssi_disp, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_rssi_disp;
#if defined(DBG_CONFIG_ERROR_DETECT)
entry = create_proc_read_entry("sreset", S_IFREG | S_IRUGO,
dir_dev, proc_get_sreset, dev);
if (!entry) {
DBG_871X("Unable to create_proc_read_entry!\n");
return;
}
entry->write_proc = proc_set_sreset;
#endif
}
