static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit)
{
u16 i;
spin_lock(&rdev->smc_idx_lock);
for (i = 0; i < limit; i += 4) {
rv770_set_smc_sram_address(rdev, i, limit);
WREG32(SMC_SRAM_DATA, 0);
}
spin_unlock(&rdev->smc_idx_lock);
}
static void rv770_clear_smc_sram(struct radeon_device *rdev, u16 limit)
{
unsigned long flags;
u16 i;
spin_lock_irqsave(&rdev->smc_idx_lock, flags);
for (i = 0; i < limit; i += 4) {
rv770_set_smc_sram_address(rdev, i, limit);
WREG32(SMC_SRAM_DATA, 0);
}
spin_unlock_irqrestore(&rdev->smc_idx_lock, flags);
}
int rv770_write_smc_sram_dword(struct radeon_device *rdev,
u16 smc_address, u32 value, u16 limit)
{
int ret;
spin_lock(&rdev->smc_idx_lock);
ret = rv770_set_smc_sram_address(rdev, smc_address, limit);
if (ret == 0)
WREG32(SMC_SRAM_DATA, value);
spin_unlock(&rdev->smc_idx_lock);
return ret;
}
int rv770_write_smc_sram_dword(struct radeon_device *rdev,
u16 smc_address, u32 value, u16 limit)
{
unsigned long flags;
int ret;
spin_lock_irqsave(&rdev->smc_idx_lock, flags);
ret = rv770_set_smc_sram_address(rdev, smc_address, limit);
if (ret == 0)
WREG32(SMC_SRAM_DATA, value);
spin_unlock_irqrestore(&rdev->smc_idx_lock, flags);
return ret;
}
int rv770_copy_bytes_to_smc(struct radeon_device *rdev,
u16 smc_start_address, const u8 *src,
u16 byte_count, u16 limit)
{
unsigned long flags;
u32 data, original_data, extra_shift;
u16 addr;
int ret = 0;
if (smc_start_address & 3)
return -EINVAL;
if ((smc_start_address + byte_count) > limit)
return -EINVAL;
addr = smc_start_address;
spin_lock_irqsave(&rdev->smc_idx_lock, flags);
while (byte_count >= 4) {
/* SMC address space is BE */
data = (src[0] << 24) | (src[1] << 16) | (src[2] << 8) | src[3];
ret = rv770_set_smc_sram_address(rdev, addr, limit);
if (ret)
goto done;
WREG32(SMC_SRAM_DATA, data);
src += 4;
byte_count -= 4;
addr += 4;
}
/* RMW for final bytes */
if (byte_count > 0) {
data = 0;
ret = rv770_set_smc_sram_address(rdev, addr, limit);
if (ret)
goto done;
original_data = RREG32(SMC_SRAM_DATA);
extra_shift = 8 * (4 - byte_count);
while (byte_count > 0) {
/* SMC address space is BE */
data = (data << 8) + *src++;
byte_count--;
}
data <<= extra_shift;
data |= (original_data & ~((~0UL) << extra_shift));
ret = rv770_set_smc_sram_address(rdev, addr, limit);
if (ret)
goto done;
WREG32(SMC_SRAM_DATA, data);
}
done:
spin_unlock_irqrestore(&rdev->smc_idx_lock, flags);
return ret;
}