void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
#if 0
/* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
s3c_gpio_cfgrange_nopull(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3));
/* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
s3c_gpio_cfgrange_nopull(S5PV210_GPH2(0), cols, S3C_GPIO_SFN(3));
#else
unsigned int gpio;
unsigned int end;
s3c_gpio_cfgpin(S5PV210_GPJ2(7), S3C_GPIO_SFN(3));
s3c_gpio_setpull(S5PV210_GPJ2(7), S3C_GPIO_PULL_UP);
end = S5PV210_GPJ3(rows -1);
for (gpio = S5PV210_GPJ3(0); gpio < end; gpio++)
{
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
}
s3c_gpio_cfgpin(S5PV210_GPJ1(5), S3C_GPIO_SFN(3));
s3c_gpio_setpull(S5PV210_GPJ1(5), S3C_GPIO_PULL_NONE);
end = S5PV210_GPJ2(cols -1);
for (gpio = S5PV210_GPJ2(0); gpio < end; gpio++)
{
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
}
#endif
}
void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
/* Set all the necessary GPG0/GPG1 pins to special-function 2 */
s3c_gpio_cfgrange_nopull(S5PV210_GPG0(0), 2, S3C_GPIO_SFN(2));
switch (width) {
case 8:
/* GPG1[3:6] special-function 3 */
s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3));
case 4:
/* GPG0[3:6] special-function 2 */
s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2));
default:
break;
}
#if 0
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2));
}
#endif
}
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
}
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
/* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
s3c_gpio_cfgrange_nopull(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3));
/* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
s3c_gpio_cfgrange_nopull(S5PV210_GPH2(0), cols, S3C_GPIO_SFN(3));
}
void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
{
/* Set all the necessary GPH pins to special-function 3 */
s3c_gpio_cfgrange_nopull(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3));
/* Set all the necessary GPC pins to special-function 3 */
s3c_gpio_cfgrange_nopull(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3));
}
void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
{
/* */
s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3));
/* */
s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3));
}
static void jet_fb_gpio_setup_18bpp(void)
{
/* Blue */
s3c_gpio_cfgrange_nopull(GPIO_LCD_B_0, 6, S3C_GPIO_SFN(2));
/* Green */
s3c_gpio_cfgrange_nopull(GPIO_LCD_G_0, 6, S3C_GPIO_SFN(2));
/* Red + control signals */
s3c_gpio_cfgrange_nopull(GPIO_LCD_R_0, 10, S3C_GPIO_SFN(2));
}
void s5p64x0_fb_gpio_setup_24bpp(void)
{
if (soc_is_s5p6440()) {
s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12, S3C_GPIO_SFN(2));
} else if (soc_is_s5p6450()) {
s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12, S3C_GPIO_SFN(2));
}
}
void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
/* Set all the necessary GPG3[0:1] pins to special-function 2 */
s3c_gpio_cfgrange_nopull(S5PV210_GPG3(0), 2, S3C_GPIO_SFN(2));
/* Data pin GPG3[3:6] to special-function 2 */
s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(2));
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2));
}
}
static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr)
{
s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2));
for (; nr > 0; nr--, base++)
s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4);
}
static void s3cfb_gpio_setup_24bpp(unsigned int start, unsigned int size,
unsigned int cfg, s5p_gpio_drvstr_t drvstr)
{
s3c_gpio_cfgrange_nopull(start, size, cfg);
for (; size > 0; size--, start++)
s5p_gpio_set_drvstr(start, drvstr);
}
static void exynos4_fimd0_cfg_gpios(unsigned int base, unsigned int nr,
unsigned int cfg, s5p_gpio_drvstr_t drvstr)
{
s3c_gpio_cfgrange_nopull(base, nr, cfg);
for (; nr > 0; nr--, base++)
s5p_gpio_set_drvstr(base, drvstr);
}
static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
{
/* Set all the necessary GPG pins to special-function 2 */
s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
/* force card-detected for prototype 0 */
s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
}
static void __init origen_bt_setup(void)
{
gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
/* 4 UART Pins configuration */
s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
/* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
}
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
/* hcj: the rows may need pullup */
/* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
// s3c_gpio_cfgrange_nopull(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3));
s3c_gpio_cfgall_range(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
/* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
s3c_gpio_cfgrange_nopull(S5PV210_GPH2(0), cols, S3C_GPIO_SFN(3));
}
void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
/* Set all the necessary GPH pins to special-function 2 */
s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2));
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
}
}
void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
unsigned int num;
num = width;
/* In case of 8 width, we should decrease the 2 */
if (width == 8)
num = width - 2;
/* Set all the necessary GPG0/GPG1 pins to special-function 0 */
s3c_gpio_cfgrange_nopull(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2));
if (width == 8)
s3c_gpio_cfgrange_nopull(S5PC100_GPG1(0), 2, S3C_GPIO_SFN(2));
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2));
}
}
void exynos5410_c2c_cfg_gpio(enum c2c_buswidth rx_width,
enum c2c_buswidth tx_width, void __iomem *etc8drv_addr)
{
int i;
s5p_gpio_drvstr_t lv1 = S5P_GPIO_DRVSTR_LV1;
s5p_gpio_drvstr_t lv3 = S5P_GPIO_DRVSTR_LV3;
s5p_gpio_pd_cfg_t pd_cfg = S5P_GPIO_PD_INPUT;
s5p_gpio_pd_pull_t pd_pull = S5P_GPIO_PD_DOWN_ENABLE;
/* Set GPIO for C2C Rx */
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV0(0), 8, C2C_SFN);
for (i = 0; i < 8; i++) {
s5p_gpio_set_drvstr(EXYNOS5410_GPV0(i), lv1);
s5p_gpio_set_pd_cfg(EXYNOS5410_GPV0(i), pd_cfg);
s5p_gpio_set_pd_pull(EXYNOS5410_GPV0(i), pd_pull);
}
if (rx_width == C2C_BUSWIDTH_16) {
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV1(0), 8, C2C_SFN);
for (i = 0; i < 8; i++) {
s5p_gpio_set_drvstr(EXYNOS5410_GPV1(i), lv1);
s5p_gpio_set_pd_cfg(EXYNOS5410_GPV1(i), pd_cfg);
s5p_gpio_set_pd_pull(EXYNOS5410_GPV1(i), pd_pull);
}
} else if (rx_width == C2C_BUSWIDTH_10) {
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV1(0), 2, C2C_SFN);
for (i = 0; i < 2; i++) {
s5p_gpio_set_drvstr(EXYNOS5410_GPV1(i), lv1);
s5p_gpio_set_pd_cfg(EXYNOS5410_GPV1(i), pd_cfg);
s5p_gpio_set_pd_pull(EXYNOS5410_GPV1(i), pd_pull);
}
}
/* Set GPIO for C2C Tx */
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV2(0), 8, C2C_SFN);
for (i = 0; i < 8; i++)
s5p_gpio_set_drvstr(EXYNOS5410_GPV2(i), lv3);
if (tx_width == C2C_BUSWIDTH_16) {
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV3(0), 8, C2C_SFN);
for (i = 0; i < 8; i++)
s5p_gpio_set_drvstr(EXYNOS5410_GPV3(i), lv3);
} else if (tx_width == C2C_BUSWIDTH_10) {
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV3(0), 2, C2C_SFN);
for (i = 0; i < 2; i++)
s5p_gpio_set_drvstr(EXYNOS5410_GPV3(i), lv3);
}
/* Set GPIO for WakeReqOut/In */
s3c_gpio_cfgrange_nopull(EXYNOS5410_GPV4(0), 2, C2C_SFN);
s5p_gpio_set_pd_cfg(EXYNOS5410_GPV4(0), pd_cfg);
s5p_gpio_set_pd_pull(EXYNOS5410_GPV4(0), pd_pull);
writel(0x5, etc8drv_addr);
}
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
/* Keypads can be of various combinations, Just making sure */
#if defined(CONFIG_CPU_TYPE_SCP_SUPPER) || defined(CONFIG_CPU_TYPE_POP_SUPPER) || defined(CONFIG_CPU_TYPE_POP2G_SUPPER)
/* Set all the necessary GPX2 pins: KP_ROW[x] */
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 2,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
/*GPL2: KP_COL[x] */
s3c_gpio_cfgrange_nopull(EXYNOS4_GPL2(0), 1, S3C_GPIO_SFN(3));
#elif defined(CONFIG_CPU_TYPE_SCP_ELITE) || defined(CONFIG_CPU_TYPE_POP_ELITE) || defined(CONFIG_CPU_TYPE_POP2G_ELITE)
//ROW_6
s3c_gpio_cfgall_range(EXYNOS4_GPX2(6), 1,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
//ROW_7
s3c_gpio_cfgall_range(EXYNOS4_GPX2(7), 1,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
//ROW_8
s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), 1,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
//ROW_13
s3c_gpio_cfgall_range(EXYNOS4_GPX3(5), 1,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
//COL_0
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(0), 1, S3C_GPIO_SFN(3));
//COL_3
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(3), 1, S3C_GPIO_SFN(3));
//COL_5
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(5), 1, S3C_GPIO_SFN(3));
//COL_6
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(6), 1, S3C_GPIO_SFN(3));
#endif
}
void exynos4_fimd0_gpio_setup_24bpp(void)
{
unsigned int reg;
s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2));
/*
* Set DISPLAY_CONTROL register for Display path selection.
*
* DISPLAY_CONTROL[1:0]
* ---------------------
* 00 | MIE
* 01 | MDINE
* 10 | FIMD : selected
* 11 | FIMD
*/
reg = __raw_readl(S3C_VA_SYS + 0x0210);
reg |= (1 << 1);
__raw_writel(reg, S3C_VA_SYS + 0x0210);
}
void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width,
S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width,
S3C_GPIO_SFN(2));
/* */
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
if (soc_is_s5p6450()) {
s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2));
} else {
s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2));
}
}
}
static void s3cfb_gpio_setup_24bpp(unsigned int start, unsigned int size,
unsigned int cfg, s5p_gpio_drvstr_t drvstr)
{
u32 reg;
s3c_gpio_cfgrange_nopull(start, size, cfg);
for (; size > 0; size--, start++)
s5p_gpio_set_drvstr(start, drvstr);
/* Set FIMD0 bypass */
reg = __raw_readl(S3C_VA_SYS + 0x0210);
reg |= (1<<1);
__raw_writel(reg, S3C_VA_SYS + 0x0210);
}
static void config_dpram_port_gpio(void)
{
int addr_bits = SROM_NUM_ADDR_BITS;
pr_info("[MDM] <%s> address line = %d bits\n", __func__, addr_bits);
/*
** Config DPRAM address/data GPIO pins
*/
/* Set GPIO for dpram address */
switch (addr_bits) {
case 0:
break;
case 13 ... 14:
s3c_gpio_cfgrange_nopull(EXYNOS4_GPY3(0), EXYNOS4_GPIO_Y3_NR,
S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(EXYNOS4_GPY4(0),
addr_bits - EXYNOS4_GPIO_Y3_NR,
S3C_GPIO_SFN(2));
pr_info("[MDM] <%s> last data gpio EXYNOS4_GPY4(0) ~ %d\n",
__func__, addr_bits - EXYNOS4_GPIO_Y3_NR);
break;
default:
pr_err("[MDM/E] <%s> Invalid addr_bits!!!\n", __func__);
return;
}
/* Set GPIO for dpram data - 16bit */
s3c_gpio_cfgrange_nopull(EXYNOS4_GPY5(0), 8, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(EXYNOS4_GPY6(0), 8, S3C_GPIO_SFN(2));
#if 0
/* Setup SROMC CSn pins */
s3c_gpio_cfgpin(GPIO_DPRAM_CSN0, S3C_GPIO_SFN(2));
#endif
#if defined(CONFIG_GSM_MODEM_ESC6270)
s3c_gpio_cfgpin(GPIO_DPRAM_CSN1, S3C_GPIO_SFN(2));
#endif
/* Config OEn, WEn */
s3c_gpio_cfgrange_nopull(GPIO_DPRAM_REN, 2, S3C_GPIO_SFN(2));
/* Config LBn, UBn */
s3c_gpio_cfgrange_nopull(GPIO_DPRAM_LBN, 2, S3C_GPIO_SFN(2));
/* Config BUSY */
s3c_gpio_cfgpin(GPIO_DPRAM_BUSY, S3C_GPIO_SFN(2));
}
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
/* Keypads can be of various combinations, Just making sure */
if (rows > 8) {
/* Set all the necessary GPX2 pins: KP_ROW[0~7] */
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
/* Set all the necessary GPX3 pins: KP_ROW[8~] */
s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
} else {
/* Set all the necessary GPX2 pins: KP_ROW[x] */
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
}
/* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(0), cols, S3C_GPIO_SFN(3));
}
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
if (rows > 8) {
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
} else {
s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
S3C_GPIO_PULL_UP);
}
s3c_gpio_cfgrange_nopull(EXYNOS4_GPX1(0), cols, S3C_GPIO_SFN(3));
}
void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2));
switch (width) {
case 8:
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4,
S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4,
S3C_GPIO_SFN(2));
case 4:
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4,
S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4,
S3C_GPIO_SFN(2));
default:
break;
}
/* */
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
if (soc_is_s5p6450()) {
s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3));
} else {
s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3));
}
}
}
void s3c64xx_fb_gpio_setup_24bpp(void)
{
s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
}
void s3c_fimc0_cfg_gpio(struct platform_device *pdev)
{
if (soc_is_exynos4210()) {
#if defined (CONFIG_MX_SERIAL_TYPE)
/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 4, S3C_GPIO_SFN(2));
#else
/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 5, S3C_GPIO_SFN(2));
/* CAM B port(b0011) : DATA[0-7] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE1(0), 8, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : PCLK, VSYNC, HREF, FIELD, CLKOUT */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE0(0), 5, S3C_GPIO_SFN(3));
#endif
} else {
#if defined(CONFIG_MX_SERIAL_TYPE)
/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ0(0), 8, S3C_GPIO_SFN(2));
/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ1(0), 4, S3C_GPIO_SFN(2));
/* CAM B port(b0011) : PCLK, DATA[0-6] */
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM0(0), 8, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : FIELD, DATA[7]*/
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM1(0), 2, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : VSYNC, HREF, CLKOUT*/
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM2(0), 3, S3C_GPIO_SFN(3));
#endif
#if defined(CONFIG_MX2_SERIAL_TYPE)
s3c_gpio_cfgpin(EXYNOS4212_GPJ1(3), S3C_GPIO_SFN(2));
#endif
}
/* note : driver strength to max is unnecessary */
}
void s3c_fimc0_cfg_gpio(struct platform_device *pdev)
{
#if defined(CONFIG_MACH_SMDK4212) || defined(CONFIG_MACH_SMDK4210)
if (soc_is_exynos4210()) {
/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 5, S3C_GPIO_SFN(2));
/* CAM B port(b0011) : DATA[0-7] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE1(0), 8, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : PCLK, VSYNC, HREF, FIELD, CLKOUT */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE0(0), 5, S3C_GPIO_SFN(3));
} else {
/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ0(0), 8, S3C_GPIO_SFN(2));
/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPJ1(0), 5, S3C_GPIO_SFN(2));
/* CAM B port(b0011) : PCLK, DATA[0-6] */
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM0(0), 8, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : FIELD, DATA[7]*/
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM1(0), 2, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : VSYNC, HREF, CLKOUT*/
s3c_gpio_cfgrange_nopull(EXYNOS4212_GPM2(0), 3, S3C_GPIO_SFN(3));
}
/* note : driver strength to max is unnecessary */
#elif defined(CONFIG_MACH_PX)
/* CAM A port(b0010) : PCLK, VSYNC, HREF, DATA[0-4] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ0(0), 8, S3C_GPIO_SFN(2));
/* CAM A port(b0010) : DATA[5-7], CLKOUT(MIPI CAM also), FIELD */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPJ1(0), 5, S3C_GPIO_SFN(2));
/* Disable Mclk */
s3c_gpio_cfgpin(EXYNOS4210_GPJ1(3), S3C_GPIO_INPUT);
s3c_gpio_setpull(EXYNOS4210_GPJ1(3), S3C_GPIO_PULL_DOWN);
/* CAM B port(b0011) : DATA[0-7] */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE1(0), 8, S3C_GPIO_SFN(3));
/* CAM B port(b0011) : PCLK, VSYNC, HREF, FIELD, CLKOUT */
s3c_gpio_cfgrange_nopull(EXYNOS4210_GPE0(0), 5, S3C_GPIO_SFN(3));
#endif
}
void exynos5_fimc_is_cfg_gpio(struct platform_device *pdev)
{
int ret;
/* 1. UART setting for FIMC-IS */
ret = gpio_request(GPIO_5M_nRST, "GPIO_5M_nRST");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_5M_nRST ####\n");
s3c_gpio_cfgpin(GPIO_5M_nRST, (0x2<<0));
s3c_gpio_setpull(GPIO_5M_nRST, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_5M_nRST);
#if defined(CONFIG_MACH_P11) || defined(CONFIG_MACH_P10)
#else
ret = gpio_request(EXYNOS5_GPE0(1), "GPE0");
if (ret)
printk(KERN_ERR "#### failed to request GPE0_1 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE0(1), (0x2<<4));
s3c_gpio_setpull(EXYNOS5_GPE0(1), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE0(1));
ret = gpio_request(EXYNOS5_GPE0(2), "GPE0");
if (ret)
printk(KERN_ERR "#### failed to request GPE0_2 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE0(2), (0x3<<8));
s3c_gpio_setpull(EXYNOS5_GPE0(2), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE0(2));
ret = gpio_request(EXYNOS5_GPE0(3), "GPE0");
if (ret)
printk(KERN_ERR "#### failed to request GPE0_3 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE0(3), (0x3<<12));
s3c_gpio_setpull(EXYNOS5_GPE0(3), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE0(3));
ret = gpio_request(EXYNOS5_GPE0(4), "GPE0");
if (ret)
printk(KERN_ERR "#### failed to request GPE0_4 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE0(4), (0x3<<16));
s3c_gpio_setpull(EXYNOS5_GPE0(4), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE0(4));
ret = gpio_request(EXYNOS5_GPE0(5), "GPE0");
if (ret)
printk(KERN_ERR "#### failed to request GPE0_5 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE0(5), (0x3<<20));
s3c_gpio_setpull(EXYNOS5_GPE0(5), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE0(5));
ret = gpio_request(EXYNOS5_GPE0(6), "GPE0");
if (ret)
printk(KERN_ERR "#### failed to request GPE0_6 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE0(6), (0x3<<24));
s3c_gpio_setpull(EXYNOS5_GPE0(6), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE0(6));
#endif
ret = gpio_request(GPIO_ISP_TXD, "GPIO_ISP_TXD");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_ISP_TXD ####\n");
s3c_gpio_cfgpin(GPIO_ISP_TXD, (0x3<<28));
s3c_gpio_setpull(GPIO_ISP_TXD, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_ISP_TXD);
#if defined(CONFIG_MACH_P11) || defined(CONFIG_MACH_P10)
#else
ret = gpio_request(EXYNOS5_GPE1(0), "GPE1");
if (ret)
printk(KERN_ERR "#### failed to request GPE1_0 ####\n");
s3c_gpio_cfgpin(EXYNOS5_GPE1(0), (0x3<<0));
s3c_gpio_setpull(EXYNOS5_GPE1(0), S3C_GPIO_PULL_NONE);
gpio_free(EXYNOS5_GPE1(0));
#endif
ret = gpio_request(GPIO_ISP_RXD, "GPIO_ISP_RXD");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_ISP_RXD ####\n");
s3c_gpio_cfgpin(GPIO_ISP_RXD, (0x3<<4));
s3c_gpio_setpull(GPIO_ISP_RXD, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_ISP_RXD);
/* 2. GPIO setting for FIMC-IS */
ret = gpio_request(GPIO_5M_CAM_SDA_18V, "GPIO_5M_CAM_SDA_18V");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_5M_CAM_SDA_18V ####\n");
s3c_gpio_cfgpin(GPIO_5M_CAM_SDA_18V, (0x2<<0));
s3c_gpio_setpull(GPIO_5M_CAM_SDA_18V, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_5M_CAM_SDA_18V);
ret = gpio_request(GPIO_5M_CAM_SCL_18V, "GPIO_5M_CAM_SCL_18V");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_5M_CAM_SCL_18V ####\n");
s3c_gpio_cfgpin(GPIO_5M_CAM_SCL_18V, (0x2<<4));
s3c_gpio_setpull(GPIO_5M_CAM_SCL_18V, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_5M_CAM_SCL_18V);
ret = gpio_request(GPIO_VT_CAM_SDA_18V, "GPIO_VT_CAM_SDA_18V");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_VT_CAM_SDA_18V ####\n");
s3c_gpio_cfgpin(GPIO_VT_CAM_SDA_18V, (0x2<<8));
s3c_gpio_setpull(GPIO_VT_CAM_SDA_18V, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_VT_CAM_SDA_18V);
ret = gpio_request(GPIO_VT_CAM_SCL_18V, "GPIO_VT_CAM_SCL_18V");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_5M_CAM_SDA_18V ####\n");
s3c_gpio_cfgpin(GPIO_VT_CAM_SCL_18V, (0x2<<12));
s3c_gpio_setpull(GPIO_VT_CAM_SCL_18V, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_VT_CAM_SCL_18V);
ret = gpio_request(GPIO_CMC_CLK_18V, "GPIO_CMC_CLK_18V");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_CMC_CLK_18V ####\n");
s3c_gpio_cfgpin(GPIO_CMC_CLK_18V, (0x3<<0));
s3c_gpio_setpull(GPIO_CMC_CLK_18V, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_CMC_CLK_18V);
ret = gpio_request(GPIO_CMC_CS_18V, "GPIO_CMC_CS_18V");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_CMC_CS_18V ####\n");
s3c_gpio_cfgpin(GPIO_CMC_CS_18V, (0x3<<4));
s3c_gpio_setpull(GPIO_CMC_CS_18V, S3C_GPIO_PULL_NONE);
gpio_free(GPIO_CMC_CS_18V);
/* CAM A port(b0010) : CLK_OUT */
s3c_gpio_cfgrange_nopull(GPIO_CAM_MCLK, 1, S3C_GPIO_SFN(2));
#if defined(CONFIG_MACH_P11) || defined(CONFIG_MACH_P10)
/* power_on */
cam_power_on();
/* CAM A port : POWER */
s3c_gpio_cfgpin(GPIO_CAM_IO_EN, S3C_GPIO_OUTPUT);
s3c_gpio_setpull(GPIO_CAM_IO_EN, S3C_GPIO_PULL_NONE);
gpio_set_value(GPIO_CAM_IO_EN, 1);
/* CAM A reset*/
ret = gpio_request(GPIO_5M_nRST, "GPIO_5M_nRST");
if (ret)
printk(KERN_ERR "#### failed to request GPIO_5M_nRST ####\n");
s3c_gpio_setpull(GPIO_5M_nRST, S3C_GPIO_PULL_NONE);
gpio_direction_output(GPIO_5M_nRST, 0);
gpio_direction_output(GPIO_5M_nRST, 1);
gpio_free(GPIO_5M_nRST);
#else
/* CAM A port(b0010) : DATA[0-7] */
/* s3c_gpio_cfgrange_nopull(EXYNOS5_GPH1(0), 8, S3C_GPIO_SFN(2)); */
/* Camera A */
ret = gpio_request(EXYNOS5_GPX1(2), "GPX1");
if (ret)
printk(KERN_ERR "#### failed to request GPX1_2 ####\n");
s3c_gpio_setpull(EXYNOS5_GPX1(2), S3C_GPIO_PULL_NONE);
gpio_direction_output(EXYNOS5_GPX1(2), 0);
gpio_direction_output(EXYNOS5_GPX1(2), 1);
gpio_free(EXYNOS5_GPX1(2));
#endif
}
