Ejemplo n.º 1
0
Archivo: suspend.c Proyecto: 3bsa/linux
static int exynos_suspend_enter(suspend_state_t state)
{
	int ret;

	s3c_pm_debug_init();

	S3C_PMDBG("%s: suspending the system...\n", __func__);

	S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__,
			exynos_irqwake_intmask, exynos_get_eint_wake_mask());

	if (exynos_irqwake_intmask == -1U
	    && exynos_get_eint_wake_mask() == -1U) {
		pr_err("%s: No wake-up sources!\n", __func__);
		pr_err("%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	s3c_pm_save_uarts();
	if (pm_data->pm_prepare)
		pm_data->pm_prepare();
	flush_cache_all();
	s3c_pm_check_store();

	ret = call_firmware_op(suspend);
	if (ret == -ENOSYS)
		ret = cpu_suspend(0, pm_data->cpu_suspend);
	if (ret)
		return ret;

	if (pm_data->pm_resume_prepare)
		pm_data->pm_resume_prepare();
	s3c_pm_restore_uarts();

	S3C_PMDBG("%s: wakeup stat: %08x\n", __func__,
			pmu_raw_readl(S5P_WAKEUP_STAT));

	s3c_pm_check_restore();

	S3C_PMDBG("%s: resuming the system...\n", __func__);

	return 0;
}
Ejemplo n.º 2
0
static int s3c_pm_enter(suspend_state_t state)
{
	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_saved_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	printk(KERN_ALERT "PM: SLEEP\n");

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	s3c_cpu_save(0, PLAT_PHYS_OFFSET - PAGE_OFFSET);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();
	s3c_pm_restored_gpios();

	s3c_pm_debug_init();

	/* restore the system state */

	if (pm_cpu_restore)
		pm_cpu_restore();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 3
0
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
	static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
	unsigned int tmp,audiodomain_On;

	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/
		s3c_irqwake_intmask = 0xFFFD; // rtc_alarm

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

#ifndef USE_DMA_ALLOC
	s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
	__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */

	/* set flag for sleep mode idle2 flag is also reserved */
	__raw_writel(SLEEP_MODE, S5P_INFORM1);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	s3c_config_sleep_gpio();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
			s3c_irqwake_intmask, s3c_irqwake_eintmask);

	/*Set EINT as wake up source*/
#if defined(CONFIG_OPTICAL_GP2A)
	if(gp2a_get_proximity_enable())
	{
		s3c_pm_set_eint(2, 0x4); // Proximity
	}
#endif
	s3c_pm_set_eint( 6, 0x4); // det_3.5
	s3c_pm_set_eint( 7, 0x2); // pmic
	s3c_pm_set_eint(11, 0x2); // onedram
	s3c_pm_set_eint(20, 0x3); // wifi
	s3c_pm_set_eint(21, 0x4); // bt
	s3c_pm_set_eint(22, 0x2); // power key
	s3c_pm_set_eint(23, 0x2);   // microusb
	s3c_pm_set_eint(25, 0x4); // volume down
	s3c_pm_set_eint(26, 0x4); // volume up
	s3c_pm_set_eint(28, 0x4);   // T_FLASH_DETECT
	s3c_pm_set_eint(29, 0x4);   // ok key
   	if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
	{
		s3c_pm_set_eint(30, 0x4); //sendend
	}
	else
	{
		s3c_pm_clear_eint(30);
	}

	//s3c_pm_arch_prepare_irqs();
	

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM	
	

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	__raw_writel(tmp, S5P_WAKEUP_STAT);

	//s3c_config_sleep_gpio();

	// Enable PS_HOLD pin to avoid reset failure */
	__raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);


	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	s3c_cpu_save(regs_save);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();
	

	/* restore the system state */

	s3c_pm_restore_core();

	/*Reset the uart registers*/
	__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);

	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();

	tmp = readl(S5P_NORMAL_CFG);
	if(!(tmp & S5PC110_POWER_DOMAIN_AUDIO)) {
		tmp = tmp | S5PC110_POWER_DOMAIN_AUDIO;
		writel(tmp , S5P_NORMAL_CFG);
		audiodomain_On = 1;
	} else {
		audiodomain_On = 0;
	}

	/* enable gpio, uart, mmc */
	tmp = __raw_readl(S5P_OTHERS);
	tmp |= (1<<31) | (1<<30) | (1<<28) | (1<<29);
	__raw_writel(tmp, S5P_OTHERS);

	tmp = readl(S5P_NORMAL_CFG);
	if (audiodomain_On) {
		tmp = tmp & ~S5PC110_POWER_DOMAIN_AUDIO;
		writel(tmp , S5P_NORMAL_CFG);
	}

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	//printk("\nS5P_WAKEUP_STAT=%x\n",tmp);
	__raw_writel(tmp, S5P_WAKEUP_STAT);

	printk("wakeup source is 0x%x  \n", tmp);
	printk(" EXT_INT_0_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(0)));
	printk(" EXT_INT_1_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(1)));
	printk(" EXT_INT_2_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(2)));
	printk(" EXT_INT_3_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(3)));

	s3c_pm_clear_eint(21);
//	s3c_pm_clear_eint(22); // to be cleared later

	/* check what irq (if any) restored the system */
	s3c_pm_debug_init();

	s3c_pm_arch_show_resume_irqs();



#if defined(CONFIG_MACH_S5PC110_P1)
	// Set wakeup stat
	s3c_pm_set_wakeup_stat();
#endif // CONFIG_MACH_S5PC110_P1

	//printk("Int pending register before =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));

	//printk("Int pending register after =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));

	//S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
	//printk("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	//s3c_pm_debug_smdkled(1 << 1, 0);


	s3c_pm_check_restore();

	//mdelay(500);

	/* ok, let's return from sleep */
	printk(KERN_ERR "\n%s:%d\n", __func__, __LINE__);

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 4
0
static int s3c_pm_enter(suspend_state_t state)
{
	static unsigned long regs_save[16];

	

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	

	s3c_sleep_save_phys = virt_to_phys(regs_save);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	

	pm_cpu_prep();

	

	flush_cache_all();

	s3c_pm_check_store();

	

	s3c_pm_arch_stop_clocks();

	

	s3c_cpu_save(regs_save);

	

	cpu_init();

	

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();

	s3c_pm_debug_init();

	

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 5
0
static int s3c_pm_enter(suspend_state_t state)
{
	static unsigned long regs_save[16];
	unsigned int gpio;
	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

	s3c_sleep_save_phys = virt_to_phys(regs_save);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */


#if 0
	/* control power of moviNAND at PM and add 700ms delay for stabilization of moviNAND. */
    gpio = readl(S5PV210_GPJ2DAT);
    writel(gpio & (~0x80), S5PV210_GPJ2DAT);
    mdelay(700);
#endif 

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	config_sleep_gpio();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* clear wakeup_stat register for next wakeup reason */
	__raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT);

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	pmstats->sleep_count++;
	pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0);
	s3c_cpu_save(regs_save);
	pmstats->wake_count++;
	pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();

	fiq_glue_resume();
	local_fiq_enable();

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();
	s5pv210_restore_eint_group();

	s3c_pm_debug_init();

        /* restore the system state */

	if (pm_cpu_restore)
		pm_cpu_restore();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 6
0
static int s3c_pm_enter(suspend_state_t state)
{
	int ret;
	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	printk("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!of_have_populated_dt() &&
	    !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* save all necessary core registers not covered by the drivers */

	if (!of_have_populated_dt()) {
		samsung_pm_save_gpios();
		samsung_pm_saved_gpios();
	}

	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();
	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	s3c_pm_check_store();

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

#ifdef CONFIG_RTC_TICK_SLEEP_AGING_TEST
	if (rtc_tick_wakeup_enable)
		s3c_rtc_tick_control(1);
#endif

	/* this will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	ret = cpu_suspend(0, pm_cpu_sleep);

#ifdef CONFIG_RTC_TICK_SLEEP_AGING_TEST
	if (rtc_tick_wakeup_enable)
		s3c_rtc_tick_control(0);
#endif

	if (ret)
		return ret;

	/* restore the system state */

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();

	if (!of_have_populated_dt()) {
		samsung_pm_restore_gpios();
		s3c_pm_restored_gpios();
	}

	s3c_pm_debug_init();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 7
0
*/

static int s3c_pm_enter(suspend_state_t state)
{
	int tmp;
	static unsigned long regs_save[16];

	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

//Apollo +
  s5p_pad_pdn_control();
  s3c_irqwake_intmask = 0xFFDF; // key 
//Apollo -

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/
//printk("s3c_irqwake_intmask  = 0x%08x, s3c_irqwake_intallow  = 0x%08x+++++++\n", s3c_irqwake_intmask, s3c_irqwake_intallow);
//printk("s3c_irqwake_eintmask = 0x%08x, s3c_irqwake_eintallow = 0x%08x+++++++\n", s3c_irqwake_eintmask, s3c_irqwake_eintallow);
	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

	s3c_sleep_save_phys = virt_to_phys(regs_save);

//Apollo +
	/* set flag for sleep mode idle2 flag is also reserved */
  #define SLEEP_MODE 0
  #define IDLE2_MODE 1
	__raw_writel(SLEEP_MODE, S5P_INFORM1);
//Apollo -

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

//Apollo +
  s3c_config_sleep_gpio();  //ÅäÖÃÐÝÃßʱ¸÷io״̬
//Apollo -

	/* set the irq configuration for wake */
	s3c_pm_configure_extint(); 
  
	//printk(KERN_INFO"sleep: irq wakeup masks: %08lx,%08lx\n", s3c_irqwake_intmask, s3c_irqwake_eintmask);
  s3c_irqwake_intmask = 0xFFDF;
	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* clear wakeup_stat register for next wakeup reason */
	__raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT);

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	pmstats->sleep_count++;
	pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0);
	s3c_cpu_save(regs_save);
	pmstats->wake_count++;
	pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();
	tmp = readl(S5P_WAKEUP_STAT);
	fiq_glue_resume();
	local_fiq_enable();

	s3c_pm_restore_core();


	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();
	s5pv210_restore_eint_group();

	s3c_pm_debug_init();

        /* restore the system state */

	if (pm_cpu_restore)
		pm_cpu_restore();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
//	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
Ejemplo n.º 8
0
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
	static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
	unsigned int tmp,audiodomain_On;

	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/
		s3c_irqwake_intmask = 0xFFFD; // rtc_alarm

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

#ifndef USE_DMA_ALLOC
	s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
	__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */

	/* set flag for sleep mode idle2 flag is also reserved */
	__raw_writel(SLEEP_MODE, S5P_INFORM1);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	s3c_config_sleep_gpio();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
			s3c_irqwake_intmask, s3c_irqwake_eintmask);

	/*Set EINT as wake up source*/
#if defined(CONFIG_OPTICAL_GP2A) || defined(CONFIG_S5PC110_DEMPSEY_BOARD)
	if(gp2a_get_proximity_enable())
	{
		s3c_pm_set_eint(2, 0x4); // Proximity
	}
#endif

#if defined(CONFIG_S5PC110_DEMPSEY_BOARD)
	s3c_pm_set_eint( 6, 0x4); // det_3.5
	s3c_pm_set_eint( 7, 0x2); // pmic
	s3c_pm_set_eint(11, 0x2); // onedram
	#if defined (CONFIG_CP_CHIPSET_STE) 
	s3c_pm_set_eint(12, 0x2);		//INT_RESOUT
	s3c_pm_set_eint(9, 0x2);		//INT_CP_PWR_RST
	#else
	s3c_pm_set_eint(15, 0x4);		//PHONE_ACTIVE
	#endif	
//	s3c_pm_set_eint(20, 0x3); // wifi
	s3c_pm_set_eint(21, 0x4); // bt
	s3c_pm_set_eint(22, 0x2); // power key
	s3c_pm_set_eint(23, 0x2);   // microusb

//	s3c_pm_set_eint(28, 0x4);   // T_FLASH_DETECT: NC
//	s3c_pm_set_eint(29, 0x4);   // GYRO_INT
   	if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
	{
	    s3c_pm_set_eint(30, 0x4); //sendend
	}
    else
    {
        s3c_pm_clear_eint(30);
    }
#elif defined (CONFIG_S5PC110_HAWK_BOARD)	
	/*Set EINT 22 as wake up source*/
	s3c_pm_set_eint(11, 0x2); // nINT_ONEDRAM_AP
#if defined(CONFIG_HAWK_VER_B1_REAL_ADDED_FEATURE) //NAGSM_Android_HQ_KERNEL_CLEE_20100908 : Setup Hawk Real Board Rev 0.1
	s3c_pm_set_eint(31, 0x2); // nPower
	s3c_pm_set_eint(24, 0x2); // Home key
#else
	s3c_pm_set_eint(22, 0x2); // nPower
#endif
#if defined (CONFIG_CP_CHIPSET_STE) 
	s3c_pm_set_eint(12, 0x2);		//INT_RESOUT
	s3c_pm_set_eint(9, 0x2);		//INT_CP_PWR_RST
#else
	s3c_pm_set_eint(15, 0x4);		//PHONE_ACTIVE
#endif
	s3c_pm_set_eint(21, 0x4);		// BT_HOST_WAKE
	s3c_pm_set_eint(7,	0x02);		//PMIC	
	s3c_pm_set_eint(6, 0x4);		//det_3.5

	s3c_pm_set_eint(28, 0x4);	// T_FLASH_DETECT
#elif defined (CONFIG_S5PC110_VIBRANTPLUS_BOARD)
	s3c_pm_set_eint( 6, 0x4); // det_3.5
	s3c_pm_set_eint( 7, 0x2); // pmic
	s3c_pm_set_eint(11, 0x2); // onedram
	#if defined (CONFIG_CP_CHIPSET_STE) 
	s3c_pm_set_eint(12, 0x2);		//INT_RESOUT
	s3c_pm_set_eint(9, 0x2);		//INT_CP_PWR_RST
	#else
	s3c_pm_set_eint(15, 0x4);		//PHONE_ACTIVE
	#endif
	s3c_pm_set_eint(20, 0x3); // wifi
	s3c_pm_set_eint(21, 0x4); // bt
	s3c_pm_set_eint(22, 0x2); // power key
	s3c_pm_set_eint(23, 0x2);   // microusb

	if((is_calling_or_playing & IS_VOICE_CALL_2G) || (is_calling_or_playing & IS_VOICE_CALL_3G) || (is_calling_or_playing & IS_DATA_CALL)){
		s3c_pm_set_eint(25, 0x4); //volume up
		s3c_pm_set_eint(26, 0x4); //volume down
	}
	
	s3c_pm_set_eint(28, 0x4);   // T_FLASH_DETECT
#else
	s3c_pm_set_eint( 6, 0x4); // det_3.5
	s3c_pm_set_eint( 7, 0x2); // pmic
	s3c_pm_set_eint(11, 0x2); // onedram
	#if defined (CONFIG_CP_CHIPSET_STE) 
	s3c_pm_set_eint(12, 0x2);		//INT_RESOUT
	s3c_pm_set_eint(9, 0x2);		//INT_CP_PWR_RST
	#else
	s3c_pm_set_eint(15, 0x4);		//PHONE_ACTIVE
	#endif
	s3c_pm_set_eint(20, 0x3); // wifi
	s3c_pm_set_eint(21, 0x4); // bt
	s3c_pm_set_eint(22, 0x2); // power key
	s3c_pm_set_eint(23, 0x2);   // microusb
	s3c_pm_set_eint(25, 0x4); // volume down
	s3c_pm_set_eint(26, 0x4); // volume up
	s3c_pm_set_eint(28, 0x4);   // T_FLASH_DETECT
/*
	s3c_pm_set_eint(29, 0x4);   // ok key

   	if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
	{
	    s3c_pm_set_eint(30, 0x4); //sendend
	}
    else
    {
        s3c_pm_clear_eint(30);
    }
*/

#endif

#if defined CONFIG_T959_VER_B0
	s3c_pm_set_eint(29, 0x4);
// [[junghyunseok edit for fuel_int interrupt control of fuel_gauge 20100504
#elif defined CONFIG_KEPLER_VER_B0
#elif defined(CONFIG_KEPLER_VER_B2) || defined(CONFIG_T959_VER_B5) || defined (CONFIG_S5PC110_VIBRANTPLUS_BOARD) || defined(CONFIG_S5PC110_DEMPSEY_BOARD)
	s3c_pm_set_eint(27, 0x2);
// ]]junghyunseok edit for fuel_int interrupt control of fuel_gauge 20100504
#else	
	//gpio key
	if(HWREV >= 0xB)
	{
		s3c_pm_set_eint(27, 0x4);
		s3c_pm_set_eint(29, 0x4);
	}
#endif


//[hdlnc_bp_ytkwon : 20100326
//	#ifdef CONFIG_KEPLER_AUDIO_A1026
#if defined(CONFIG_S5PC110_KEPLER_BOARD)
		if(HWREV!=0x08)
		{
    			if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
			{
				s3c_pm_set_eint(30, 0x4); //sendend
				s3c_pm_set_eint(18, 0x4); //sendend 2.5
			}
   			else
   			{
       			s3c_pm_clear_eint(30);
	   			s3c_pm_clear_eint(18);
   			}
		}

#elif defined(CONFIG_S5PC110_T959_BOARD)
		if(HWREV==0x0a ||HWREV==0x0c)
		{
   			if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
			{
				s3c_pm_set_eint(30, 0x4); //sendend
			}
			else
   			{
     			s3c_pm_clear_eint(30);
       		}
			
		}
		else
		{
   			if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
			{
				s3c_pm_set_eint(30, 0x4); //sendend
				s3c_pm_set_eint(18, 0x4); //sendend 2.5
			}
   			else
   			{
	   			s3c_pm_clear_eint(30);
       			s3c_pm_clear_eint(18);
  			}
		}
#else	//sidekick, hawk, vibrantplus

   			if(get_headset_status() & SEC_HEADSET_4_POLE_DEVICE)
			{
				s3c_pm_set_eint(30, 0x4); //sendend
				s3c_pm_set_eint(18, 0x4); //sendend 2.5
			}
   			else
   			{
	   			s3c_pm_clear_eint(30);
       				s3c_pm_clear_eint(18);
  			}

#endif
	
//]hdlnc_bp_ytkwon : 20100326
#if defined (CONFIG_S5PC110_HAWK_BOARD)
		
	if(gp2a_get_proximity_enable())
	{
#if defined(CONFIG_HAWK_VER_B1_REAL_ADDED_FEATURE) //NAGSM_Android_HQ_KERNEL_CLEE_20100928 : Setup Hawk Real Board Rev 0.1 Proximity sensor
	    s3c_pm_set_eint(10, 0x2);//proximity
#else
	    s3c_pm_set_eint(2, 0x4);//proximity
#endif
	}
	s3c_pm_set_eint(20, 0x3);//WiFi
	s3c_pm_set_eint(23, 0x2);//microusb

#endif



	//s3c_pm_arch_prepare_irqs();
	

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

//	__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM	
	if((is_calling_or_playing & IS_VOICE_CALL_2G) || (is_calling_or_playing & IS_VOICE_CALL_3G) || (is_calling_or_playing & IS_DATA_CALL)){
			__raw_writel(0xFFDD, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM	
	}else{
		__raw_writel(0xFFFD, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM	
	}
	

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	__raw_writel(tmp, S5P_WAKEUP_STAT);

	//s3c_config_sleep_gpio();

	// Enable PS_HOLD pin to avoid reset failure */
        __raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);


	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	s3c_cpu_save(regs_save);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();
	

	/* restore the system state */

	s3c_pm_restore_core();

	/*Reset the uart registers*/
	__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);

	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();

	/* enable gpio, uart, mmc */
	tmp = __raw_readl(S5P_OTHERS);
	tmp |= (1<<31) | (1<<30) | (1<<28) | (1<<29);
	__raw_writel(tmp, S5P_OTHERS);

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	//printk("\nS5P_WAKEUP_STAT=%x\n",tmp);
	__raw_writel(tmp, S5P_WAKEUP_STAT);

	printk("wakeup source is 0x%x  \n", tmp);
	printk(" EXT_INT_0_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(0)));
	printk(" EXT_INT_1_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(1)));
	printk(" EXT_INT_2_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(2)));
	printk(" EXT_INT_3_PEND       %x \n", __raw_readl(S5PV210_EINTPEND(3)));

#if defined(CONFIG_S5PC110_HAWK_BOARD)
	//	s3c_pm_clear_eint(21);
#else
	s3c_pm_clear_eint(21);
#endif

//	s3c_pm_clear_eint(22); // to be cleared later

	/* check what irq (if any) restored the system */
	s3c_pm_debug_init();

	s3c_pm_arch_show_resume_irqs();



#if defined(CONFIG_MACH_S5PC110_P1)
	// Set wakeup stat
	s3c_pm_set_wakeup_stat();
#endif // CONFIG_MACH_S5PC110_P1

	//printk("Int pending register before =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));

	//printk("Int pending register after =%d\n",readl(S5PV210_EINTPEND(eint_pend_reg(22))));

	//S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
	//printk("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	//s3c_pm_debug_smdkled(1 << 1, 0);


	s3c_pm_check_restore();

	//mdelay(500);

	/* ok, let's return from sleep */
	printk(KERN_ERR "\n%s:%d\n", __func__, __LINE__);

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 9
0
static int s3c_pm_enter(suspend_state_t state)
{
	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	if (pm_check_eint_pend) {
		u32 pending_eint = pm_check_eint_pend();
		if (pending_eint) {
			pr_warn("%s: Aborting sleep, EINT PENDING(0x%08x)\n",
					__func__, pending_eint);
			return -EBUSY;
		}
	}

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_saved_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

#ifdef CONFIG_FAST_BOOT
	if (fake_shut_down) {
		/* Masking external wake up source
		 * only enable  power key, FUEL ALERT, AP/IF PMIC IRQ */
		__raw_writel(0xff77df7f, S5P_EINT_WAKEUP_MASK);
		/* disable all system int */
		__raw_writel(0xffffffff, S5P_WAKEUP_MASK);
	}
#endif

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	printk(KERN_ALERT "PM: SLEEP\n");

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	printk(KERN_ALERT "ARM_COREx_STATUS CORE1[0x%08x], CORE2[0x%08x], CORE3[0x%08x]\n",
			__raw_readl(S5P_VA_PMU + 0x2084),
			__raw_readl(S5P_VA_PMU + 0x2104),
			__raw_readl(S5P_VA_PMU + 0x2184));

	s3c_cpu_save(0, PLAT_PHYS_OFFSET - PAGE_OFFSET);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();

#ifdef CONFIG_FAST_BOOT
	fake_shut_down = false;
#endif

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();
	s3c_pm_restored_gpios();

	s3c_pm_debug_init();

	/* restore the system state */

	if (pm_cpu_restore)
		pm_cpu_restore();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
#ifdef CONFIG_SLP_WAKEUP_COUNT
	wakeup_state = 1;
	wakeup_counter = wakeup_counter + 1;
#endif
	return 0;
}
Ejemplo n.º 10
0
static int s3c_pm_enter(suspend_state_t state)
{
	/*                                              */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/*                                                             
                                                              
                               
 */

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/*                                                              */

	samsung_pm_save_gpios();
	samsung_pm_saved_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/*                                    */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/*                               */

	pm_cpu_prep();

	/*                         */

	flush_cache_all();

	s3c_pm_check_store();

	/*                          */

	s3c_pm_arch_stop_clocks();

	/*                                                 
                                                                
                        */

	cpu_suspend(0, pm_cpu_sleep);

	/*                          */

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	samsung_pm_restore_gpios();
	s3c_pm_restored_gpios();

	s3c_pm_debug_init();

	/*                                             */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/*                         */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/*                             */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 11
0
static int s3c_pm_enter(suspend_state_t state)
{
	static unsigned long regs_save[16];

	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

	s3c_sleep_save_phys = virt_to_phys(regs_save);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();


	s3c_config_sleep_gpio();
		
	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */


#if defined(CONFIG_WIMAX) || defined(CONFIG_WIMAX_MODULE)	//cky 20101116 WiMAX ext-interrupt
/* FIXME
	if (gpio_get_value(GPIO_WIMAX_EN))
	{
		DBG("WIMAX POWER ON!! Set WIMAX_INT as Ext-Int.\n");
		s3c_pm_set_eint(6, 0x0);	// WIMAX_INT: GPH0(6); LOW LEVEL DETECT
	}
*/
#endif

#ifdef FEATURE_FTM_SLEEP
	s3c_pm_check_auto_wakeup();
#endif

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* clear wakeup_stat register for next wakeup reason */
	__raw_writel(__raw_readl(S5P_WAKEUP_STAT), S5P_WAKEUP_STAT);

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	pmstats->sleep_count++;
	pmstats->sleep_freq = __raw_readl(S5P_CLK_DIV0);
	s3c_cpu_save(regs_save);
	pmstats->wake_count++;
	pmstats->wake_freq = __raw_readl(S5P_CLK_DIV0);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();

	fiq_glue_resume();
	local_fiq_enable();

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();
	s5pv210_restore_eint_group();

	s3c_pm_debug_init();

        /* restore the system state */

	if (pm_cpu_restore)
		pm_cpu_restore();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

#if defined(CONFIG_WIMAX) || defined(CONFIG_WIMAX_MODULE)	//cky 20101116 ext-int for wimax
/* FIXME
	if (gpio_get_value(GPIO_WIMAX_EN))
	{
		DBG("WIMAX POWER ON!! Set WIMAX_INT: INPUT.\n");
		s3c_pm_clear_eint(6);

		s3c_gpio_cfgpin(GPIO_WIMAX_INT, S3C_GPIO_INPUT);
		s3c_gpio_setpull(GPIO_WIMAX_INT, S3C_GPIO_PULL_UP);
	}
*/
#endif

#ifdef FEATURE_FTM_SLEEP
	if (ftm_sleep == 1)
	{
		ftm_sleep = 0;
		pm_disable_rtctic();
		wake_lock_timeout(&ftm_wake_lock, 11 * HZ);
		printk(KERN_DEBUG "pm_disable_rtctic...\n");
	}
#endif
	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 12
0
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
	static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
	unsigned int tmp;


	//janged
	start_sleep_state = 1;
	/* ensure the debug is initialised (if enabled) */


	s3c_pm_debug_init();

#ifdef PROCESS_WKUP_SRC
   set_request_screenon(0);
#endif

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		start_sleep_state = 0;
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/
#ifdef DISABLE_WAKEUP_RTC
	s3c_irqwake_intmask = 0xFFFF; // none
#else
	s3c_irqwake_intmask = 0xFFFD; // rtc_alarm(1)
#endif

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		start_sleep_state = 0;
		return -EINVAL;
	}

	/* ktj, If pmic INT occured while entering sleep mode, then return. */
	if( __raw_readl(S5PV210_EINT2PEND) & 0x1 ) 
	{
		set_request_poweroff();
		printk(KERN_ERR "%s: Aborting sleep because pmic INT\n", __func__);
		start_sleep_state = 0;
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

#ifndef USE_DMA_ALLOC
	s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
	__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */

	/* set flag for sleep mode idle2 flag is also reserved */
	__raw_writel(SLEEP_MODE, S5P_INFORM1);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

///	s3c_config_sleep_gpio(); /* ktj */

	/* set the irq configuration for wake */
#ifdef DISABLE_WAKEUP_WIFI_BT
//  s3c_irqwake_eintmask	= 0xfffcfffd;   // disable wifi, bt, 3g
    s3c_irqwake_eintmask	= 0xffdcfffd;   // disable wifi, bt
#else
    s3c_irqwake_eintmask	= 0xfbdcfbfd;
#endif
	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
		s3c_irqwake_intmask, s3c_irqwake_eintmask);

	/* Set wake up sources */
#if defined(CONFIG_MX100)   /* ktj */
    #ifdef DISABLE_WAKEUP_WIFI_BT
	s3c_pm_set_eint( 1, 0x02);  // power-key    : falling     
	s3c_pm_set_eint(16, 0x02);  // pmic-lowbat  : falling  
	s3c_pm_set_eint(17, 0x02);  // usb-adaptor  : falling 
	s3c_pm_set_eint(21, 0x01);  // cdma-host    : high
    #else
	s3c_pm_set_eint( 1, 0x02);  // power-key    : falling     
	s3c_pm_set_eint(10, 0x02);  // bt-host      : falling            
	s3c_pm_set_eint(16, 0x02);  // pmic-lowbat  : falling  
	s3c_pm_set_eint(17, 0x02);  // usb-adaptor  : falling
	s3c_pm_set_eint(21, 0x03);  // cdma-host    : rising  
	s3c_pm_set_eint(26, 0x03);  // wifi-host    : rising
    #endif
#endif

///	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */
	pm_cpu_prep();

	/* flush cache back to ram */
	flush_cache_all();

	s3c_pm_check_store();

	__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	__raw_writel(tmp, S5P_WAKEUP_STAT);

s3c_config_sleep_gpio(); // move here

	/* Enable PS_HOLD pin to avoid reset failure */
    __raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);

	/* send the cpu to sleep... */
	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */
	s3c_cpu_save(regs_save);

	/* restore the cpu state using the kernel's cpu init code. */
	cpu_init();

	/* restore the system state */

	s3c_pm_restore_core();
	
#if 0
	/*Reset the uart registers*/
	__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);
#endif
	
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();


#ifdef PROCESS_WKUP_SRC
	printk("\n\n\n\n\n");
    s3c_process_wakeup_source();    /* ktj proc_wkup_drc */	//janged move here
#endif

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	__raw_writel(tmp, S5P_WAKEUP_STAT);


#if 0 // ktj disable
    //Shanghai ewada
	tmp = __raw_readl(S5P_CLKGATE_IP3);
	__raw_writel(tmp | CP3_UNUSED_CLK_MASK, S5P_CLKGATE_IP3);
#endif
	
	s3c_pm_debug_init();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
	
	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	
	return 0;
}
Ejemplo n.º 13
0
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
	static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
	unsigned int tmp;

	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* store the physical address of the register recovery block */

#ifndef USE_DMA_ALLOC
	s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
	__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */

	/* set flag for sleep mode idle2 flag is also reserved */
	__raw_writel(SLEEP_MODE, S5P_INFORM1);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
		s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	s3c_cpu_save(regs_save);

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();

	/* restore the system state */

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();

	s3c_pm_debug_init();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}
Ejemplo n.º 14
0
/* s3c_pm_enter
 *
 * central control for sleep/resume process
*/
static int s3c_pm_enter(suspend_state_t state)
{
#ifndef USE_DMA_ALLOC
	static unsigned long regs_save[16];
#endif /* !USE_DMA_ALLOC */
	unsigned int tmp, audiodomain_On;
	unsigned int gpio;
	/* ensure the debug is initialised (if enabled) */
	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

//	printk("[PM-1] EINT0(0x%02x), EINT1(0x%02x), EINT2(0x%02x), EINT3(0x%02x)\n", 
//		__raw_readl(S5PV210_EINT0PEND), __raw_readl(S5PV210_EINT1PEND),
//		__raw_readl(S5PV210_EINT2PEND), __raw_readl(S5PV210_EINT3PEND));

	s5p_pad_pdn_control();

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/
	s3c_irqwake_intmask = 0xFFDD; // key || rtc_alarm


	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	// If pmic INT occured while entering sleep mode, then return.
	if( __raw_readl(S5PV210_EINT0PEND) & 0x80 ) {
		printk(KERN_ERR "%s: Aborting sleep because pmic INT\n", __func__);
		return -EINVAL;
	}


	/* store the physical address of the register recovery block */

#ifndef USE_DMA_ALLOC
	s3c_sleep_save_phys = virt_to_phys(regs_save);
#else
	__raw_writel(phy_regs_save, S5P_INFORM2);
#endif /* !USE_DMA_ALLOC */

	/* set flag for sleep mode idle2 flag is also reserved */
	__raw_writel(SLEEP_MODE, S5P_INFORM1);
       if(HWREV >=11) {
		// 20110113 - dukho.kim : control power of moviNAND at PM and add 400ms delay for stabilization of moviNAND. 
		gpio = readl(S5PV210_GPJ2DAT);
		writel(gpio & (~0x80), S5PV210_GPJ2DAT);
		mdelay(400);	
	}

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	s3c_config_sleep_gpio();

	/* set the irq configuration for wake */
	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: 0x%08lx, 0x%08lx\n",
			s3c_irqwake_intmask, s3c_irqwake_eintmask);

	/* Set wake up sources */
	s3c_pm_set_eint(7, 0x2);  // PMIC INT
	s3c_pm_set_eint(8, 0x4);  // DET_3.5
	s3c_pm_set_eint(9, 0x3);  // TA_nCHG, Rising edge
	s3c_pm_set_eint(11, 0x2);  // OneDRAM INT
#if defined (CONFIG_TARGET_LOCALE_EUR) || defined(CONFIG_TARGET_LOCALE_HKTW) || defined (CONFIG_TARGET_LOCALE_HKTW_FET) || defined(CONFIG_TARGET_LOCALE_VZW) || defined(CONFIG_TARGET_LOCALE_USAGSM)
	s3c_pm_set_eint(12, 0x4);  // SEND_END
#endif
	s3c_pm_set_eint(14, 0x4);  // FUEL_ALRT
	s3c_pm_set_eint(15, 0x2);  // PHONE_ACTIVE
	s3c_pm_set_eint(20, 0x4);  // WLAN
	s3c_pm_set_eint(21, 0x4);  // BT
	s3c_pm_set_eint(22, 0x2);  // Power Key
	s3c_pm_set_eint(23, 0x2);  // Jack_nINT
	s3c_pm_set_eint(24, 0x4);  // VOL_UP
	s3c_pm_set_eint(25, 0x4);  // VOL_DN
#ifndef CONFIG_TARGET_LOCALE_VZW
	s3c_pm_set_eint(27, 0x4);  // SIM
#endif

	s3c_pm_set_eint(28, 0x4);  // T_FLASH
#if defined (CONFIG_TARGET_LOCALE_EUR) || defined(CONFIG_TARGET_LOCALE_HKTW) || defined (CONFIG_TARGET_LOCALE_HKTW_FET) || defined(CONFIG_TARGET_LOCALE_VZW) || defined(CONFIG_TARGET_LOCALE_USAGSM)
	if(HWREV <= 0x4)
		s3c_pm_set_eint(29, 0x2);  // HOME Key
#endif
#ifdef CONFIG_TARGET_LOCALE_KOR
	s3c_pm_set_eint(30, 0x4);  // SEND_END
#endif

	s3c_pm_set_eint(5, 0x4);   //dock
	s3c_pm_set_eint(29, 0x4);  //accessory 


	//s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */
	pm_cpu_prep();

	/* flush cache back to ram */
	flush_cache_all();

	s3c_pm_check_store();

	__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); //0xFFDD:key, RTC_ALARM	

	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	__raw_writel(tmp, S5P_WAKEUP_STAT);

	//s3c_config_sleep_gpio();

	// Enable PS_HOLD pin to avoid reset failure */
        __raw_writel((0x5 << 12 | 0x1<<9 | 0x1<<8 | 0x1<<0),S5P_PSHOLD_CONTROL);


	/* send the cpu to sleep... */
	s3c_pm_arch_stop_clocks();


	/* s3c_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */
	s3c_cpu_save(regs_save);


	/* restore the cpu state using the kernel's cpu init code. */
	cpu_init();

	/* restore the system state */
	s3c_pm_restore_core();

	/*Reset the uart registers*/
	__raw_writel(0x0, S3C24XX_VA_UART3+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART3+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART2+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART2+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART1+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART1+S5P_UINTP);
	__raw_writel(0x0, S3C24XX_VA_UART0+S3C2410_UCON);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTM);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTSP);
	__raw_writel(0xf, S3C24XX_VA_UART0+S5P_UINTP);

	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();

	tmp = readl(S5P_NORMAL_CFG);
	if(!(tmp & S5PC110_POWER_DOMAIN_AUDIO)) {
		tmp = tmp | S5PC110_POWER_DOMAIN_AUDIO;
		writel(tmp , S5P_NORMAL_CFG);
		audiodomain_On = 1;
	} else {
		audiodomain_On = 0;
	}

	/* enable gpio, uart, mmc */
	tmp = __raw_readl(S5P_OTHERS);
	tmp |= (1<<31) | (1<<30) | (1<<28) | (1<<29);
	__raw_writel(tmp, S5P_OTHERS);

	tmp = readl(S5P_NORMAL_CFG);
	if (audiodomain_On) {
		tmp = tmp & ~S5PC110_POWER_DOMAIN_AUDIO;
		writel(tmp , S5P_NORMAL_CFG);
	}

	s3c_pm_debug_init();

	/* check what irq (if any) restored the system */
	s3c_pm_arch_show_resume_irqs();


	/*clear for next wakeup*/
	tmp = __raw_readl(S5P_WAKEUP_STAT);
	printk("\n[PM] S5P_WAKEUP_STAT = 0x%08x\n", tmp);
	__raw_writel(tmp, S5P_WAKEUP_STAT);


#if defined(CONFIG_MACH_S5PC110_P1)
	// Set wakeup stat
	s3c_pm_set_wakeup_stat();
#endif // CONFIG_MACH_S5PC110_P1

	//s3c_pm_clear_eint(21);
	//s3c_pm_clear_eint(22);

	//S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
	//printk("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	//s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	printk("[PM-2] EINT0(0x%02x), EINT1(0x%02x), EINT2(0x%02x), EINT3(0x%02x)\n", 
		__raw_readl(S5PV210_EINT0PEND), __raw_readl(S5PV210_EINT1PEND),
		__raw_readl(S5PV210_EINT2PEND), __raw_readl(S5PV210_EINT3PEND));

	/* ok, let's return from sleep */
	S3C_PMDBG("S3C PM Resume (post-restore)\n");

	return 0;
}