const char *
get_system_type(void)
{
static char s[32];
if (bcm947xx_sbh) {
sprintf(s, "Broadcom BCM%X chip rev %d", sb_chip(bcm947xx_sbh),
sb_chiprev(bcm947xx_sbh));
return s;
}
else
return "Broadcom BCM947XX";
}
void __init bcm947xx_time_init(void)
{
unsigned int hz;
extifregs_t *eir;
/*
* Use deterministic values for initial counter interrupt
* so that calibrate delay avoids encountering a counter wrap.
*/
write_c0_count(0);
write_c0_compare(0xffff);
if (!(hz = sb_mips_clock(sbh)))
hz = 100000000;
#if defined(CONFIG_BCM94702_CPCI) || defined(CONFIG_BCM94704_CPCI)
/* Init RTC */
rtc17xx_tod_init();
rtc17xx_tod_print();
/* Use RTC from local bus */
rtc_get_time = rtc17xx_get_time;
rtc_set_time = rtc17xx_set_time;
#endif
printk("CPU: BCM%04x rev %d at %d MHz\n", sb_chip(sbh),
sb_chiprev(sbh), (hz + 500000) / 1000000);
/* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
mips_hpt_frequency = hz / 2;
/* Set watchdog interval in ms */
watchdog = simple_strtoul(nvram_safe_get("watchdog"), NULL, 0);
/* Set panic timeout in seconds */
panic_timeout = watchdog / 1000;
/* Setup blink */
if ((eir = sb_setcore(sbh, SB_EXTIF, 0))) {
sbconfig_t *sb =
(sbconfig_t *) ((unsigned int) eir + SBCONFIGOFF);
unsigned long base =
EXTIF_CFGIF_BASE(sb_base
(readl((void *) (&sb->sbadmatch1))));
mcr = (u8 *) ioremap_nocache(base + UART_MCR, 1);
}
}
/*
* Initialize nonvolatile variable table from sprom.
* Return 0 on success, nonzero on error.
*/
static int
initvars_srom_pci(void *sbh, void *curmap, char **vars, uint *count)
{
uint16 w, *b;
uint8 sromrev = 0;
struct ether_addr ea;
char eabuf[32];
uint32 w32;
int woff, i;
char *vp, *base;
osl_t *osh = sb_osh(sbh);
bool flash = FALSE;
char name[SB_DEVPATH_BUFSZ+16], *value;
char devpath[SB_DEVPATH_BUFSZ];
int err;
/*
* Apply CRC over SROM content regardless SROM is present or not,
* and use variable <devpath>sromrev's existance in flash to decide
* if we should return an error when CRC fails or read SROM variables
* from flash.
*/
b = MALLOC(osh, SROM_MAX);
ASSERT(b);
if (!b)
return -2;
err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b,
64, TRUE);
if (b[SROM4_SIGN] == SROM4_SIGNATURE) {
/* sromrev >= 4, read more */
err = sprom_read_pci(osh, (void*)((int8*)curmap + PCI_BAR0_SPROM_OFFSET), 0, b, SROM4_WORDS, TRUE);
sromrev = b[SROM4_WORDS - 1] & 0xff;
} else if (err == 0) {
/* srom is good and is rev < 4 */
/* top word of sprom contains version and crc8 */
sromrev = b[63] & 0xff;
/* bcm4401 sroms misprogrammed */
if (sromrev == 0x10)
sromrev = 1;
}
if (err) {
#ifdef WLTEST
BS_ERROR(("SROM Crc Error, so see if we could use a default\n"));
w32 = OSL_PCI_READ_CONFIG(osh, PCI_SPROM_CONTROL, sizeof(uint32));
if (w32 & SPROM_OTPIN_USE) {
BS_ERROR(("srom crc failed with OTP, use default vars....\n"));
vp = base = mfgsromvars;
if (sb_chip(sbh) == BCM4311_CHIP_ID) {
BS_ERROR(("setting the devid to be 4311\n"));
vp += sprintf(vp, "devid=0x4311");
vp++;
}
bcopy(defaultsromvars, vp, MFGSROM_DEFVARSLEN);
vp += MFGSROM_DEFVARSLEN;
goto varsdone;
} else {
BS_ERROR(("srom crc failed with SPROM....\n"));
#endif /* WLTEST */
if ((err = sb_devpath(sbh, devpath, sizeof(devpath))))
return err;
sprintf(name, "%ssromrev", devpath);
if (!(value = getvar(NULL, name)))
return (-1);
sromrev = (uint8)bcm_strtoul(value, NULL, 0);
flash = TRUE;
#ifdef WLTEST
}
#endif /* WLTEST */
}
/* srom version check */
if (sromrev > 4)
return (-2);
ASSERT(vars);
ASSERT(count);
base = vp = MALLOC(osh, VARS_MAX);
ASSERT(vp);
if (!vp)
return -2;
/* read variables from flash */
if (flash) {
if ((err = initvars_flash(osh, &vp, VARS_MAX, devpath)))
goto err;
goto varsdone;
}
vp += sprintf(vp, "sromrev=%d", sromrev);
vp++;
if (sromrev >= 4) {
uint path, pathbase;
const uint pathbases[MAX_PATH] = {SROM4_PATH0, SROM4_PATH1,
SROM4_PATH2, SROM4_PATH3};
vp += sprintf(vp, "boardrev=%d", b[SROM4_BREV]);
vp++;
vp += sprintf(vp, "boardflags=%d", (b[SROM4_BFL1] << 16) | b[SROM4_BFL0]);
vp++;
vp += sprintf(vp, "boardflags2=%d", (b[SROM4_BFL3] << 16) | b[SROM4_BFL2]);
vp++;
/* The macaddr */
ea.octet[0] = (b[SROM4_MACHI] >> 8) & 0xff;
ea.octet[1] = b[SROM4_MACHI] & 0xff;
ea.octet[2] = (b[SROM4_MACMID] >> 8) & 0xff;
ea.octet[3] = b[SROM4_MACMID] & 0xff;
ea.octet[4] = (b[SROM4_MACLO] >> 8) & 0xff;
ea.octet[5] = b[SROM4_MACLO] & 0xff;
bcm_ether_ntoa(&ea, eabuf);
vp += sprintf(vp, "macaddr=%s", eabuf);
vp++;
w = b[SROM4_CCODE];
if (w == 0)
vp += sprintf(vp, "ccode=");
else
vp += sprintf(vp, "ccode=%c%c", (w >> 8), (w & 0xff));
vp++;
vp += sprintf(vp, "regrev=%d", b[SROM4_REGREV]);
vp++;
w = b[SROM4_LEDBH10];
if ((w != 0) && (w != 0xffff)) {
/* ledbh0 */
vp += sprintf(vp, "ledbh0=%d", (w & 0xff));
vp++;
/* ledbh1 */
vp += sprintf(vp, "ledbh1=%d", (w >> 8) & 0xff);
vp++;
}
