static void sc_wait_for_interrupt(unsigned int pwrlevel, bool dpidle)
{
u32 ckdiv1;
/* for shutdown mode issue-2 */
ckdiv1 = sc_read(TOP_CKDIV1);
if (!((ckdiv1 >= 0x14 && ckdiv1 < 0x18) || ckdiv1 >= 0x1d)) /* !(1/5 || 1/6) */
sc_write(TOP_CKDIV1, 0x0b); /* (1/4) */
sc_write_sync();
if (pwrlevel == 0) {
wfi_with_sync();
} else {
if (dpidle) /* debug help */
aee_rr_rec_shutdown_mode(1);
else
aee_rr_rec_shutdown_mode(2);
if (!cpu_power_down(pwrlevel == 1 ? DORMANT_MODE : SHUTDOWN_MODE))
wfi_with_sync();
aee_rr_rec_shutdown_mode(0);
cpu_check_dormant_abort();
}
/* for shutdown mode issue-2 */
sc_write(TOP_CKDIV1, 0x00); /* (1/1) */
sc_write(TOP_CKDIV1, ckdiv1);
sc_write_sync();
}
static irqreturn_t sc_irq_handler(int irq, void *dev_id)
{
sc_xerror("!!! SC ISR SHOULD NOT BE EXECUTED !!!\n");
spin_lock(&sc_lock);
sc_write(SC_ISR_MASK, 0x0007);
sc_write(SC_ISR_STATUS, 0x0007); /* write 1 clear */
sc_write_sync();
spin_unlock(&sc_lock);
return IRQ_HANDLED;
}
static int lua_net_print(lua_State * L)
{
const char * msg = lua_tostring(L, 1);
net_lock();
sc_write(1, msg, strlen(msg));
net_unlock();
return 0;
}
void dcload_printk(const char *str) {
int oldirq = 0;
if (net_trylock()) {
STOPIRQ;
sc_write(1, str, strlen(str));
STARTIRQ;
net_unlock();
}
}
ssize_t dcload_write(uint32 hnd, const void *buf, size_t cnt)
{
int oldirq = 0;
ssize_t ret = -1;
net_lock();
#ifndef BENPATCH
if (hnd)
ret = sc_write(hnd-1, buf, cnt);
#else
hnd = dcload_get_handler(hnd);
if (hnd) {
hnd--; /* KOS uses 0 for error, not -1 */
STOPIRQ;
ret = sc_write(hnd, buf, cnt);
STARTIRQ;
}
#endif
net_unlock();
return ret;
}
void sc_unrequest_mdbus_clk(sc_mdbus_user_t user)
{
unsigned long flags;
if (user < SC_MDBUS_USER_SLEEP || user > SC_MDBUS_USER_AUDIO)
return;
spin_lock_irqsave(&sc_lock, flags);
sc_mdbus_user &= ~(1U << user);
if (!(sc_mdbus_user & SC_MDBUS_USER_MASK)) { /* no users */
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) & ~SC_CLK_CON_CLKREQ2MD);
sc_write_sync();
}
//sc_xinfo("user %d unrequests MD bus clock (0x%x)\n", user, sc_mdbus_user);
spin_unlock_irqrestore(&sc_lock, flags);
}
int main(void)
{
int fd;
int r;
fd = sc_open("/tmp/test", O_RDWR | O_CREAT | O_TRUNC, 0777);
if (fd == -1) {
fprintf(stderr, "fail to open file.\n");
return -1;
}
fprintf(stderr, "fd: %d.\n", fd);
r = sc_write(fd, "Hello.\n", 7);
fprintf(stderr, "r: %d.\n", r);
r = sc_close(fd);
fprintf(stderr, "r: %d.\n", r);
return 0;
}
static int printk_func(const uint8 *data, int len, int xlat)
{
if (tool_ip) {
int oldirq = 0;
int res = -1;
if (irq_inside_int())
return 0;
if (net_trylock()) {
STOPIRQ;
res = sc_write(1, data, len);
STARTIRQ;
net_unlock();
}
return res;
} else {
if (real_old_printk_func)
return real_old_printk_func(data, len, xlat);
else
return len;
}
}
void sc_mod_init(void)
{
int r;
unsigned long flags;
cpu_dormant_init();
spin_lock_irqsave(&sc_lock, flags);
#ifdef CONFIG_MTK_SC_DEBUG
sc_pwake_en = 0;
/* make AP control whole-chip sleep mode */
sc_write(SC_MD_INTF_CON, 0x363f);
#else
/* NOTE: reset MD_INTF_CON to 0 because it was modified in bootloader */
sc_write(SC_MD_INTF_CON, 0);
#endif
/* need to match with MD's RM_CLK_SETTLE setting */
sc_write(SC_CLK_SETTLE, SC_CLK_SETTLE_TYPICAL);
/* MTCMOS power-on sequence: CPUSYS(2) -> CPU(0) -> NEON(3) -> DBG(1) */
sc_write(SC_PWR_CON8, (1 << 20) | (3 << 16) | (0 << 12) | (2 << 8));
//sc_write(SC_PWR_CON9, 0x000f);
sc_write(SC_PWR_CON9, 0); /* for shutdown mode issue-1 */
/* bit 17: DVFS_SEL[0] = 1 depends on AP_SRCLKEN (from 75E2) */
/* bit 7: STANDBYWFI = STANDBYWFI_CPU & L2CC_IDLE & SCU_IDLE (from 75E2) */
/* bit 4: enable SRCLKENAI pin */
sc_write(SC_CLK_CON, (1U << 17) | (1U << 7) | (1U << 4));
/* if bus clock source is from 3GPLL, make AP be able to control 3GPLL */
if ((sc_read(TOP_CKMUXSEL) & 0x3) == 0x2)
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) | SC_CLK_CON_3GPLLON);
/* set peripheral control to handshake mode */
sc_write(SC_PERI_CON, 0x0081);
sc_write(SC_PAUSE, 0);
/* mask all wakeup sources */
sc_write(SC_WAKEUP_EVENT_MASK, 0xffffffff);
/* for cleaning wakeup source status */
sc_write(SC_DBG_WAKEUP, 0);
sc_write(SC_TIMER_CON, SC_TIMER_CON_DBG | SC_TIMER_CON_EN);
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_CONWR |
SC_TIMER_CMD_CNTWR | SC_TIMER_CMD_WR);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
sc_write(SC_ISR_MASK, 0x0007);
sc_write(SC_ISR_STATUS, 0x0007); /* write 1 clear */
sc_write_sync();
spin_unlock_irqrestore(&sc_lock, flags);
r = request_irq(MT_SLEEP_IRQ_ID, sc_irq_handler, IRQF_TRIGGER_LOW,
SC_NAME, NULL);
if (r) {
sc_xerror("register SC IRQ failed (%d)\n", r);
WARN_ON(1);
}
}
/*
* pwrlevel:
* 0: CPU standby + AP sleep (SRCLKENA high) => legacy deep idle
* 1: CPU dormant (L1/L2 sleep) + AP sleep (SRCLKENA high)
* 2: CPU shutdown (L1/L2 power down) + AP sleep (SRCLKENA high)
*/
void sc_go_to_dpidle(unsigned int pwrlevel)
{
u32 wakesrc, dvfscon, clksettle;
unsigned long flags;
struct mtk_irq_mask mask;
wakesrc = WAKE_SRC_KP | WAKE_SRC_MSDC1 | WAKE_SRC_EINT | WAKE_SRC_RTC |
WAKE_SRC_CCIF_MD | WAKE_SRC_ACCDET | WAKE_SRC_GPT |
WAKE_SRC_AFE;
spin_lock_irqsave(&sc_lock, flags);
mt_irq_mask_all(&mask);
mt_irq_unmask_for_sleep(MT_SLEEP_IRQ_ID);
/* to workaround DVFS issue due to CKDIV1 failure */
dvfscon = sc_read(SC_AP_DVFS_CON);
//ckdiv1 = sc_read(TOP_CKDIV1);
sc_write(SC_AP_DVFS_CON, dvfscon | 0x3);
sc_write_sync();
sc_set_apmcu_pwrctl(pwrlevel);
/* keep SRCLKENA high (26M on) when in sleep mode */
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) | SC_CLK_CON_SRCLKEN);
/* set SYSCLK settle time to 1T 32K */
clksettle = sc_read(SC_CLK_SETTLE);
sc_write(SC_CLK_SETTLE, SC_CLK_SETTLE_26MON);
sc_write(SC_PAUSE, 0xffffffff);
/* unmask wakeup sources */
sc_write(SC_WAKEUP_EVENT_MASK, ~wakesrc);
/* unmask Pause Interrupt and Pause Abort */
sc_write(SC_ISR_MASK, 0x0001);
sc_write(SC_TIMER_CON, SC_TIMER_CON_EN);
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_CONWR |
SC_TIMER_CMD_CNTWR | SC_TIMER_CMD_WR);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
if (sc_dpidle_can_enter()) {
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_PAUSE);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
sc_dpidle_before_wfi();
sc_wait_for_interrupt(pwrlevel, true);
sc_dpidle_after_wfi();
}
/* delay to make sure ISR_STATUS can be cleared later */
udelay(100);
/* for cleaning wakeup source status */
sc_write(SC_DBG_WAKEUP, 0);
sc_write(SC_TIMER_CON, SC_TIMER_CON_DBG | SC_TIMER_CON_EN);
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_CONWR |
SC_TIMER_CMD_WR);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
sc_write(SC_ISR_MASK, 0x0007);
sc_write(SC_ISR_STATUS, 0x0007); /* write 1 clear */
/* restore SC_CLK_SETTLE and SC_CLK_CON */
sc_write(SC_CLK_SETTLE, clksettle);
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) & ~SC_CLK_CON_SRCLKEN);
sc_write_sync();
/* to workaround DVFS issue due to CKDIV1 failure */
//sc_write(TOP_CKDIV1, 0x00);
//sc_write(TOP_CKDIV1, ckdiv1);
sc_write(SC_AP_DVFS_CON, dvfscon);
sc_write_sync();
mt_irq_mask_restore(&mask);
spin_unlock_irqrestore(&sc_lock, flags);
}
/*
* pwrlevel:
* 0: CPU standby + AP sleep => legacy sleep mode
* 1: CPU dormant (L1/L2 sleep) + AP sleep
* 2: CPU shutdown (L1/L2 power down) + AP sleep
*/
wake_reason_t sc_go_to_sleep(unsigned int pwrlevel)
{
u32 wakesrc, dvfscon, sec = 0;
int i, r;
unsigned long flags;
struct mtk_irq_mask mask;
static wake_reason_t last_wr = WR_NONE;
sc_info2("pwrlevel = %u\n", pwrlevel);
if (sc_pwake_en)
sec = sc_get_wake_period(!!(last_wr != WR_SLP_TMR));
mtk_wdt_suspend();
spin_lock_irqsave(&sc_lock, flags);
wakesrc = sc_wake_src;
for (i = 0; i < NUM_WAKE_SRC; i++) {
if (wakesrc & (1U << i)) {
r = sc_enable_wake_irq(sc_wake_irq[i]);
if (r)
wakesrc &= ~(1U << i);
}
}
mt_irq_mask_all(&mask);
mt_irq_unmask_for_sleep(MT_SLEEP_IRQ_ID);
/* to workaround DVFS issue due to CKDIV1 failure */
dvfscon = sc_read(SC_AP_DVFS_CON);
//ckdiv1 = sc_read(TOP_CKDIV1);
sc_write(SC_AP_DVFS_CON, dvfscon | 0x3);
sc_write_sync();
sc_set_apmcu_pwrctl(pwrlevel);
#ifdef CONFIG_MTK_SC_DEBUG
/* bypass CSYSPWRUPREQ to avoid keeping SRCLKENA high */
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) | SC_CLK_CON_BYPASSDBG);
sc_write_sync();
#endif
last_wr = sc_enter_pause_mode(pwrlevel, sec, wakesrc);
#ifdef CONFIG_MTK_SC_DEBUG
/* restore SC_CLK_CON */
sc_write(SC_CLK_CON, sc_read(SC_CLK_CON) & ~SC_CLK_CON_BYPASSDBG);
sc_write_sync();
#endif
/* to workaround DVFS issue due to CKDIV1 failure */
//sc_write(TOP_CKDIV1, 0x00);
//sc_write(TOP_CKDIV1, ckdiv1);
sc_write(SC_AP_DVFS_CON, dvfscon);
sc_write_sync();
mt_irq_mask_restore(&mask);
spin_unlock_irqrestore(&sc_lock, flags);
mtk_wdt_resume();
return last_wr;
}
static wake_reason_t sc_enter_pause_mode(unsigned int pwrlevel, u32 sec, u32 wakesrc)
{
u32 pause, wakesta, isr;
wake_reason_t wr;
sc_info2("sec = %u, wakesrc = 0x%x\n", sec, wakesrc);
if (sec > 0) {
sc_write(SC_PAUSE, sec * 32768);
/* unmask wakeup sources */
sc_write(SC_WAKEUP_EVENT_MASK, ~wakesrc);
/* unmask Pause Interrupt, Pause Abort and Timer Timeout */
sc_write(SC_ISR_MASK, 0);
sc_write(SC_TIMER_CON, SC_TIMER_CON_DOWN | SC_TIMER_CON_EN);
} else {
sc_write(SC_PAUSE, 0xffffffff);
/* unmask wakeup sources */
sc_write(SC_WAKEUP_EVENT_MASK, ~wakesrc);
/* unmask Pause Interrupt and Pause Abort */
sc_write(SC_ISR_MASK, 0x0001);
sc_write(SC_TIMER_CON, SC_TIMER_CON_EN);
}
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_CONWR |
SC_TIMER_CMD_CNTWR | SC_TIMER_CMD_WR);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_PAUSE);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
sc_wait_for_interrupt(pwrlevel, false);
wakesta = sc_read(SC_WAKEUP_SRC);
isr = sc_read(SC_ISR_STATUS);
pause = sc_read(SC_FINAL_PAUSE);
/* delay to make sure ISR_STATUS can be cleared later */
udelay(100);
/* for cleaning wakeup source status */
sc_write(SC_DBG_WAKEUP, 0);
sc_write(SC_TIMER_CON, SC_TIMER_CON_DBG | SC_TIMER_CON_EN);
sc_write(SC_TIMER_CMD, SC_TIMER_CMD_KEY | SC_TIMER_CMD_CONWR |
SC_TIMER_CMD_WR);
while (!(sc_read(SC_TIMER_STA) & SC_TIMER_STA_CMDCPL));
sc_write(SC_ISR_MASK, 0x0007);
sc_write(SC_ISR_STATUS, 0x0007); /* write 1 clear */
sc_write_sync();
if (isr == 0x0001) { /* Timer Timeout */
wr = WR_SLP_TMR;
sc_info2("wake up by SLP_TMR (0x%x)(0x%x)(%u)\n", wakesta, isr, pause);
} else {
wr = WR_WAKE_SRC;
sc_output_wake_reason(wakesrc, wakesta, isr, pause);
}
return wr;
}
static void sc_set_apmcu_pwrctl(unsigned int pwrlevel)
{
switch (pwrlevel) {
case 0:
/* CPU standby + AP sleep => legacy sleep mode */
sc_write(SC_PWR_CON0, 0x01a5);
sc_write(SC_PWR_CON1, 0x0185);
sc_write(SC_PWR_CON2, 0x01a5);
sc_write(SC_PWR_CON3, 0x0185);
sc_write(SC_APMCU_PWRCTL, 0x0);
break;
case 1:
/* CPU dormant (L1/L2 sleep) + AP sleep */
sc_write(SC_PWR_CON0, 0x2125);
sc_write(SC_PWR_CON1, 0x0105);
//sc_write(SC_PWR_CON2, 0x2525); /* CPUSYS reset is last triggered */
sc_write(SC_PWR_CON2, 0x2225); /* for shutdown mode issue-1 */
sc_write(SC_PWR_CON3, 0x0105);
sc_write(SC_APMCU_PWRCTL, 0x2);
break;
case 2:
default:
/* CPU shutdown (L1/L2 power down) + AP sleep */
sc_write(SC_PWR_CON0, 0x0125);
sc_write(SC_PWR_CON1, 0x0105);
//sc_write(SC_PWR_CON2, 0x0525); /* CPUSYS reset is last triggered */
sc_write(SC_PWR_CON2, 0x0225); /* for shutdown mode issue-1 */
sc_write(SC_PWR_CON3, 0x0105);
sc_write(SC_APMCU_PWRCTL, 0x3);
}
sc_write_sync();
}
static UWORD crysbind(WORD opcode, LONG pglobal, WORD control[], WORD int_in[], WORD int_out[], LONG addr_in[])
{
LONG maddr;
LONG tree;
WORD mouse, ret;
WORD unsupported = FALSE;
maddr = 0;
ret = TRUE;
switch(opcode)
{
/* Application Manager */
case APPL_INIT:
#if DBG_GEMSUPER
aestrace("appl_init()");
#endif
LWSET(pglobal, AES_VERSION); /* version number */
LWSET(pglobal+2, 0x0001); /* num of concurrent procs*/
/* LLSET(pglobal, 0x00010200L);
*/
LWSET(pglobal+4, rlr->p_pid);
sh_deskf(0, pglobal+6);
LWSET(pglobal+20, gl_nplanes);
LLSET(pglobal+22, ADDR(&D));
/* reset dispatcher */
/* count to let the app*/
/* run a while. */
dspcnt = 0;
ret = ap_init();
break;
case APPL_READ:
case APPL_WRITE:
ap_rdwr(opcode == APPL_READ ? MU_MESAG : MU_SDMSG,
fpdnm(NULLPTR, AP_RWID), AP_LENGTH, AP_PBUFF);
break;
case APPL_FIND:
ret = ap_find( AP_PNAME );
break;
case APPL_TPLAY:
ap_tplay(AP_TBUFFER, AP_TLENGTH, AP_TSCALE);
break;
case APPL_TRECORD:
ret = ap_trecd(AP_TBUFFER, AP_TLENGTH);
break;
#if CONF_WITH_PCGEM
case APPL_YIELD:
dsptch();
break;
#endif
case APPL_EXIT:
#if DBG_GEMSUPER
aestrace("appl_exit()");
#endif
ap_exit();
break;
/* Event Manager */
case EVNT_KEYBD:
ret = ev_block(MU_KEYBD, 0x0L);
break;
case EVNT_BUTTON:
ret = ev_button(B_CLICKS, B_MASK, B_STATE, &EV_MX);
break;
case EVNT_MOUSE:
ret = ev_mouse((MOBLK *)&MO_FLAGS, &EV_MX);
break;
case EVNT_MESAG:
#if DBG_GEMSUPER
aestrace("evnt_mesag()");
#endif
ap_rdwr(MU_MESAG, rlr, 16, ME_PBUFF);
break;
case EVNT_TIMER:
ev_timer( HW(T_HICOUNT) + LW(T_LOCOUNT) );
break;
case EVNT_MULTI:
#if DBG_GEMSUPER
aestrace("evnt_multi()");
#endif
if (MU_FLAGS & MU_TIMER)
maddr = HW(MT_HICOUNT) + LW(MT_LOCOUNT);
tree = HW(MB_CLICKS) | LW((MB_MASK << 8) | MB_STATE);
ret = ev_multi(MU_FLAGS, (MOBLK *)&MMO1_FLAGS, (MOBLK *)&MMO2_FLAGS,
maddr, tree, MME_PBUFF, &EV_MX);
break;
case EVNT_DCLICK:
ret = ev_dclick(EV_DCRATE, EV_DCSETIT);
break;
/* Menu Manager */
case MENU_BAR:
if (gl_mnppd == rlr || gl_mnppd == NULL)
mn_bar(MM_ITREE, SHOW_IT, rlr->p_pid);
else
menu_tree[rlr->p_pid] = (SHOW_IT) ? MM_ITREE : 0x0L;
break;
case MENU_ICHECK:
do_chg(MM_ITREE, ITEM_NUM, CHECKED, CHECK_IT, FALSE, FALSE);
break;
case MENU_IENABLE:
do_chg(MM_ITREE, (ITEM_NUM & 0x7fff), DISABLED,
!ENABLE_IT, ((ITEM_NUM & 0x8000) != 0x0), FALSE);
break;
case MENU_TNORMAL:
if (gl_mntree == menu_tree[rlr->p_pid])
do_chg(MM_ITREE, TITLE_NUM, SELECTED, !NORMAL_IT,
TRUE, TRUE);
break;
case MENU_TEXT:
tree = MM_ITREE;
strcpy((char *)LLGET(OB_SPEC(ITEM_NUM)),
(char *)MM_PTEXT);
break;
case MENU_REGISTER:
ret = mn_register(MM_PID, MM_PSTR);
break;
case MENU_UNREGISTER:
#if CONF_WITH_PCGEM
/* distinguish between menu_unregister() and menu_popup() */
if (IN_LEN == 1)
mn_unregister( MM_MID );
else
#endif
unsupported = TRUE;
break;
case MENU_CLICK:
/* distinguish between menu_click() and menu_attach() */
/*
* although menu_click() is PC-GEM only, it's always
* enabled because the desktop uses it.
*/
if (IN_LEN == 2) {
if (MN_SETIT)
gl_mnclick = MN_CLICK;
ret = gl_mnclick;
} else
unsupported = TRUE;
break;
/* Object Manager */
case OBJC_ADD:
ob_add(OB_TREE, OB_PARENT, OB_CHILD);
break;
case OBJC_DELETE:
ob_delete(OB_TREE, OB_DELOB);
break;
case OBJC_DRAW:
gsx_sclip((GRECT *)&OB_XCLIP);
ob_draw(OB_TREE, OB_DRAWOB, OB_DEPTH);
break;
case OBJC_FIND:
ret = ob_find(OB_TREE, OB_STARTOB, OB_DEPTH,
OB_MX, OB_MY);
break;
case OBJC_OFFSET:
ob_offset(OB_TREE, OB_OBJ, &OB_XOFF, &OB_YOFF);
break;
case OBJC_ORDER:
ob_order(OB_TREE, OB_OBJ, OB_NEWPOS);
break;
case OBJC_EDIT:
gsx_sclip(&gl_rfull);
OB_ODX = OB_IDX;
ret = ob_edit(OB_TREE, OB_OBJ, OB_CHAR, &OB_ODX, OB_KIND);
break;
case OBJC_CHANGE:
gsx_sclip((GRECT *)&OB_XCLIP);
ob_change(OB_TREE, OB_DRAWOB, OB_NEWSTATE, OB_REDRAW);
break;
/* Form Manager */
case FORM_DO:
ret = fm_do(FM_FORM, FM_START);
break;
case FORM_DIAL:
ret = fm_dial(FM_TYPE, (GRECT *)&FM_X);
break;
case FORM_ALERT:
ret = fm_alert(FM_DEFBUT, FM_ASTRING);
break;
case FORM_ERROR:
ret = fm_error(FM_ERRNUM);
break;
case FORM_CENTER:
ob_center(FM_FORM, (GRECT *)&FM_XC);
break;
case FORM_KEYBD:
gsx_sclip(&gl_rfull);
FM_OCHAR = FM_ICHAR;
FM_ONXTOB = FM_INXTOB;
ret = fm_keybd(FM_FORM, FM_OBJ, &FM_OCHAR, &FM_ONXTOB);
break;
case FORM_BUTTON:
gsx_sclip(&gl_rfull);
ret = fm_button(FM_FORM, FM_OBJ, FM_CLKS, &FM_ONXTOB);
break;
/* Graphics Manager */
case GRAF_RUBBOX:
gr_rubbox(GR_I1, GR_I2, GR_I3, GR_I4,
&GR_O1, &GR_O2);
break;
case GRAF_DRAGBOX:
gr_dragbox(GR_I1, GR_I2, GR_I3, GR_I4, (GRECT *)&GR_I5,
&GR_O1, &GR_O2);
break;
case GRAF_MBOX:
gr_movebox(GR_I1, GR_I2, GR_I3, GR_I4, GR_I5, GR_I6);
break;
case GRAF_GROWBOX:
gr_growbox((GRECT *)&GR_I1, (GRECT *)&GR_I5);
break;
case GRAF_SHRINKBOX:
gr_shrinkbox((GRECT *)&GR_I1, (GRECT *)&GR_I5);
break;
case GRAF_WATCHBOX:
ret = gr_watchbox(GR_TREE, GR_OBJ, GR_INSTATE, GR_OUTSTATE);
break;
case GRAF_SLIDEBOX:
ret = gr_slidebox(GR_TREE, GR_PARENT, GR_OBJ, GR_ISVERT);
break;
case GRAF_HANDLE:
GR_WCHAR = gl_wchar;
GR_HCHAR = gl_hchar;
GR_WBOX = gl_wbox;
GR_HBOX = gl_hbox;
ret = gl_handle;
break;
case GRAF_MOUSE:
if (GR_MNUMBER > 255)
{
if (GR_MNUMBER == M_OFF)
gsx_moff();
if (GR_MNUMBER == M_ON)
gsx_mon();
}
else
{
if (GR_MNUMBER != 255)
{
switch(GR_MNUMBER) {
case 1:
mouse = MICE01;
break;
case 2:
mouse = MICE02;
break;
case 3:
mouse = MICE03;
break;
case 4:
mouse = MICE04;
break;
case 5:
mouse = MICE05;
break;
case 6:
mouse = MICE06;
break;
case 7:
mouse = MICE07;
break;
default:
mouse = MICE00;
break;
}
maddr = *(LONG *) &rs_bitblk[mouse];
}
else
maddr = GR_MADDR;
gsx_mfset(maddr);
}
break;
case GRAF_MKSTATE:
gr_mkstate(&GR_MX, &GR_MY, &GR_MSTATE, &GR_KSTATE);
break;
/* Scrap Manager */
case SCRP_READ:
ret = sc_read((BYTE*)SC_PATH);
break;
case SCRP_WRITE:
ret = sc_write((const BYTE*)SC_PATH);
break;
#if CONF_WITH_PCGEM
case SCRP_CLEAR:
ret = sc_clear();
break;
#endif
/* File Selector Manager */
case FSEL_INPUT:
ret = fs_input((BYTE*)FS_IPATH, (BYTE*)FS_ISEL, &FS_BUTTON, NULL);
break;
case FSEL_EXINPUT:
ret = fs_input((BYTE*)FS_IPATH, (BYTE*)FS_ISEL, &FS_BUTTON, (BYTE *)FS_ILABEL);
break;
/* Window Manager */
case WIND_CREATE:
ret = wm_create(WM_KIND, (GRECT *)&WM_WX);
break;
case WIND_OPEN:
wm_open(WM_HANDLE, (GRECT *)&WM_WX);
break;
case WIND_CLOSE:
wm_close(WM_HANDLE);
break;
case WIND_DELETE:
wm_delete(WM_HANDLE);
break;
case WIND_GET:
wm_get(WM_HANDLE, WM_WFIELD, &WM_OX);
break;
case WIND_SET:
wm_set(WM_HANDLE, WM_WFIELD, &WM_IX);
break;
case WIND_FIND:
ret = wm_find(WM_MX, WM_MY);
break;
case WIND_UPDATE:
wm_update(WM_BEGUP);
break;
case WIND_CALC:
wm_calc(WM_WCTYPE, WM_WCKIND, WM_WCIX, WM_WCIY,
WM_WCIW, WM_WCIH, &WM_WCOX, &WM_WCOY,
&WM_WCOW, &WM_WCOH);
break;
case WIND_NEW:
wm_new();
break;
/* Resource Manager */
case RSRC_LOAD:
ret = rs_load(pglobal, RS_PFNAME);
break;
case RSRC_FREE:
ret = rs_free(pglobal);
break;
case RSRC_GADDR:
ret = rs_gaddr(pglobal, RS_TYPE, RS_INDEX, &ad_rso);
break;
case RSRC_SADDR:
ret = rs_saddr(pglobal, RS_TYPE, RS_INDEX, RS_INADDR);
break;
case RSRC_OBFIX:
rs_obfix(RS_TREE, RS_OBJ);
break;
/* Shell Manager */
case SHEL_READ:
sh_read((BYTE*)SH_PCMD, (BYTE*)SH_PTAIL);
break;
case SHEL_WRITE:
ret = sh_write(SH_DOEX, SH_ISGR, SH_ISCR, (const BYTE*)SH_PCMD, (const BYTE*)SH_PTAIL);
break;
case SHEL_GET:
sh_get((void*)SH_PBUFFER, SH_LEN);
break;
case SHEL_PUT:
sh_put((const void *)SH_PDATA, SH_LEN);
break;
case SHEL_FIND:
ret = sh_find((BYTE*)SH_PATH);
break;
case SHEL_ENVRN:
sh_envrn((BYTE**)SH_PATH, (const BYTE*)SH_SRCH);
break;
#if CONF_WITH_PCGEM
case SHEL_RDEF:
sh_rdef((BYTE*)SH_LPCMD, (BYTE*)SH_LPDIR);
break;
case SHEL_WDEF:
sh_wdef((const BYTE*)SH_LPCMD, (const BYTE*)SH_LPDIR);
break;
#endif
default:
unsupported = TRUE;
break;
}
if (unsupported) {
kprintf("Bad AES function %d\n", opcode);
if (opcode != 0) /* Ignore the 0 since some PRGs are this call */
fm_show(ALNOFUNC, &opcode, 1);
ret = -1;
}
return(ret);
}