void saradc_enable(void)
{
int i;
enable_bandgap();
set_clock_src(0); //0-xtal, 1-clk81
//set adc clock as 1.28Mhz @sys=27MHz
set_clock_divider(20);
enable_clock();
enable_adc();
set_sample_mode(DIFF_MODE);
set_tempsen(0);
disable_fifo_irq();
disable_continuous_sample();
disable_chan0_delta();
disable_chan1_delta();
set_input_delay(10, INPUT_DELAY_TB_1US);
set_sample_delay(10, SAMPLE_DELAY_TB_1US);
set_block_delay(10, BLOCK_DELAY_TB_1US);
// channels sampling mode setting
for(i=0; i<AML_ADC_SARADC_CHAN_NUM; i++) {
set_sample_sw(i, IDLE_SW);
set_sample_mux(i, g_chan_mux[i]);
}
// idle mode setting
set_idle_sw(IDLE_SW);
set_idle_mux(g_chan_mux[AML_ADC_CHAN_0]);
// detect mode setting
set_detect_sw(DETECT_SW);
set_detect_mux(g_chan_mux[AML_ADC_CHAN_0]);
disable_detect_sw();
disable_detect_pullup();
set_detect_irq_pol(0);
disable_detect_irq();
set_cal_voltage(7);
enable_sample_engine();
#if AML_ADC_SAMPLE_DEBUG
printf("ADCREG reg0 =%x\n", get_reg(PP_SAR_ADC_REG0));
printf("ADCREG ch list =%x\n",get_reg(PP_SAR_ADC_CHAN_LIST));
printf("ADCREG avg =%x\n", get_reg(PP_SAR_ADC_AVG_CNTL));
printf("ADCREG reg3 =%x\n", get_reg(PP_SAR_ADC_REG3));
printf("ADCREG ch72 sw =%x\n",get_reg(PP_SAR_ADC_AUX_SW));
printf("ADCREG ch10 sw =%x\n",get_reg(PP_SAR_ADC_CHAN_10_SW));
printf("ADCREG detect&idle=%x\n",get_reg(PP_SAR_ADC_DETECT_IDLE_SW));
#endif //AML_ADC_SAMPLE_DEBUG
select_temp();
enable_temp();
enable_temp__();
udelay(1000);
}
static void saradc_init(void)
{
int i;
enable_bandgap();
//low speed, set to clk81 without division
set_clock_src(1); //0-xtal, 1-clk81
set_clock_divider(0);
enable_clock();
enable_adc();
set_sample_mode(DIFF_MODE);
set_tempsen(0);
disable_fifo_irq();
disable_continuous_sample();
disable_chan0_delta();
disable_chan1_delta();
set_input_delay(10, INPUT_DELAY_TB_1US);
set_sample_delay(10, SAMPLE_DELAY_TB_1US);
set_block_delay(10, BLOCK_DELAY_TB_1US);
aml_set_reg32_bits(P_AO_SAR_ADC_DELAY, 3, 27, 2);
// channels sampling mode setting
for(i=0; i<AML_ADC_SARADC_CHAN_NUM; i++) {
set_sample_sw(i, IDLE_SW);
set_sample_mux(i, g_chan_mux[i]);
}
// idle mode setting
set_idle_sw(IDLE_SW);
set_idle_mux(g_chan_mux[AML_ADC_CHAN_0]);
// detect mode setting
set_detect_sw(DETECT_SW);
set_detect_mux(g_chan_mux[AML_ADC_CHAN_0]);
disable_detect_sw();
disable_detect_pullup();
set_detect_irq_pol(0);
disable_detect_irq();
set_cal_voltage(7);
set_sc_phase();
enable_sample_engine();
udelay(1000);
while (get_fifo_cnt()) {
i = get_fifo_sample() & 0x3ff;
}
}
static int s3c_pp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
s3c_pp_instance_context_t *current_instance;
s3c_pp_params_t *parg;
unsigned int temp = 0;
mutex_lock(h_mutex);
current_instance = (s3c_pp_instance_context_t *) file->private_data;
parg = (s3c_pp_params_t *) arg;
switch ( cmd )
{
case S3C_PP_SET_PARAMS:
{
s3c_pp_out_path_t temp_out_path;
unsigned int temp_src_width, temp_src_height, temp_dst_width, temp_dst_height;
s3c_color_space_t temp_src_color_space, temp_dst_color_space;
get_user(temp_out_path, &parg->out_path);
if ( (-1 != s3c_pp_instance_info.fifo_mode_instance_no )
|| ((s3c_pp_instance_info.dma_mode_instance_count) && (FIFO_FREERUN == temp_out_path)) )
{
printk ( KERN_ERR "\n%s: S3C_PP_SET_PARAMS can't be executed.\n", __FUNCTION__ );
mutex_unlock(h_mutex);
return -EINVAL;
}
get_user(temp_src_width, &parg->src_width);
get_user(temp_src_height, &parg->src_height);
get_user(temp_dst_width, &parg->dst_width);
get_user(temp_dst_height, &parg->dst_height);
// S3C6410 support that the source image is up to 4096 x 4096
// and the destination image is up to 2048 x 2048.
if ( (temp_src_width > 4096) || (temp_src_height > 4096)
|| (temp_dst_width > 2048) || (temp_dst_height > 2048) )
{
printk(KERN_ERR "\n%s: Size is too big to be supported.\n", __FUNCTION__);
mutex_unlock(h_mutex);
return -EINVAL;
}
get_user(temp_src_color_space, &parg->src_color_space);
get_user(temp_dst_color_space, &parg->dst_color_space);
if ( ( (temp_src_color_space == YC420) && (temp_src_width % 8) )
|| ( (temp_src_color_space == RGB16) && (temp_src_width % 2) )
|| ( (temp_out_path == DMA_ONESHOT) && ( ((temp_dst_color_space == YC420) && (temp_dst_width % 8))
|| ((temp_dst_color_space == RGB16) && (temp_dst_width % 2)))) )
{
printk(KERN_ERR "\n%s: YUV420 image width must be a multiple of 8.\n", __FUNCTION__);
printk(KERN_ERR "%s: RGB16 must be a multiple of 2.\n", __FUNCTION__);
mutex_unlock(h_mutex);
return -EINVAL;
}
get_user(current_instance->src_full_width, &parg->src_full_width);
get_user(current_instance->src_full_height, &parg->src_full_height);
get_user(current_instance->src_start_x, &parg->src_start_x);
get_user(current_instance->src_start_y, &parg->src_start_y);
current_instance->src_width = temp_src_width;
current_instance->src_height = temp_src_height;
current_instance->src_color_space = temp_src_color_space;
get_user(current_instance->dst_full_width, &parg->dst_full_width);
get_user(current_instance->dst_full_height, &parg->dst_full_height);
get_user(current_instance->dst_start_x, &parg->dst_start_x);
get_user(current_instance->dst_start_y, &parg->dst_start_y);
current_instance->dst_width = temp_dst_width;
current_instance->dst_height = temp_dst_height;
current_instance->dst_color_space = temp_dst_color_space;
current_instance->out_path = temp_out_path;
if ( DMA_ONESHOT == current_instance->out_path )
{
s3c_pp_instance_info.instance_state[current_instance->instance_no] = PP_INSTANCE_INUSE_DMA_ONESHOT;
s3c_pp_instance_info.dma_mode_instance_count++;
}
else
{
get_user(current_instance->scan_mode, &parg->scan_mode);
current_instance->dst_color_space = RGB30;
s3c_pp_instance_info.instance_state[current_instance->instance_no] = PP_INSTANCE_INUSE_FIFO_FREERUN;
s3c_pp_instance_info.fifo_mode_instance_no = current_instance->instance_no;
s3c_pp_instance_info.wincon0_value_before_fifo_mode = __raw_readl ( S3C_WINCON0 );
//.[ REDUCE_VCLK_SYOP_TIME
if ( current_instance->src_height > current_instance->dst_height )
{
int i;
for ( i=2; (current_instance->src_height >= (i * current_instance->dst_height)) && (i<8); i++ )
{
}
current_instance->src_full_width *= i;
current_instance->src_full_height /= i;
current_instance->src_height /= i;
}
//.] REDUCE_VCLK_SYOP_TIME
}
current_instance->value_changed |= PP_VALUE_CHANGED_PARAMS;
}
break;
case S3C_PP_START:
dprintk ( "%s: S3C_PP_START last_instance=%d, curr_instance=%d\n", __FUNCTION__,
s3c_pp_instance_info.last_running_instance_no, current_instance->instance_no );
if ( PP_INSTANCE_READY == s3c_pp_instance_info.instance_state[current_instance->instance_no] )
{
printk ( KERN_ERR "%s: S3C_PP_START must be executed after running S3C_PP_SET_PARAMS.\n", __FUNCTION__ );
mutex_unlock(h_mutex);
return -EINVAL;
}
if ( current_instance->instance_no != s3c_pp_instance_info.last_running_instance_no )
{
__raw_writel(0x0<<31, s3c_pp_base + S3C_VPP_POSTENVID);
temp = S3C_MODE2_ADDR_CHANGE_DISABLE | S3C_MODE2_CHANGE_AT_FRAME_END | S3C_MODE2_SOFTWARE_TRIGGER;
__raw_writel(temp, s3c_pp_base + S3C_VPP_MODE_2);
set_clock_src(HCLK);
// setting the src/dst color space
set_data_format(current_instance);
// setting the src/dst size
set_scaler(current_instance);
// setting the src/dst buffer address
set_src_addr(current_instance);
set_dest_addr(current_instance);
current_instance->value_changed = PP_VALUE_CHANGED_NONE;
s3c_pp_instance_info.last_running_instance_no = current_instance->instance_no;
s3c_pp_instance_info.running_instance_no = current_instance->instance_no;
if ( PP_INSTANCE_INUSE_DMA_ONESHOT == s3c_pp_instance_info.instance_state[current_instance->instance_no] )
{ // DMA OneShot Mode
dprintk ( "%s: DMA_ONESHOT mode\n", __FUNCTION__ );
post_int_enable(1);
pp_dma_mode_set_and_start();
if ( !(file->f_flags & O_NONBLOCK) )
{
if (interruptible_sleep_on_timeout(&waitq, 500) == 0)
{
printk(KERN_ERR "\n%s: Waiting for interrupt is timeout\n", __FUNCTION__);
}
}
}
else
{ // FIFO freerun Mode
dprintk ( "%s: FIFO_freerun mode\n", __FUNCTION__ );
s3c_pp_instance_info.fifo_mode_instance_no = current_instance->instance_no;
post_int_enable(1);
pp_fifo_mode_set_and_start(current_instance);
}
}
else
{
if ( current_instance->value_changed != PP_VALUE_CHANGED_NONE )
{
__raw_writel(0x0<<31, s3c_pp_base + S3C_VPP_POSTENVID);
if ( current_instance->value_changed & PP_VALUE_CHANGED_PARAMS )
{
set_data_format(current_instance);
set_scaler(current_instance);
}
if ( current_instance->value_changed & PP_VALUE_CHANGED_SRC_BUF_ADDR_PHY )
{
set_src_addr(current_instance);
}
if ( current_instance->value_changed & PP_VALUE_CHANGED_DST_BUF_ADDR_PHY )
{
set_dest_addr(current_instance);
}
current_instance->value_changed = PP_VALUE_CHANGED_NONE;
}
s3c_pp_instance_info.running_instance_no = current_instance->instance_no;
post_int_enable(1);
start_processing();
if ( !(file->f_flags & O_NONBLOCK) )
{
if (interruptible_sleep_on_timeout(&waitq, 500) == 0)
{
printk(KERN_ERR "\n%s: Waiting for interrupt is timeout\n", __FUNCTION__);
}
}
}
break;
case S3C_PP_GET_SRC_BUF_SIZE:
if ( PP_INSTANCE_READY == s3c_pp_instance_info.instance_state[current_instance->instance_no] )
{
dprintk ( "%s: S3C_PP_GET_SRC_BUF_SIZE must be executed after running S3C_PP_SET_PARAMS.\n", __FUNCTION__ );
mutex_unlock(h_mutex);
return -EINVAL;
}
temp = cal_data_size ( current_instance->src_color_space, current_instance->src_full_width, current_instance->src_full_height );
mutex_unlock(h_mutex);
return temp;
case S3C_PP_SET_SRC_BUF_ADDR_PHY:
get_user(current_instance->src_buf_addr_phy, &parg->src_buf_addr_phy);
current_instance->value_changed |= PP_VALUE_CHANGED_SRC_BUF_ADDR_PHY;
break;
case S3C_PP_SET_SRC_BUF_NEXT_ADDR_PHY:
if ( current_instance->instance_no != s3c_pp_instance_info.fifo_mode_instance_no )
{ // if FIFO Mode is not Active
dprintk (KERN_DEBUG "%s: S3C_PP_SET_SRC_BUF_NEXT_ADDR_PHY can't be executed.\n", __FUNCTION__ );
mutex_unlock(h_mutex);
return -EINVAL;
}
get_user(current_instance->src_next_buf_addr_phy, &parg->src_next_buf_addr_phy);
temp = __raw_readl(s3c_pp_base + S3C_VPP_MODE_2);
temp |= (0x1<<4);
__raw_writel(temp, s3c_pp_base + S3C_VPP_MODE_2);
set_src_next_buf_addr(current_instance);
temp = __raw_readl(s3c_pp_base + S3C_VPP_MODE_2);
temp &= ~(0x1<<4);
__raw_writel(temp, s3c_pp_base + S3C_VPP_MODE_2);
break;
case S3C_PP_GET_DST_BUF_SIZE:
if ( PP_INSTANCE_READY == s3c_pp_instance_info.instance_state[current_instance->instance_no] )
{
dprintk ( "%s: S3C_PP_GET_DST_BUF_SIZE must be executed after running S3C_PP_SET_PARAMS.\n", __FUNCTION__ );
mutex_unlock(h_mutex);
return -EINVAL;
}
temp = cal_data_size ( current_instance->dst_color_space, current_instance->dst_full_width, current_instance->dst_full_height );
mutex_unlock(h_mutex);
return temp;
case S3C_PP_SET_DST_BUF_ADDR_PHY:
get_user(current_instance->dst_buf_addr_phy, &parg->dst_buf_addr_phy);
current_instance->value_changed |= PP_VALUE_CHANGED_DST_BUF_ADDR_PHY;
break;
case S3C_PP_ALLOC_KMEM:
{
s3c_pp_mem_alloc_t param;
if (copy_from_user(¶m, (s3c_pp_mem_alloc_t *)arg, sizeof(s3c_pp_mem_alloc_t)))
{
mutex_unlock(h_mutex);
return -EFAULT;
}
flag = ALLOC_KMEM;
param.vir_addr = do_mmap(file, 0, param.size, PROT_READ|PROT_WRITE, MAP_SHARED, 0);
dprintk (KERN_DEBUG "param.vir_addr = %08x\n", param.vir_addr);
flag = 0;
if(param.vir_addr == -EINVAL) {
printk(KERN_ERR "%s: PP_MEM_ALLOC FAILED\n", __FUNCTION__);
mutex_unlock(h_mutex);
return -EFAULT;
}
param.phy_addr = physical_address;
dprintk (KERN_DEBUG "KERNEL MALLOC : param.phy_addr = 0x%X \t size = %d \t param.vir_addr = 0x%X\n", param.phy_addr, param.size, param.vir_addr);
if (copy_to_user((s3c_pp_mem_alloc_t *)arg, ¶m, sizeof(s3c_pp_mem_alloc_t)))
{
mutex_unlock(h_mutex);
return -EFAULT;
}
}
break;
case S3C_PP_FREE_KMEM:
{
s3c_pp_mem_alloc_t param;
struct mm_struct *mm = current->mm;
void *virt_addr;
if ( copy_from_user(¶m, (s3c_pp_mem_alloc_t *)arg, sizeof(s3c_pp_mem_alloc_t)) )
{
mutex_unlock(h_mutex);
return -EFAULT;
}
dprintk (KERN_DEBUG "KERNEL FREE : param.phy_addr = 0x%X \t size = %d \t param.vir_addr = 0x%X\n", param.phy_addr, param.size, param.vir_addr);
if ( do_munmap(mm, param.vir_addr, param.size ) < 0 )
{
dprintk("do_munmap() failed !!\n");
mutex_unlock(h_mutex);
return -EINVAL;
}
virt_addr = phys_to_virt(param.phy_addr);
dprintk ( "KERNEL : virt_addr = 0x%X\n", (unsigned int) virt_addr );
kfree(virt_addr);
param.size = 0;
dprintk(KERN_DEBUG "do_munmap() succeed !!\n");
}
break;
case S3C_PP_GET_RESERVED_MEM_SIZE:
mutex_unlock(h_mutex);
return PP_RESERVED_MEM_SIZE;
case S3C_PP_GET_RESERVED_MEM_ADDR_PHY:
mutex_unlock(h_mutex);
return PP_RESERVED_MEM_ADDR_PHY;
default:
mutex_unlock(h_mutex);
return -EINVAL;
}
mutex_unlock(h_mutex);
return 0;
}