void
main (void)
{
memset (hash1, 0, SMINI_HASH_SIZE); // zero fpga bitstream hash. This forces reload
init_smini ();
set_led_0 (0);
set_led_1 (0);
EA = 0; // disable all interrupts
patch_usb_descriptors();
setup_autovectors ();
usb_install_handlers ();
//hook_timer_tick ((unsigned short) isr_tick);
EIEX4 = 1; // disable INT4 FIXME
EA = 1; // global interrupt enable
fx2_renumerate (); // simulates disconnect / reconnect
main_loop ();
}
void enable_xfers(int enable) {
if(enable) {
IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFCLKOE | bmIFSLAVE;
} else {
IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFSLAVE;
}
set_led_0(enable);
}
void
main (void)
{
#if 0
g_rx_enable = 0; // FIXME (work around initialization bug)
g_tx_enable = 0;
g_rx_overrun = 0;
g_tx_underrun = 0;
#endif
PORTECFG = 0x00;
OEE = 0x0f;
IOE = 0x0c;
memset (hash1, 0, USRP_HASH_SIZE); // zero fpga bitstream hash. This forces reload
patch_usb_descriptors();
init_usrp ();
init_gpif ();
// if (UC_START_WITH_GSTATE_OUTPUT_ENABLED)
// IFCONFIG |= bmGSTATE; // no conflict, start with it on
set_led_0 (0);
set_led_1 (0);
EA = 0; // disable all interrupts
setup_autovectors ();
usb_install_handlers ();
hook_timer_tick ((unsigned short) isr_tick);
EIEX4 = 1; // disable INT4 FIXME
EA = 1; // global interrupt enable
IOE = 0x04;
fx2_renumerate (); // simulates disconnect / reconnect
IOE = 0x08;
main_loop ();
}
/*
* Handle our "Vendor Extension" commands on endpoint 0.
* If we handle this one, return non-zero.
*/
unsigned char
app_vendor_cmd (void)
{
OEE = 0x0f;
IOE = 0x04; IOE = 0x01; // pulse two I/O pins
if (bRequestType == VRT_VENDOR_IN){
/////////////////////////////////
// handle the IN requests
/////////////////////////////////
switch (bRequest){
case VRQ_GET_STATUS:
switch (wIndexL){
case GS_TX_UNDERRUN:
EP0BUF[0] = g_tx_underrun;
g_tx_underrun = 0;
EP0BCH = 0;
EP0BCL = 1;
break;
case GS_RX_OVERRUN:
EP0BUF[0] = g_rx_overrun;
g_rx_overrun = 0;
EP0BCH = 0;
EP0BCL = 1;
break;
default:
return 0;
}
break;
case VRQ_I2C_READ:
if (!i2c_read (wValueL, EP0BUF, wLengthL))
return 0;
EP0BCH = 0;
EP0BCL = wLengthL;
break;
case VRQ_SPI_READ:
if (!spi_read (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, wLengthL))
return 0;
EP0BCH = 0;
EP0BCL = wLengthL;
break;
case VRQ_JTAG_RW:
*EP0BUF = fpga_rxtx(wValueL);
EP0BCH = 0;
EP0BCL = 1;
break;
default:
return 0;
}
}
else if (bRequestType == VRT_VENDOR_OUT){
/////////////////////////////////
// handle the OUT requests
/////////////////////////////////
switch (bRequest){
case VRQ_SET_LED:
switch (wIndexL){
case 0:
set_led_0 (wValueL);
break;
case 1:
set_led_1 (wValueL);
break;
default:
return 0;
}
break;
case VRQ_FPGA_LOAD:
switch (wIndexL){ // sub-command
case FL_BEGIN:
return fpga_load_begin ();
case FL_XFER:
get_ep0_data ();
return fpga_load_xfer (EP0BUF, EP0BCL);
case FL_END:
return fpga_load_end ();
case FL_END_SHUTDOWN:
return fpga_load_end_shutdown ();
case FL_TX:
get_ep0_data ();
return fpga_tx (EP0BUF);
case FL_INIT:
initialize_jtag();
return 1;
default:
return 0;
}
break;
case VRQ_FPGA_SET_RESET:
fpga_set_reset (wValueL);
break;
case VRQ_FPGA_SET_TX_ENABLE:
fpga_set_tx_enable (wValueL);
break;
case VRQ_FPGA_SET_RX_ENABLE:
fpga_set_rx_enable (wValueL);
break;
case VRQ_FPGA_SET_TX_RESET:
fpga_set_tx_reset (wValueL);
break;
case VRQ_FPGA_SET_RX_RESET:
fpga_set_rx_reset (wValueL);
break;
case VRQ_I2C_WRITE:
get_ep0_data ();
if (!i2c_write (wValueL, EP0BUF, EP0BCL))
return 0;
break;
case VRQ_SPI_WRITE:
get_ep0_data ();
if (!spi_write (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, EP0BCL))
return 0;
break;
default:
return 0;
}
}
else
return 0; // invalid bRequestType
return 1;
}
/*
* Handle our "Vendor Extension" commands on endpoint 0.
* If we handle this one, return non-zero.
*/
unsigned char
app_vendor_cmd (void)
{
if (bRequestType == VRT_VENDOR_IN) {
/////////////////////////////////
// handle the IN requests
/////////////////////////////////
switch (bRequest) {
case VRQ_GET_STATUS: //this is no longer done via FX2 -- the FPGA will be queried instead
return 0;
break;
case VRQ_I2C_READ:
if (!i2c_read (wValueL, EP0BUF, wLengthL)) return 0;
EP0BCH = 0;
EP0BCL = wLengthL;
break;
case VRQ_SPI_READ:
return 0;
case VRQ_FW_COMPAT:
EP0BCH = 0;
EP0BCL = 3;
break;
default:
return 0;
}
}
else if (bRequestType == VRT_VENDOR_OUT) {
/////////////////////////////////
// handle the OUT requests
/////////////////////////////////
switch (bRequest) {
case VRQ_SET_LED:
switch (wIndexL) {
case 0:
set_led_0 (wValueL);
break;
case 1:
set_led_1 (wValueL);
break;
default:
return 0;
}
break;
case VRQ_FPGA_LOAD:
switch (wIndexL) { // sub-command
case FL_BEGIN:
return fpga_load_begin ();
case FL_XFER:
get_ep0_data ();
return fpga_load_xfer (EP0BUF, EP0BCL);
case FL_END:
return fpga_load_end ();
default:
return 0;
}
break;
case VRQ_FPGA_SET_RESET:
fpga_reset(wValueL);
break;
case VRQ_I2C_WRITE:
get_ep0_data ();
if (!i2c_write (wValueL, EP0BUF, EP0BCL)) return 0;
//SMINI_LED_REG ^= bmLED1;
break;
case VRQ_RESET_GPIF:
clear_fifo(wValueL);
break;
case VRQ_ENABLE_GPIF:
enable_xfers(wValueL);
break;
case VRQ_CLEAR_FPGA_FIFO:
//clear_fpga_data_fifo();
break;
default:
return 0;
}
}
else
return 0; // invalid bRequestType
return 1;
}