Ejemplo n.º 1
0
// this allows for easier implementation of the NES-EVENT board used for Nintento World Championships
void nes_sxrom_device::update_regs(int reg)
{
	switch (reg)
	{
		case 0:
			switch (m_reg[0] & 0x03)
			{
				case 0: set_nt_mirroring(PPU_MIRROR_LOW); break;
				case 1: set_nt_mirroring(PPU_MIRROR_HIGH); break;
				case 2: set_nt_mirroring(PPU_MIRROR_VERT); break;
				case 3: set_nt_mirroring(PPU_MIRROR_HORZ); break;
			}
			set_chr();
			set_prg();
			break;
		case 1:
			set_chr();
			set_prg();
			break;
		case 2:
			set_chr();
			break;
		case 3:
			set_prg();
			break;
	}
}
Ejemplo n.º 2
0
void nes_g101_device::write_h(offs_t offset, uint8_t data)
{
	LOG_MMC(("g101 write_h, offset: %04x, data: %02x\n", offset, data));

	switch (offset & 0x7000)
	{
		case 0x0000:
			if (m_latch)
			{
				prg8_89(0xfe);
				prg8_cd(data & 0x1f);
			}
			else
			{
				prg8_89(data & 0x1f);
				prg8_cd(0xfe);
			}
			break;
		case 0x1000:
			m_latch = BIT(data, 1);
			if (m_pcb_ctrl_mirror)
				set_nt_mirroring(BIT(data, 0) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
			break;
		case 0x2000:
			prg8_ab(data & 0x1f);
			break;
		case 0x3000:
			chr1_x(offset & 0x07, data & 0x7f, CHRROM);
			break;
	}
}
Ejemplo n.º 3
0
void nes_ntdec_fh_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg32((m_prg_chunks - 1) >> 1);
	chr8(0, m_chr_source);
	set_nt_mirroring(PPU_MIRROR_VERT);
}
Ejemplo n.º 4
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void nes_waixing_wxzs2_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg32(0);
	chr8(0, m_chr_source);
	set_nt_mirroring(PPU_MIRROR_VERT);
}
Ejemplo n.º 5
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void nes_axrom_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg32(0);
	chr8(0, m_chr_source);

	set_nt_mirroring(PPU_MIRROR_LOW);
}
Ejemplo n.º 6
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void nes_action53_device::update_mirr()
{
	switch (m_reg[2] & 0x03)
	{
		case 0:
			set_nt_mirroring(PPU_MIRROR_LOW);
			break;
		case 1:
			set_nt_mirroring(PPU_MIRROR_HIGH);
			break;
		case 2:
			set_nt_mirroring(PPU_MIRROR_VERT);
			break;
		case 3:
			set_nt_mirroring(PPU_MIRROR_HORZ);
			break;
	}
}
Ejemplo n.º 7
0
void nes_sunsoft_2_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg16_89ab(0);
	prg16_cdef(m_prg_chunks - 1);
	chr8(0, m_chr_source);
	if (m_pcb_ctrl_mirror)
		set_nt_mirroring(PPU_MIRROR_LOW);
}
Ejemplo n.º 8
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void nes_oekakids_device::pcb_reset()
{
	prg32(0);
	chr4_0(0, CHRRAM);
	chr4_4(3, CHRRAM);
	set_nt_mirroring(PPU_MIRROR_LOW);
	m_latch = 0;
	m_reg = 0;
}
Ejemplo n.º 9
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void nes_sachen_8259d_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg32(0);
	chr8(m_vrom_chunks - 1, CHRROM);
	set_nt_mirroring(PPU_MIRROR_VERT);

	m_latch = 0;
	memset(m_reg, 0, sizeof(m_reg));
}
Ejemplo n.º 10
0
Archivo: ave.cpp Proyecto: Enverex/mame
void nes_maxi15_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg32(0);
	chr8(0, m_chr_source);
	set_nt_mirroring(PPU_MIRROR_VERT);

	m_reg = 0;
	m_bank = 0;
}
Ejemplo n.º 11
0
void nes_daou306_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg16_89ab(m_prg_chunks - 2);
	prg16_cdef(m_prg_chunks - 1);
	chr8(0, m_chr_source);
	set_nt_mirroring(PPU_MIRROR_LOW);

	memset(m_reg, 0, sizeof(m_reg));
}
Ejemplo n.º 12
0
/* MIRROR_LOW and MIRROR_HIGH are swapped! */
void nes_waixing_a_device::set_mirror(UINT8 nt)
{
	switch (nt)
	{
		case 0:
		case 1:
			set_nt_mirroring(nt ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
			break;
		case 2:
			set_nt_mirroring(PPU_MIRROR_LOW);
			break;
		case 3:
			set_nt_mirroring(PPU_MIRROR_HIGH);
			break;
		default:
			LOG_MMC(("Mapper set NT to invalid value %02x", nt));
			break;
	}
}
Ejemplo n.º 13
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void nes_holydivr_device::write_h(offs_t offset, uint8_t data)
{
	LOG_MMC(("holy diver write_h, offset: %04x, data: %02x\n", offset, data));

	// this pcb is subject to bus conflict
	data = account_bus_conflict(offset, data);

	set_nt_mirroring(BIT(data, 3) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
	chr8(data >> 4, CHRROM);
	prg16_89ab(data);
}
Ejemplo n.º 14
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void nes_namcot340_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg16_89ab(0);
	prg16_cdef(m_prg_chunks - 1);
	chr8(0, m_chr_source);
	set_nt_mirroring(PPU_MIRROR_VERT);

	m_irq_enable = 0;
	m_irq_count = 0;
}
Ejemplo n.º 15
0
void nes_ggenie_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
	prg32(0);
	chr8(0, m_chr_source);

	set_nt_mirroring(PPU_MIRROR_LOW);
	m_gg_bypass = 0;

	if (m_ggslot->m_cart)
		m_ggslot->m_cart->pcb_reset();
}
Ejemplo n.º 16
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void nes_tam_s1_device::write_h(offs_t offset, uint8_t data)
{
	LOG_MMC(("tam s1 write_h, offset: %04x, data: %02x\n", offset, data));

	if (offset < 0x4000)
	{
		// this pcb is subject to bus conflict
		data = account_bus_conflict(offset, data);

		set_nt_mirroring(BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ);
		prg16_cdef(data);
	}
}
Ejemplo n.º 17
0
static void nes_vh_reset( running_machine &machine )
{
	nes_state *state = machine.driver_data<nes_state>();
	ppu2c0x_set_vidaccess_callback(machine.device("ppu"), nes_ppu_vidaccess);

	if (state->m_four_screen_vram)
		set_nt_mirroring(machine, PPU_MIRROR_4SCREEN);
	else
	{
		switch (state->m_hard_mirroring)
		{
			case PPU_MIRROR_HORZ:
			case PPU_MIRROR_VERT:
			case PPU_MIRROR_HIGH:
			case PPU_MIRROR_LOW:
				set_nt_mirroring(machine, state->m_hard_mirroring);
				break;
			default:
				set_nt_mirroring(machine, PPU_MIRROR_NONE);
				break;
		}
	}
}
Ejemplo n.º 18
0
void nes_sorom_device::pcb_reset()
{
	m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;

	m_latch = 0;
	m_count = 0;
	m_reg[0] = 0x0f;
	m_reg[1] = m_reg[2] = m_reg[3] = 0;
	m_reg_write_enable = 1;

	set_nt_mirroring(PPU_MIRROR_HORZ);
	set_chr();
	set_prg();
}
Ejemplo n.º 19
0
void nes_h3001_device::write_h(offs_t offset, uint8_t data)
{
	LOG_MMC(("h3001 write_h, offset %04x, data: %02x\n", offset, data));

	switch (offset & 0x7fff)
	{
		case 0x0000:
			prg8_89(data);
			break;

		case 0x1001:
			set_nt_mirroring(BIT(data, 7) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
			break;

		case 0x1003:
			m_irq_enable = data & 0x80;
			set_irq_line(CLEAR_LINE);
			break;

		case 0x1004:
			m_irq_count = m_irq_count_latch;
			set_irq_line(CLEAR_LINE);
			break;

		case 0x1005:
			m_irq_count_latch = (m_irq_count_latch & 0x00ff) | (data << 8);
			break;

		case 0x1006:
			m_irq_count_latch = (m_irq_count_latch & 0xff00) | data;
			break;

		case 0x2000:
			prg8_ab(data);
			break;

		case 0x3000: case 0x3001: case 0x3002: case 0x3003:
		case 0x3004: case 0x3005: case 0x3006: case 0x3007:
			chr1_x(offset & 0x07, data, CHRROM);
			break;

		case 0x4000:
			prg8_cd(data);
			break;

		default:
			break;
	}
}
Ejemplo n.º 20
0
void nes_event_device::pcb_reset()
{
	m_latch = 0;
	m_count = 0;
	m_reg[0] = 0x0f;
	m_reg[1] = m_reg[2] = m_reg[3] = 0;
	m_reg_write_enable = 1;
	m_nwc_init = 2;

	set_nt_mirroring(PPU_MIRROR_HORZ);
	chr8(0, CHRRAM);
	prg32(0);
	m_timer_count = 0;
	m_timer_enabled = 0;
	m_timer_on = 0;
}
Ejemplo n.º 21
0
void nes_disksys_device::pcb_reset()
{
	// read accesses in 0x6000-0xffff are always handled by
	// cutom code below, so no need to setup the prg...
	chr8(0, CHRRAM);
	set_nt_mirroring(PPU_MIRROR_VERT);

	m_fds_motor_on = 0;
	m_fds_door_closed = 0;
	m_fds_current_side = 1;
	m_fds_head_position = 0;
	m_fds_status0 = 0;
	m_read_mode = 0;
	m_drive_ready = 0;
	m_irq_count = 0;
	m_irq_count_latch = 0;
	m_irq_enable = 0;
	m_irq_transfer = 0;

	m_fds_count = 0;
	m_fds_last_side = 0;
}