static int f3s_devices_init(void) { uint32_t reg; /* CS0: Nor Flash */ imx35_setup_weimcs(0, 0x0000cf03, 0x10000d03, 0x00720900); reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_RCSR); /* some fuses provide us vital information about connected hardware */ if (reg & 0x20000000) nand_info.width = 2; /* 16 bit */ else nand_info.width = 1; /* 8 bit */ /* * This platform supports NOR and NAND */ imx35_add_nand(&nand_info); add_cfi_flash_device(DEVICE_ID_DYNAMIC, MX35_CS0_BASE_ADDR, 64 * 1024 * 1024, 0); switch ((reg >> 25) & 0x3) { case 0x01: /* NAND is the source */ devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); devfs_add_partition("nand0", 0x40000, 0x80000, DEVFS_PARTITION_FIXED, "env_raw"); dev_add_bb_dev("env_raw", "env0"); break; case 0x00: /* NOR is the source */ devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); devfs_add_partition("nor0", 0x40000, 0x80000, DEVFS_PARTITION_FIXED, "env0"); protect_file("/dev/env0", 1); break; } set_silicon_rev(imx_silicon_revision()); i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); imx35_add_i2c0(NULL); imx35_add_fec(&fec_info); add_generic_device("smc911x", DEVICE_ID_DYNAMIC, NULL, MX35_CS5_BASE_ADDR, MX35_CS5_SIZE, IORESOURCE_MEM, NULL); imx35_add_mmc0(NULL); imx35_add_fb(&ipu_fb_data); armlinux_set_bootparams((void *)0x80000100); armlinux_set_architecture(MACH_TYPE_MX35_3DS); return 0; }
static int loco_devices_init(void) { imx53_iim_register_fec_ethaddr(); loco_fec_reset(); imx53_add_fec(&fec_info); imx53_add_mmc0(&loco_sd1_data); imx53_add_mmc2(&loco_sd3_data); i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); imx53_add_i2c0(NULL); if (IS_ENABLED(CONFIG_USB_EHCI)) loco_ehci_init(); set_silicon_rev(imx_silicon_revision()); armlinux_set_bootparams((void *)0x70000100); armlinux_set_architecture(MACH_TYPE_MX53_LOCO); imx53_bbu_internal_mmc_register_handler("mmc", "/dev/disk0", BBU_HANDLER_FLAG_DEFAULT, dcd_entry, sizeof(dcd_entry), 0); return 0; }
static int loco_late_init(void) { struct mc13xxx *mc34708; int rev; if (!of_machine_is_compatible("fsl,imx53-qsb") && !of_machine_is_compatible("fsl,imx53-qsrb")) return 0; mc34708 = mc13xxx_get(); if (mc34708) { unsigned int val; int ret; /* get the board revision from fuse */ rev = readl(MX53_IIM_BASE_ADDR + 0x878); set_board_rev(rev); printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' ); barebox_set_hostname("loco-r"); armlinux_set_revision(loco_system_rev); /* Set VDDGP to 1.25V for 1GHz on SW1 */ mc13xxx_reg_read(mc34708, MC13892_REG_SW_0, &val); val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; ret = mc13xxx_reg_write(mc34708, MC13892_REG_SW_0, val); if (ret) { printf("Writing to REG_SW_0 failed: %d\n", ret); return ret; } /* Set VCC as 1.30V on SW2 */ mc13xxx_reg_read(mc34708, MC13892_REG_SW_1, &val); val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; ret = mc13xxx_reg_write(mc34708, MC13892_REG_SW_1, val); if (ret) { printf("Writing to REG_SW_1 failed: %d\n", ret); return ret; } /* Set global reset timer to 4s */ mc13xxx_reg_read(mc34708, MC13892_REG_POWER_CTL2, &val); val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; ret = mc13xxx_reg_write(mc34708, MC13892_REG_POWER_CTL2, val); if (ret) { printf("Writing to REG_POWER_CTL2 failed: %d\n", ret); return ret; } /* Set VUSBSEL and VUSBEN for USB PHY supply*/ mc13xxx_reg_read(mc34708, MC13892_REG_MODE_0, &val); val |= (VUSBSEL_MC34708 | VUSBEN_MC34708); ret = mc13xxx_reg_write(mc34708, MC13892_REG_MODE_0, val); if (ret) { printf("Writing to REG_MODE_0 failed: %d\n", ret); return ret; } /* Set SWBST to 5V in auto mode */ val = SWBST_AUTO; ret = mc13xxx_reg_write(mc34708, SWBST_CTRL, val); if (ret) { printf("Writing to SWBST_CTRL failed: %d\n", ret); return ret; } } else { /* so we have a DA9053 based board */ printf("MCIMX53-START board 1.0\n"); barebox_set_hostname("loco"); armlinux_set_revision(loco_system_rev); } /* USB PWR enable */ gpio_direction_output(MX53_LOCO_USB_PWREN, 0); gpio_set_value(MX53_LOCO_USB_PWREN, 1); loco_fec_reset(); set_silicon_rev(imx_silicon_revision()); armlinux_set_architecture(MACH_TYPE_MX53_LOCO); imx53_bbu_internal_mmc_register_handler("mmc", "/dev/mmc0", BBU_HANDLER_FLAG_DEFAULT); return 0; }