static void NROM128Reset(CartInfo *info)
{
setprg16(0x8000,0);
setprg16(0xC000,0);
setchr8(0);
SetReadHandler(0x8000,0xFFFF,CartBR);
}
static void Sync(void) {
setprg16(0x8000, preg);
setprg16(0xC000, ~0);
setchr8(0);
if (mirr)
setmirror(mirr);
}
static void BandaiSync(void)
{
if(is153)
{
int base=(reg[0]&1)<<4;
if(!UNIFchrrama) // SD Gundam Gaiden - Knight Gundam Monogatari 2 - Hikari no Kishi (J) uses WRAM but have CHRROM too
{
int i;
for(i=0; i<8; i++) setchr1(i<<10,reg[i]);
}
else
setchr8(0);
setprg16(0x8000,(reg[8]&0x0F)|base);
setprg16(0xC000,0x0F|base);
}
else
{
int i;
for(i=0; i<8; i++) setchr1(i<<10,reg[i]);
setprg16(0x8000,reg[8]);
setprg16(0xC000,~0);
}
switch(reg[9]&3)
{
case 0: setmirror(MI_V); break;
case 1: setmirror(MI_H); break;
case 2: setmirror(MI_0); break;
case 3: setmirror(MI_1); break;
}
}
static void BMCF15PW(uint32 A, uint8 V) {
uint32 bank = EXPREGS[0] & 0xF;
uint32 mode = (EXPREGS[0] & 8) >> 3;
uint32 mask = ~(mode);
setprg16(0x8000, (bank & mask));
setprg16(0xC000, (bank & mask) | mode);
}
static void UNLYOKOSync(void)
{
setmirror((mode & 1)^1);
setchr2(0x0000,reg[3]);
setchr2(0x0800,reg[4]);
setchr2(0x1000,reg[5]);
setchr2(0x1800,reg[6]);
if(mode & 0x10)
{
uint32 base = (bank & 8) << 1;
setprg8(0x8000,(reg[0]&0x0f)|base);
setprg8(0xA000,(reg[1]&0x0f)|base);
setprg8(0xC000,(reg[2]&0x0f)|base);
setprg8(0xE000,0x0f|base);
}
else
{
if(mode & 8)
setprg32(0x8000,bank >> 1);
else
{
setprg16(0x8000,bank);
setprg16(0xC000,~0);
}
}
static void tekprom(void)
{
switch(tkcom[0]&3)
{
case 1: // 16 KB
setprg16(0x8000,prgb[0]);
setprg16(0xC000,prgb[2]);
break;
case 2: //2 = 8 KB ??
if(tkcom[0]&0x4)
{
setprg8(0x8000,prgb[0]);
setprg8(0xa000,prgb[1]);
setprg8(0xc000,prgb[2]);
setprg8(0xe000,prgb[3]);
}
else
{
if(tkcom[0]&0x80)
setprg8(0x6000,prgb[3]);
setprg8(0x8000,prgb[0]);
setprg8(0xa000,prgb[1]);
setprg8(0xc000,prgb[2]);
setprg8(0xe000,~0);
}
break;
case 0:
case 3:
setprg8(0x8000,prgb[0]);
setprg8(0xa000,prgb[1]);
setprg8(0xc000,prgb[2]);
setprg8(0xe000,prgb[3]);
break;
}
}
static void MPower(void) {
datareg = 0;
Sync();
setprg16(0x8000, 0);
setprg16(0xC000, ~0);
SetWriteHandler(0x8000, 0xFFFF, MWrite);
SetReadHandler(0x8000, 0xFFFF, CartBR);
}
static void Sync(void) {
if (mode) {
setprg16(0x8000, prg);
setprg16(0xC000, prg);
} else
setprg32(0x8000, prg >> 1);
setchr8(chr);
setmirror(mirr);
}
static void UNLRT01Power(void) {
setprg16(0x8000, 0);
setprg16(0xC000, 0);
setchr2(0x0000,0);
setchr2(0x0800,0);
setchr2(0x1000,0);
setchr2(0x1800,0);
SetReadHandler(0x8000, 0xFFFF, UNLRT01Read);
}
static void Sync(void) {
setprg2r(0x10, 0x0800, 0);
setprg2r(0x10, 0x1000, 1);
setprg2r(0x10, 0x1800, 2);
setprg8r(0x10, 0x6000, 1);
setprg16(0x8000, 0);
setprg16(0xC000, ~0);
setchr8(0);
}
static void CNROMReset(CartInfo *info)
{
latche = 0;
setprg16(0x8000,0);
setprg16(0xC000,1);
setchr8(0);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x8000,0xffff,CNROMWrite);
}
static void Sync(void) {
uint8 prg = (addrlatch & 7);
setchr8(datalatch);
if(addrlatch & 0x80) {
setprg16(0x8000,prg);
setprg16(0xC000,prg);
} else {
setprg32(0x8000,prg >> 1);
}
setmirror(MI_V);
}
static void Sync(void)
{
setmirror(mirr);
setprg8r(0x10,0x6000,0);
setchr8(0);
if(prgmode)
setprg32(0x8000,prg&7);
else {
setprg16(0x8000,prg&0x0f);
setprg16(0xC000,0);
}
}
static void Sync(void) {
setmirror((mode ^ 1) & 1);
setprg8r(0x10, 0x6000, 0);
setchr4(0x0000, lastnt);
setchr4(0x1000, 1);
if (mode & 4)
setprg32(0x8000, prg & 7);
else {
setprg16(0x8000, prg & 0x0f);
setprg16(0xC000, 0);
}
}
static void Sync(void) {
uint32 i;
for (i = 0; i < 8; i++)
setchr1(i << 10, chrlo[i] | (chrhi[i] << 8));
setprg8r(0x10, 0x6000, 0);
setprg16(0x8000, prg);
setprg16(0xC000, ~0);
if (mirrisused)
setmirror(mirr ^ 1);
else
setmirror(MI_0);
}
static void Sync(void)
{
if(latche)
{
if(latche&0x10)
setprg16(0x8000,(latche&7));
else
setprg16(0x8000,(latche&7)|8);
}
else
setprg16(0x8000,7+(ROM_size>>4));
}
static void UNROMSync(void) {
// static uint32 mirror_in_use = 0;
// if (PRGsize[0] <= 128 * 1024) {
// setprg16(0x8000, latche & 0x7);
// if (latche & 8) mirror_in_use = 1;
// if (mirror_in_use)
// setmirror(((latche >> 3) & 1) ^ 1); // Higway Star Hacked mapper, disabled till new mapper defined
// } else
setprg16(0x8000, latche);
setprg16(0xc000, ~0);
setchr8(0);
}
static void Sync(void) {
uint8 bank = (ctrl & 3) << 3;
setchr4(0x0000, (prgchr[0] >> 3) | (bank << 2));
setchr4(0x1000, (prgchr[1] >> 3) | (bank << 2));
if (ctrl & 8) {
setprg16(0x8000, bank | (prgchr[0] & 6) | 0); // actually, both 0 and 1 registers used, but they will switch each PA12 transition
setprg16(0xc000, bank | (prgchr[0] & 6) | 1); // if bits are different for both registers, so they must be programmed strongly the same!
} else {
setprg16(0x8000, bank | (prgchr[0] & 7));
setprg16(0xc000, bank | 7 );
}
setmirror(((ctrl & 4) >> 2) ^ 1);
}
static void Sync(void) {
uint8 bank = (reg[2] & 3) << 3;
setmirror((reg[0] & 1) ^ 1);
setprg8r(0x10, 0x6000, 0);
setchr8(0);
if (reg[0] & 2) {
setprg16(0x8000, (reg[1] & 7) | bank);
setprg16(0xC000, ((~0) & 7) | bank);
} else {
setprg16(0x8000, (reg[1] & 6) | bank);
setprg16(0xC000, (reg[1] & 6) | bank | 1);
}
}
static void NROMPower(void) {
setprg8r(0x10, 0x6000, 0); // Famili BASIC (v3.0) need it (uses only 4KB), FP-BASIC uses 8KB
setprg16(0x8000, 0);
setprg16(0xC000, ~0);
setchr8(0);
SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000, 0xFFFF, CartBR);
#ifdef DEBUG_MAPPER
SetWriteHandler(0x4020, 0xFFFF, NROMWrite);
#endif
}
static void Sync(void) {
if (is10) {
setprg8r(0x10, 0x6000, 0);
setprg16(0x8000, preg);
setprg16(0xC000, ~0);
} else {
setprg8(0x8000, preg);
setprg8(0xA000, ~2);
setprg8(0xC000, ~1);
setprg8(0xE000, ~0);
}
setchr4(0x0000, creg[latch0]);
setchr4(0x1000, creg[latch1 + 2]);
setmirror(mirr);
}
static void Sync(void)
{
if(regs[0]&0x80)
{
if(regs[1]&0x80)
setprg32(0x8000,regs[1]&0x1F);
else
{
int bank=((regs[1]&0x1f)<<1)|((regs[1]>>6)&1);
setprg16(0x8000,bank);
setprg16(0xC000,bank);
}
}
else
{
static void Power(CartInfo *info)
{
setprg16(0x8000, 0xF);
setchr8(0);
latch = 0xFF;
Sync();
}
static void Sync(void)
{
setchr4r(0x10,0x0000,0);
setchr4r(0x10,0x1000,reg&0x0f);
setprg16(0x8000,reg>>6);
setprg16(0xc000,~0);
}
static void NWCPRGHook(uint32 A, uint8 V)
{
if(NWCRec&0x8)
setprg16(A,8|(V&0x7));
else
setprg32(0x8000,(NWCRec>>1)&3);
}
static void Sync(void) {
if(reset) {
setprg16(0x8000, latche & 7);
setprg16(0xC000, 7);
setmirror(MI_V);
} else {
uint32 bank = (latche & 0x1F) + 8;
if (latche & 0x20) {
setprg16(0x8000, bank);
setprg16(0xC000, bank);
} else
setprg32(0x8000, bank >> 1);
setmirror((latche >> 6) & 1);
}
setchr8(0);
}
static void MMC4_Power(CartInfo *info)
{
int x;
latches[0] = latches[1] = 1;
for(x = 0; x < 4; x++)
CHRBanks[x] = 0x1F;
CHRSync();
PRGBank = 0;
setprg16(0x8000, 0);
setprg16(0xc000, 0xF);
setprg8r(0x10, 0x6000, 0);
if(!info->battery)
memset(MMC4_WRAM, 0xFF, 8192);
}
static void Sync(void) {
setchr2(0x0000, chr_reg[0]);
setchr2(0x0800, chr_reg[1]);
setchr2(0x1000, chr_reg[2]);
setchr2(0x1800, chr_reg[3]);
setprg8r(0x10, 0x6000, 0);
setprg16r((PRGptr[1]) ? kogame : 0, 0x8000, prg_reg);
setprg16(0xC000, ~0);
}
static void Sync(void) {
switch (bank_mode) {
case 0x00:
case 0x10:
setprg16(0x8000, large_bank | prg_bank);
setprg16(0xC000, large_bank | 7);
break;
case 0x20:
setprg32(0x8000, (large_bank | prg_bank) >> 1);
break;
case 0x30:
setprg16(0x8000, large_bank | prg_bank);
setprg16(0xC000, large_bank | prg_bank);
break;
}
setmirror(mirroring);
if (!is_large_banks)
setchr8(chr_bank);
}
static void Sync(void)
{
// setchr4(0x0000,(reg[0]&0x80) >> 7);
// setchr4(0x1000,(reg[0]&0x80) >> 7);
setchr8(0);
setprg8r(0x10,0x6000,0);
setprg16(0x8000,bs_tbl[reg[0]&0x7f]>>4);
setprg16(0xc000,bs_tbl[reg[0]&0x7f]&0xf);
setmirror(MI_V);
}
