static void
siop_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
struct siop_pci_softc *sc = (struct siop_pci_softc *)self;
if (siop_pci_attach_common(&sc->siop_pci, &sc->siop.sc_c,
pa, siop_intr) == 0)
return;
siop_attach(&sc->siop);
}
void
siop_sgc_attach(struct device *parent, struct device *self, void *aux)
{
struct siop_sgc_softc *sc = (struct siop_sgc_softc *)self;
struct confargs *ca = aux;
volatile struct iomod *regs;
sc->sc_iot = ca->ca_iot;
if (bus_space_map(sc->sc_iot, ca->ca_hpa,
IOMOD_HPASIZE, 0, &sc->sc_ioh)) {
printf(": cannot map io space\n");
return;
}
sc->sc_bustag = *sc->sc_iot;
sc->sc_bustag.hbt_r1 = siop_sgc_r1;
sc->sc_bustag.hbt_r2 = siop_sgc_r2;
sc->sc_bustag.hbt_w1 = siop_sgc_w1;
sc->sc_bustag.hbt_w2 = siop_sgc_w2;
sc->sc_siop.sc_c.features = SF_CHIP_PF | SF_CHIP_BE | SF_BUS_WIDE;
sc->sc_siop.sc_c.maxburst = 4;
sc->sc_siop.sc_c.maxoff = 8;
sc->sc_siop.sc_c.clock_div = 3;
sc->sc_siop.sc_c.clock_period = 250;
sc->sc_siop.sc_c.ram_size = 0;
sc->sc_siop.sc_c.sc_reset = siop_sgc_reset;
sc->sc_siop.sc_c.sc_dmat = ca->ca_dmatag;
sc->sc_siop.sc_c.sc_rt = &sc->sc_bustag;
bus_space_subregion(sc->sc_iot, sc->sc_ioh, IOMOD_DEVOFFSET,
IOMOD_HPASIZE - IOMOD_DEVOFFSET, &sc->sc_siop.sc_c.sc_rh);
regs = bus_space_vaddr(sc->sc_iot, sc->sc_ioh);
regs->io_command = CMD_RESET;
while ((regs->io_status & IO_ERR_MEM_RY) == 0)
delay(100);
regs->io_ii_rw = IO_II_PACKEN | IO_II_PREFETCHEN;
siop_sgc_reset(&sc->sc_siop.sc_c);
regs->io_eim = cpu_gethpa(0) | (31 - ca->ca_irq);
regs->io_ii_rw |= IO_II_INTEN;
cpu_intr_establish(IPL_BIO, ca->ca_irq, siop_intr, sc,
sc->sc_siop.sc_c.sc_dev.dv_xname);
printf(": NCR53C720 rev %d\n", bus_space_read_1(sc->sc_siop.sc_c.sc_rt,
sc->sc_siop.sc_c.sc_rh, SIOP_CTEST3) >> 4);
siop_attach(&sc->sc_siop);
}
