/* Called from the FIQ asm handler */
void msm7k_fiq_handler(void)
{
struct irq_data *d;
struct irq_chip *c;
struct pt_regs ctx_regs;
pr_info("Fiq is received %s\n", __func__);
fiq_counter++;
d = irq_get_irq_data(MSM8625_INT_A9_M2A_2);
c = irq_data_get_irq_chip(d);
c->irq_mask(d);
local_irq_disable();
/* Clear the IRQ from the ENABLE_SET */
gic_clear_irq_pending(MSM8625_INT_A9_M2A_2);
local_irq_enable();
ctx_regs.ARM_pc = msm_dump_cpu_ctx.fiq_r14;
ctx_regs.ARM_lr = msm_dump_cpu_ctx.svc_r14;
ctx_regs.ARM_sp = msm_dump_cpu_ctx.svc_r13;
ctx_regs.ARM_fp = msm_dump_cpu_ctx.usr_r11;
#ifdef CONFIG_SEC_DEBUG
do {
extern void sec_save_final_context(void);
sec_save_final_context();
} while (0);
#endif
unwind_backtrace(&ctx_regs, current);
#ifdef CONFIG_SMP
smp_send_all_cpu_backtrace();
#endif
flush_cache_all();
outer_flush_all();
return;
}
void arch_trigger_all_cpu_backtrace(void)
{
smp_send_all_cpu_backtrace();
}