int spi_transfer_bytes(spi_t dev, char *out, char *in, unsigned int length)
{
int transfered = 0;
if (out != NULL) {
DEBUG("out*: %p out: %x length: %x\n", out, *out, length);
while (length--) {
int ret = spi_transfer_byte(dev, *(out)++, 0);
if (ret < 0) {
return ret;
}
transfered += ret;
}
}
if (in != NULL) {
while (length--) {
int ret = spi_transfer_byte(dev, 0, in++);
if (ret < 0) {
return ret;
}
transfered += ret;
}
DEBUG("in*: %p in: %x transfered: %x\n", in, *(in-transfered), transfered);
}
DEBUG("sent %x byte(s)\n", transfered);
return transfered;
}
int spi_transfer_reg(spi_t dev, uint8_t reg, char out, char *in)
{
int trans_ret;
trans_ret = spi_transfer_byte(dev, reg, in);
if (trans_ret < 0) {
return -1;
}
trans_ret = spi_transfer_byte(dev, out, in);
if (trans_ret < 0) {
return -1;
}
return 1;
}
// Function to set the input voltage gain and frequency rejection mode
void LTC2480_set_modes(uint8_t cs, uint8_t gain_selection, uint8_t rejection_mode)
{
uint8_t rx;
uint8_t mode = gain_selection | rejection_mode;
mode = mode | 0x80; // Enable
spi_transfer_byte(cs, mode, &rx);
}
void cc110x_readburst_reg(cc110x_t *dev, uint8_t addr, char *buffer, uint8_t count)
{
int i = 0;
unsigned int cpsr;
spi_acquire(dev->params.spi);
cpsr = disableIRQ();
cc110x_cs(dev);
spi_transfer_byte(dev->params.spi, addr | CC110X_READ_BURST, 0);
while (i < count) {
spi_transfer_byte(dev->params.spi, CC110X_NOBYTE, &buffer[i]);
i++;
}
gpio_set(dev->params.cs);
restoreIRQ(cpsr);
spi_release(dev->params.spi);
}
static void cmd(encx24j600_t *dev, char cmd) {
spi_acquire(dev->spi);
gpio_clear(dev->cs);
spi_transfer_byte(dev->spi, cmd, NULL);
gpio_set(dev->cs);
spi_release(dev->spi);
}
void cc110x_readburst_reg(uint8_t addr, char *buffer, uint8_t count)
{
int i = 0;
unsigned int cpsr;
spi_acquire(CC110X_SPI);
cpsr = disableIRQ();
cc110x_cs();
spi_transfer_byte(CC110X_SPI, addr | CC1100_READ_BURST, 0);
while (i < count) {
spi_transfer_byte(CC110X_SPI, CC1100_NOBYTE, &buffer[i]);
i++;
}
gpio_set(CC110X_CS);
restoreIRQ(cpsr);
spi_release(CC110X_SPI);
}
void at86rf2xx_fb_start(const at86rf2xx_t *dev)
{
spi_acquire(dev->spi);
gpio_clear(dev->cs_pin);
spi_transfer_byte(dev->spi,
AT86RF2XX_ACCESS_FB | AT86RF2XX_ACCESS_READ,
NULL);
}
static void cmdn(encx24j600_t *dev, uint8_t cmd, char *out, char *in, int len) {
spi_acquire(dev->spi);
gpio_clear(dev->cs);
spi_transfer_byte(dev->spi, cmd, NULL);
spi_transfer_bytes(dev->spi, out, in, len);
gpio_set(dev->cs);
spi_release(dev->spi);
}
int spi_transfer_bytes(spi_t dev, char *out, char *in, unsigned int length)
{
char res;
int count = 0;
for (int i = 0; i < length; i++) {
if (out) {
count += spi_transfer_byte(dev, out[i], &res);
}
else {
count += spi_transfer_byte(dev, 0, &res);
}
if (in) {
in[i] = res;
}
}
return count;
}
uint8_t cc2420_strobe(const cc2420_t *dev, const uint8_t command)
{
uint8_t res;
spi_acquire(SPI_BUS, SPI_CS, SPI_MODE, SPI_CLK);
res = spi_transfer_byte(SPI_BUS, SPI_CS, false, command);
spi_release(SPI_BUS);
return res;
}
static void _write(pcd8544_t *dev, uint8_t is_data, char data)
{
/* set command or data mode */
gpio_write(dev->mode, is_data);
/* write byte to LCD */
spi_acquire(dev->spi);
gpio_clear(dev->cs);
spi_transfer_byte(dev->spi, data, 0);
gpio_set(dev->cs);
spi_release(dev->spi);
}
uint8_t rfm69_spi_transfer_byte(uint8_t b) {
#ifdef USE_SSP0
uint8_t tx,rx;
SPI_SendRcv(LPC_SPI0,
0 /* assert SlaveSelect*/,
&tx, &rx, 1);
return rx;
#endif
return spi_transfer_byte(b);
}
void at86rf2xx_fb_read(const at86rf2xx_t *dev,
uint8_t *data,
const size_t len)
{
spi_acquire(dev->spi);
gpio_clear(dev->cs_pin);
spi_transfer_byte(dev->spi,
AT86RF2XX_ACCESS_FB | AT86RF2XX_ACCESS_READ,
NULL);
spi_transfer_bytes(dev->spi, NULL, (char *)data, len);
gpio_set(dev->cs_pin);
spi_release(dev->spi);
}
uint8_t cc110x_strobe(uint8_t c)
{
char result;
unsigned int cpsr;
spi_acquire(CC110X_SPI);
cpsr = disableIRQ();
cc110x_cs();
spi_transfer_byte(CC110X_SPI, c, &result);
gpio_set(CC110X_CS);
restoreIRQ(cpsr);
spi_release(CC110X_SPI);
return (uint8_t) result;
}
int spi_transfer_bytes(spi_t dev, char *out, char *in, unsigned int length)
{
int i, trans_ret, trans_bytes = 0;
char in_temp;
for (i = 0; i < length; i++) {
if (out != NULL) {
trans_ret = spi_transfer_byte(dev, out[i], &in_temp);
}
else {
trans_ret = spi_transfer_byte(dev, 0, &in_temp);
}
if (trans_ret < 0) {
return -1;
}
if (in != NULL) {
in[i] = in_temp;
}
trans_bytes++;
}
return trans_bytes++;
}
int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, unsigned int length)
{
int trans_ret;
trans_ret = spi_transfer_byte(dev, reg, in);
if (trans_ret < 0) {
return -1;
}
trans_ret = spi_transfer_bytes(dev, out, in, length);
if (trans_ret < 0) {
return -1;
}
return trans_ret;
}
static int nvram_spi_write(nvram_t *dev, uint8_t *src, uint32_t dst, size_t len)
{
nvram_spi_params_t *spi_dev = (nvram_spi_params_t *) dev->extra;
int status;
union {
uint32_t u32;
char c[4];
} addr;
/* Address is expected by the device as big-endian, i.e. network byte order,
* we utilize the network byte order macros here. */
addr.u32 = HTONL(dst);
/* Acquire exclusive bus access */
spi_acquire(spi_dev->spi);
/* Assert CS */
gpio_clear(spi_dev->cs);
/* Enable writes */
status = spi_transfer_byte(spi_dev->spi, NVRAM_SPI_CMD_WREN, NULL);
if (status < 0)
{
return status;
}
/* Release CS */
gpio_set(spi_dev->cs);
xtimer_spin(NVRAM_SPI_CS_TOGGLE_TICKS);
/* Re-assert CS */
gpio_clear(spi_dev->cs);
/* Write command and address */
status = spi_transfer_regs(spi_dev->spi, NVRAM_SPI_CMD_WRITE,
&addr.c[sizeof(addr.c) - spi_dev->address_count], NULL,
spi_dev->address_count);
if (status < 0)
{
return status;
}
/* Keep holding CS and write data */
status = spi_transfer_bytes(spi_dev->spi, (char *)src, NULL, len);
if (status < 0)
{
return status;
}
/* Release CS */
gpio_set(spi_dev->cs);
/* Release exclusive bus access */
spi_release(spi_dev->spi);
return status;
}
uint8_t cc110x_strobe(cc110x_t *dev, uint8_t c)
{
#ifdef CC110X_DONT_RESET
if (c == CC110X_SRES) {
return 0;
}
#endif
char result;
unsigned int cpsr;
spi_acquire(dev->params.spi);
cpsr = disableIRQ();
cc110x_cs(dev);
spi_transfer_byte(dev->params.spi, c, &result);
gpio_set(dev->params.cs);
restoreIRQ(cpsr);
spi_release(dev->params.spi);
return (uint8_t) result;
}
static int nvram_spi_write_9bit_addr(nvram_t *dev, uint8_t *src, uint32_t dst, size_t len)
{
nvram_spi_params_t *spi_dev = (nvram_spi_params_t *) dev->extra;
int status;
uint8_t cmd;
uint8_t addr;
cmd = NVRAM_SPI_CMD_WRITE;
/* The upper address bit is mixed into the command byte on certain devices,
* probably just to save a byte in the SPI transfer protocol. */
if (dst > 0xff) {
cmd |= 0x08;
}
/* LSB of address */
addr = (dst & 0xff);
spi_acquire(spi_dev->spi);
gpio_clear(spi_dev->cs);
/* Enable writes */
status = spi_transfer_byte(spi_dev->spi, NVRAM_SPI_CMD_WREN, NULL);
if (status < 0)
{
return status;
}
gpio_set(spi_dev->cs);
xtimer_spin(NVRAM_SPI_CS_TOGGLE_TICKS);
gpio_clear(spi_dev->cs);
/* Write command and address */
status = spi_transfer_reg(spi_dev->spi, cmd, addr, NULL);
if (status < 0)
{
return status;
}
/* Keep holding CS and write data */
status = spi_transfer_bytes(spi_dev->spi, (char *)src, NULL, len);
if (status < 0)
{
return status;
}
gpio_set(spi_dev->cs);
spi_release(spi_dev->spi);
/* status contains the number of bytes actually written to the SPI bus. */
return status;
}
int main()
{
CLKPR = 0x80;
CLKPR = 0x01; /* CLKDIV = 2, 10 MHz / 2 = 5 MHz */
DDRA =
mask(PIN_LEAD_TEST2) |
mask(PIN_AD_POWER) |
mask(PIN_ECG_CLOCK) |
mask(PIN_LEAD_TEST1) |
mask(PIN_DATA_OUT);
/* delay(100);
spi_string("mobilECG firmware V1.0.0", 25);*/
delay(300);
PORTA |= mask(PIN_AD_POWER);
// PORTA |= mask(PIN_ECG_CLOCK);
delay(100);
char cnt = 0;
while(1)
{
while((PINA & mask(PIN_DATA_READY)) != 0)
{
}
negative_edge = mask(USIWM0) | mask(USITC) | mask(USICLK);
positive_edge = mask(USIWM0) | mask(USITC) ;
spi_transfer_byte(cnt++);
spi_24bit();
spi_24bit();
spi_24bit();
spi_24bit();
spi_24bit();
spi_24bit();
spi_24bit();
spi_24bit();
}
return 0;
}
uint8_t at86rf231_spi_transfer_byte(uint8_t byte)
{
char ret;
spi_transfer_byte(SPI_0, byte, &ret);
return ret;
}
int main(void)
{
//noetig? Nein, LE nicht notwendig fuer SPI-Konfiguration.
//GPIOA->MODER &= ~(2 << (2 * 4)); /* set pin to output mode */
//GPIOA->MODER |= (1 << (2 * 4));
//GPIOA->OTYPER &= ~(1 << 4); /* set to push-pull configuration */
//GPIOA->OSPEEDR |= (3 << (2 * 4)); /* set to high speed */
//GPIOA->PUPDR &= ~(3 << (2 * 4)); /* configure push-pull resistors */
//GPIOA->PUPDR |= (0b00 << (2 * 4));
//GPIOA->ODR &= ~(1 << 4); /* set pin to low signal */
LD4_ON;
if(spi_init_master(SPI_0, SPI_CONF_FIRST_RISING, SPI_SPEED_1MHZ) != 0){
while(1) LD3_ON; //nix mehr machen
}
//GPIOs work but the clock has to be enabled first:
//RCC->AHBENR |= RCC_AHBENR_GPIOEEN;
//GPIO_6 : PE1
//gpio_init_out(GPIO_6, GPIO_NOPULL); //just for debug
char blubb = 0;
char *mirwors = &blubb; //null und NULL wollte er nicht, daher halt umstaendlich
while(1) {
for(uint8_t i = 0; i<30; i++){
//gpio_set(GPIO_6);
//blau
if(spi_transfer_byte(SPI_0, 0xFF, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
hwtimer_wait(HWTIMER_TICKS(TEST_WAIT * 1000));
//gruen
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0xFF, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
hwtimer_wait(HWTIMER_TICKS(TEST_WAIT * 1000));
}
for(uint16_t i=((60+31)/32); i>0; i--) {
if(spi_transfer_byte(SPI_0, 0x00, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
}
//gpio_clear(GPIO_6); //just for debug
for(uint8_t i = 0; i<30; i++){
//dunkel
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
hwtimer_wait(HWTIMER_TICKS(TEST_WAIT * 1000));
//rot
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0xFF, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
if(spi_transfer_byte(SPI_0, 0x80, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
hwtimer_wait(HWTIMER_TICKS(TEST_WAIT * 1000));
}
for(uint16_t i=((60+31)/32); i>0; i--) {
if(spi_transfer_byte(SPI_0, 0x00, mirwors) != 1){
while(1) LD3_ON; //nix mehr machen
}
}
//LD3_ON;
//hwtimer_wait(HWTIMER_TICKS(TEST_WAIT * 1000));
//LD3_OFF;
//LD4_ON;
//hwtimer_wait(HWTIMER_TICKS(500 * 1000));
//LD4_OFF;
}
return 0;
}
static void cmd(encx24j600_t *dev, char cmd) {
spi_transfer_byte(dev->spi, dev->cs, false, (uint8_t)cmd);
}
int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, unsigned int length)
{
spi_transfer_byte(dev, reg, NULL);
return spi_transfer_bytes(dev, out, in, length);
}
int spi_transfer_reg(spi_t dev, uint8_t reg, char out, char *in)
{
spi_transfer_byte(dev, reg, NULL);
return spi_transfer_byte(dev, out, in);
}
static void cmdn(encx24j600_t *dev, uint8_t cmd, char *out, char *in, int len) {
spi_transfer_byte(dev->spi, dev->cs, true, cmd);
spi_transfer_bytes(dev->spi, dev->cs, false, out, in, len);
}
