int sprd_charger_is_adapter(struct sprd_battery_data *data)
{
	uint32_t ret;
	volatile uint32_t i;
	unsigned long irq_flag = 0;

	gpio_request(USB_DM_GPIO, "sprd_charge");
	gpio_request(USB_DP_GPIO, "sprd_charge");
	gpio_direction_input(USB_DM_GPIO);
	gpio_direction_input(USB_DP_GPIO);

	udc_enable();
	udc_phy_down();
	local_irq_save(irq_flag);

	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,
			     (USB_DM_PULLDOWN_BIT | USB_DP_PULLDOWN_BIT),
			     USB_PHY_CTRL);

	/* Identify USB charger */
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, USB_DM_PULLUP_BIT,
			   USB_PHY_CTRL);
	mdelay(10);
	ret = gpio_get_value(USB_DM_GPIO);
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, (USB_DM_PULLUP_BIT),
			     USB_PHY_CTRL);

	/* normal charger */
	if (ret) {
		/* Identify standard adapter */
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, USB_DM_PULLDOWN_BIT,
				   USB_PHY_CTRL);
		for (i = 0; i < 200; i++) {;
		}
		if ((gpio_get_value(USB_DM_GPIO) & BIT(1))
		    && (gpio_get_value(USB_DP_GPIO) & BIT(2))) {
			ret = 1;	/* adapter */
		} else {
			ret = 1;	/* non standard adapter */
		}
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, (USB_DM_PULLDOWN_BIT),
				     USB_PHY_CTRL);
	}

	local_irq_restore(irq_flag);
	udc_disable();
	gpio_free(USB_DM_GPIO);
	gpio_free(USB_DP_GPIO);
	return ret;
}
Ejemplo n.º 2
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static void sdhci_module_init(struct sdhci_host* host)
{
	if(!strcmp(host->hw_name, "Spread SDIO host0")){
		/* Enable SDIO0 Module */
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, AHB_CTL0_SDIO0_EN, AHB_CTL0);
		/* reset sdio0 module*/
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, SDIO0_SOFT_RESET, AHB_SOFT_RST);
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, SDIO0_SOFT_RESET, AHB_SOFT_RST);
	}
	if(!strcmp(host->hw_name, "Spread SDIO host1")){
		/* Enable SDIO1 Module */
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, AHB_CTL0_SDIO1_EN, AHB_CTL0);
		/* reset sdio1 module*/
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, SDIO1_SOFT_RESET, AHB_SOFT_RST);
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, SDIO1_SOFT_RESET, AHB_SOFT_RST);
	}
#ifdef CONFIG_ARCH_SC7710
	if(!strcmp(host->hw_name, "Spread SDIO host2")){
		/* Enable SDIO1 Module */
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, BIT_SDIO2_EB, AHB_CTL6);
		/* reset sdio1 module*/
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, BIT_SD2_SOFT_RST, AHB_SOFT2_RST);
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, BIT_SD2_SOFT_RST, AHB_SOFT2_RST);
	}
	if(!strcmp(host->hw_name, "Spread EMMC host0")){
		/* Enable SDIO1 Module */
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, BIT_EMMC_EB, AHB_CTL6);
		/* reset sdio1 module*/
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, BIT_EMMC_SOFT_RST, AHB_SOFT2_RST);
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, BIT_EMMC_SOFT_RST, AHB_SOFT2_RST);
	}
#endif
	sdhci_sprd_set_base_clock(host, SDIO_MAX_CLK);

}
_mali_osk_errcode_t mali_platform_init(void)
{
	sprd_greg_clear_bits(REG_TYPE_GLOBAL, BIT(23), GR_G3D_PWR_CTRL);
	udelay(100);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, BIT(21), AHB_CTL0);
	MALI_SUCCESS;
}
Ejemplo n.º 4
0
static void usb_startup(void)
{
	usb_enable_module(1);
	mdelay(10);
	//usb_ldo_switch(0);
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(1)|BIT(2),AHB_CTL3);
	usb_ldo_switch(1);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(6),AHB_CTL3);

//	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(8)|BIT(14)|BIT(15)|BIT(17),AHB_CTL3);
//	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(12)|BIT(13)|BIT(16),AHB_CTL3);

	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(6)|BIT(7),AHB_SOFT_RST);
	mdelay(5);
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(6)|BIT(7),AHB_SOFT_RST);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,AHB_CTL0_USBD_EN,AHB_CTL0);
}
Ejemplo n.º 5
0
static void usb_enable_module(int en)
{
	if (en){
		usb_clock_enable(1);
		sprd_greg_clear_bits(REG_TYPE_GLOBAL,BIT(9),GR_CLK_GEN5);
	}else {
		usb_clock_enable(0);
		sprd_greg_set_bits(REG_TYPE_GLOBAL,BIT(9),GR_CLK_GEN5);
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,AHB_CTL0_USBD_EN,AHB_CTL0);
	}
}
Ejemplo n.º 6
0
static void usb_startup(void)
{
	usb_ldo_switch(1);
	mdelay(10);
	usb_enable_module(1);
	mdelay(2);
#if defined(CONFIG_ARCH_SCX35)
	sci_glb_set(REG_AP_AHB_AHB_RST,BIT(5)|BIT(6)|BIT(7));
	mdelay(5);
	sci_glb_clr(REG_AP_AHB_AHB_RST,BIT(5)|BIT(6)|BIT(7));
#else	
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(1)|BIT(2),AHB_CTL3);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(6),AHB_CTL3);

	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(6)|BIT(7),AHB_SOFT_RST);
	mdelay(5);
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(6)|BIT(7),AHB_SOFT_RST);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,AHB_CTL0_USBD_EN,AHB_CTL0);
#endif
	mdelay(3);
}
Ejemplo n.º 7
0
static void usb_startup(void)
{
	usb_ldo_switch(1);
	mdelay(10);
	usb_enable_module(1);
	mdelay(2);
#if (defined(CONFIG_ARCH_SCX35)||defined(CONFIG_ARCH_SCX35L64)||defined(CONFIG_ARCH_SCX35LT8))
#if defined(CONFIG_ARCH_SCX30G)
#if defined(CONFIG_ARCH_SCX20)
	sci_glb_set(REG_AP_AHB_AHB_RST, BIT(5)|BIT(6));
	mdelay(5);
	sci_glb_clr(REG_AP_AHB_AHB_RST, BIT(5)|BIT(6));

	sprd_usb_phy_rst();
#else
	sci_glb_set(REG_AP_AHB_AHB_RST,BIT(5)|BIT(6)|BIT(7));
	mdelay(5);
	sci_glb_clr(REG_AP_AHB_AHB_RST,BIT(5)|BIT(6)|BIT(7));
#endif
#else
	sci_glb_set(REG_AP_AHB_AHB_RST,BIT_OTG_SOFT_RST|BIT_OTG_UTMI_SOFT_RST|BIT_OTG_PHY_SOFT_RST);
	mdelay(5);
	sci_glb_clr(REG_AP_AHB_AHB_RST,BIT_OTG_SOFT_RST|BIT_OTG_UTMI_SOFT_RST|BIT_OTG_PHY_SOFT_RST);
	sci_glb_set(REG_AP_AHB_AHB_EB,BIT_USB_EB);
#endif
#else
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT_USB_S_HBIGEIDIAN|BIT_USB_M_HBIGENDIAN,REG_AHB_AHB_CTL3);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT_CLK_USB_REF_EN,REG_AHB_AHB_CTL3);

	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT_USBD_UTMI_SOFT_RST|BIT_USBPHY_SOFT_RST ,REG_AHB_SOFT_RST);
	mdelay(5);
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT_USBD_UTMI_SOFT_RST|BIT_USBPHY_SOFT_RST,REG_AHB_SOFT_RST);
	sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT_USBD_EB,REG_AHB_AHB_CTL0);
#endif
	mdelay(3);
}
_mali_osk_errcode_t mali_platform_power_mode_change(mali_power_mode power_mode)
{
	switch(power_mode)
	{
	case MALI_POWER_MODE_ON:
		sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL, BIT(21), AHB_CTL0);
		udelay(100);
		pr_debug("mali: clock up done\n");
		break;
	case MALI_POWER_MODE_LIGHT_SLEEP:
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, BIT(21), AHB_CTL0);
		pr_debug("mali: clock down done\n");
		break;
	case MALI_POWER_MODE_DEEP_SLEEP:
		break;
	};
	MALI_SUCCESS;
}
int mpll_calibrate(int cpu_freq)
{
	u32 val = 0;
	unsigned long flags;
	BUG_ON(cpu_freq != 1200);	/* only upgrade 1.2G */
	cpu_freq /= 4;
	flags = hw_local_irq_save();
	val = sprd_greg_read(REG_TYPE_GLOBAL, GR_MPLL_MN);
	if ((val & 0x7ff) == cpu_freq)
		goto exit;
	val = (val & ~0x7ff) | cpu_freq;
	sprd_greg_set_bits(REG_TYPE_GLOBAL, BIT(9), GR_GEN1);	/* mpll unlock */
	sprd_greg_write(REG_TYPE_GLOBAL, val, GR_MPLL_MN);
	sprd_greg_clear_bits(REG_TYPE_GLOBAL, BIT(9), GR_GEN1);
exit:
	hw_local_irq_restore(flags);
	debug("%s 0x%08x\n", __FUNCTION__, val);
	return 0;
}
static int __init gpio_init(void)
{
	/* enable EIC */
	sci_adi_set(ANA_REG_GLB_APB_CLK_EN, BIT_EIC_EB | BIT_RTC_EIC_EB);
	sprd_greg_set_bits(REG_TYPE_GLOBAL, GEN0_EIC_EN | GEN0_EIC_RTC_EN, GR_GEN0);

	gpiochip_add(&d_sci_eic.chip);
	gpiochip_add(&d_sci_gpio.chip);
	gpiochip_add(&a_sci_eic.chip);
	gpiochip_add(&a_sci_gpio.chip);

#ifndef CONFIG_NKERNEL
#ifndef CONFIG_ARCH_SC7710
	irq_set_chip_and_handler(IRQ_EIC_INT, &dummy_irq_chip, handle_level_irq);
	set_irq_flags(IRQ_EIC_INT, IRQF_VALID);
#endif
#endif

	gpio_irq_init(IRQ_EIC_INT, &d_sci_eic.chip, &d_eic_irq_chip);
	gpio_irq_init(IRQ_GPIO_INT, &d_sci_gpio.chip, &d_gpio_irq_chip);
	gpio_irq_init(IRQ_ANA_EIC_INT, &a_sci_eic.chip, &a_eic_irq_chip);
	gpio_irq_init(IRQ_ANA_GPIO_INT, &a_sci_gpio.chip, &a_gpio_irq_chip);
	return 0;
}
Ejemplo n.º 11
0
void usb_phy_init(struct platform_device *_dev)
{
#ifdef CONFIG_USB_CORE_IP_293A
#if defined(CONFIG_ARCH_SCX35)
	/*shark and dolphin are the same value with SPRD ref phone*/
#ifdef CONFIG_OF
	struct device_node *np = _dev->dev.of_node;

	if (of_property_read_u32(np, "tune_value", &tune_from_uboot))
	{
		pr_info("read tune_value error\n");
		return -ENODEV;
	}
	pr_info("Usb_hw.c: [%s]usb phy tune from uboot: 0x%x\n", __FUNCTION__, tune_from_uboot);
#endif

	__raw_writel(tune_from_uboot,REG_AP_APB_USB_PHY_TUNE);

	//sci_glb_set(REG_AP_APB_USB_PHY_TUNE,BIT(9)|BIT(10)|BIT(11)|BIT(20));
#else
		/*
		* tiger PHY reg is different with previous ,
		*7710 has the same core IP with tiger,but PHY reg also diff
		*/
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(11), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(10), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(20), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(9), USB_PHY_CTRL);
        sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(8), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(13), USB_PHY_CTRL);
	sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(12), USB_PHY_CTRL);
        sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(15)|BIT(14), USB_PHY_CTRL);
#endif
#else
    if (sprd_greg_read(REG_TYPE_AHB_GLOBAL,CHIP_ID) == CHIP_ID_8810S){
                /*SMIC chip id == 0x88100001*/
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(3)|BIT(2), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(1) | BIT(0), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(9), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(16), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(17), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(13), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, BIT(12), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(15)|BIT(14), USB_PHY_CTRL);
                sprd_greg_write(REG_TYPE_AHB_GLOBAL,0x28,USB_SPR_REG);
        }else{
                /*
                 * config usb phy controller
                 */
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(8), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(17), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(16), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(13)|BIT(12), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(15)|BIT(14), USB_PHY_CTRL);
        }
#endif
}
Ejemplo n.º 12
0
/* config TSP I2C2 SDA/SCL to SIM2 pads */
static void sprd8810_i2c2sel_config(void)
{
	sprd_greg_set_bits(REG_TYPE_GLOBAL, PINCTRL_I2C2_SEL, GR_PIN_CTL);
}
Ejemplo n.º 13
0
void usb_phy_init(void)
{
#ifdef CONFIG_USB_CORE_IP_293A
		/*
		* tiger PHY reg is different with previous ,
		*7710 has the same core IP with tiger,but PHY reg also diff
		*/
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(11), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(10), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(20), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(9), USB_PHY_CTRL);
        sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(8), USB_PHY_CTRL);
        sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(13), USB_PHY_CTRL);
		sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(12), USB_PHY_CTRL);
        sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(15)|BIT(14), USB_PHY_CTRL);
#else
    if (sprd_greg_read(REG_TYPE_AHB_GLOBAL,CHIP_ID) == CHIP_ID_8810S){
                /*SMIC chip id == 0x88100001*/
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(3)|BIT(2), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(1) | BIT(0), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(9), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(16), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(17), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(13), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL, BIT(12), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(15)|BIT(14), USB_PHY_CTRL);
                sprd_greg_write(REG_TYPE_AHB_GLOBAL,0x28,USB_SPR_REG);
        }else{
                /*
                 * config usb phy controller
                 */
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(8), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(17), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(16), USB_PHY_CTRL);
                sprd_greg_clear_bits(REG_TYPE_AHB_GLOBAL,BIT(13)|BIT(12), USB_PHY_CTRL);
                sprd_greg_set_bits(REG_TYPE_AHB_GLOBAL,BIT(15)|BIT(14), USB_PHY_CTRL);
        }
#endif
}