void
ste_txeoc(struct ste_softc *sc)
{
u_int8_t txstat;
struct ifnet *ifp;
ifp = &sc->arpcom.ac_if;
while ((txstat = CSR_READ_1(sc, STE_TX_STATUS)) &
STE_TXSTATUS_TXDONE) {
if (txstat & STE_TXSTATUS_UNDERRUN ||
txstat & STE_TXSTATUS_EXCESSCOLLS ||
txstat & STE_TXSTATUS_RECLAIMERR) {
ifp->if_oerrors++;
printf("%s: transmission error: %x\n",
sc->sc_dev.dv_xname, txstat);
ste_reset(sc);
ste_init(sc);
if (txstat & STE_TXSTATUS_UNDERRUN &&
sc->ste_tx_thresh < ETHER_MAX_DIX_LEN) {
sc->ste_tx_thresh += STE_MIN_FRAMELEN;
printf("%s: tx underrun, increasing tx"
" start threshold to %d bytes\n",
sc->sc_dev.dv_xname, sc->ste_tx_thresh);
}
CSR_WRITE_2(sc, STE_TX_STARTTHRESH, sc->ste_tx_thresh);
CSR_WRITE_2(sc, STE_TX_RECLAIM_THRESH,
(ETHER_MAX_DIX_LEN >> 4));
}
ste_init(sc);
CSR_WRITE_2(sc, STE_TX_STATUS, txstat);
}
int
ste_intr(void *xsc)
{
struct ste_softc *sc;
struct ifnet *ifp;
u_int16_t status;
int claimed = 0;
sc = xsc;
ifp = &sc->arpcom.ac_if;
/* See if this is really our interrupt. */
if (!(CSR_READ_2(sc, STE_ISR) & STE_ISR_INTLATCH))
return claimed;
for (;;) {
status = CSR_READ_2(sc, STE_ISR_ACK);
if (!(status & STE_INTRS))
break;
claimed = 1;
if (status & STE_ISR_RX_DMADONE) {
ste_rxeoc(sc);
ste_rxeof(sc);
}
if (status & STE_ISR_TX_DMADONE)
ste_txeof(sc);
if (status & STE_ISR_TX_DONE)
ste_txeoc(sc);
if (status & STE_ISR_STATS_OFLOW) {
timeout_del(&sc->sc_stats_tmo);
ste_stats_update(sc);
}
if (status & STE_ISR_LINKEVENT)
mii_pollstat(&sc->sc_mii);
if (status & STE_ISR_HOSTERR) {
ste_reset(sc);
ste_init(sc);
}
}
/* Re-enable interrupts */
CSR_WRITE_2(sc, STE_IMR, STE_INTRS);
if (ifp->if_flags & IFF_RUNNING && !IFQ_IS_EMPTY(&ifp->if_snd))
ste_start(ifp);
return claimed;
}
static void
ste_attach(device_t parent, device_t self, void *aux)
{
struct ste_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
pci_chipset_tag_t pc = pa->pa_pc;
pci_intr_handle_t ih;
const char *intrstr = NULL;
bus_space_tag_t iot, memt;
bus_space_handle_t ioh, memh;
bus_dma_segment_t seg;
int ioh_valid, memh_valid;
int i, rseg, error;
const struct ste_product *sp;
uint8_t enaddr[ETHER_ADDR_LEN];
uint16_t myea[ETHER_ADDR_LEN / 2];
callout_init(&sc->sc_tick_ch, 0);
sp = ste_lookup(pa);
if (sp == NULL) {
printf("\n");
panic("ste_attach: impossible");
}
printf(": %s\n", sp->ste_name);
/*
* Map the device.
*/
ioh_valid = (pci_mapreg_map(pa, STE_PCI_IOBA,
PCI_MAPREG_TYPE_IO, 0,
&iot, &ioh, NULL, NULL) == 0);
memh_valid = (pci_mapreg_map(pa, STE_PCI_MMBA,
PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
&memt, &memh, NULL, NULL) == 0);
if (memh_valid) {
sc->sc_st = memt;
sc->sc_sh = memh;
} else if (ioh_valid) {
sc->sc_st = iot;
sc->sc_sh = ioh;
} else {
aprint_error_dev(&sc->sc_dev, "unable to map device registers\n");
return;
}
sc->sc_dmat = pa->pa_dmat;
/* Enable bus mastering. */
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
PCI_COMMAND_MASTER_ENABLE);
/* power up chip */
if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
NULL)) && error != EOPNOTSUPP) {
aprint_error_dev(&sc->sc_dev, "cannot activate %d\n",
error);
return;
}
/*
* Map and establish our interrupt.
*/
if (pci_intr_map(pa, &ih)) {
aprint_error_dev(&sc->sc_dev, "unable to map interrupt\n");
return;
}
intrstr = pci_intr_string(pc, ih);
sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ste_intr, sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(&sc->sc_dev, "unable to establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
printf("%s: interrupting at %s\n", device_xname(&sc->sc_dev), intrstr);
/*
* Allocate the control data structures, and create and load the
* DMA map for it.
*/
if ((error = bus_dmamem_alloc(sc->sc_dmat,
sizeof(struct ste_control_data), PAGE_SIZE, 0, &seg, 1, &rseg,
0)) != 0) {
aprint_error_dev(&sc->sc_dev, "unable to allocate control data, error = %d\n",
error);
goto fail_0;
}
if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sizeof(struct ste_control_data), (void **)&sc->sc_control_data,
BUS_DMA_COHERENT)) != 0) {
aprint_error_dev(&sc->sc_dev, "unable to map control data, error = %d\n",
error);
goto fail_1;
}
if ((error = bus_dmamap_create(sc->sc_dmat,
sizeof(struct ste_control_data), 1,
sizeof(struct ste_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
aprint_error_dev(&sc->sc_dev, "unable to create control data DMA map, "
"error = %d\n", error);
goto fail_2;
}
if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc->sc_control_data, sizeof(struct ste_control_data), NULL,
0)) != 0) {
aprint_error_dev(&sc->sc_dev, "unable to load control data DMA map, error = %d\n",
error);
goto fail_3;
}
/*
* Create the transmit buffer DMA maps.
*/
for (i = 0; i < STE_NTXDESC; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
STE_NTXFRAGS, MCLBYTES, 0, 0,
&sc->sc_txsoft[i].ds_dmamap)) != 0) {
aprint_error_dev(&sc->sc_dev, "unable to create tx DMA map %d, "
"error = %d\n", i, error);
goto fail_4;
}
}
/*
* Create the receive buffer DMA maps.
*/
for (i = 0; i < STE_NRXDESC; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
MCLBYTES, 0, 0, &sc->sc_rxsoft[i].ds_dmamap)) != 0) {
aprint_error_dev(&sc->sc_dev, "unable to create rx DMA map %d, "
"error = %d\n", i, error);
goto fail_5;
}
sc->sc_rxsoft[i].ds_mbuf = NULL;
}
/*
* Reset the chip to a known state.
*/
ste_reset(sc, AC_GlobalReset | AC_RxReset | AC_TxReset | AC_DMA |
AC_FIFO | AC_Network | AC_Host | AC_AutoInit | AC_RstOut);
/*
* Read the Ethernet address from the EEPROM.
*/
for (i = 0; i < 3; i++) {
ste_read_eeprom(sc, STE_EEPROM_StationAddress0 + i, &myea[i]);
myea[i] = le16toh(myea[i]);
}
memcpy(enaddr, myea, sizeof(enaddr));
printf("%s: Ethernet address %s\n", device_xname(&sc->sc_dev),
ether_sprintf(enaddr));
/*
* Initialize our media structures and probe the MII.
*/
sc->sc_mii.mii_ifp = ifp;
sc->sc_mii.mii_readreg = ste_mii_readreg;
sc->sc_mii.mii_writereg = ste_mii_writereg;
sc->sc_mii.mii_statchg = ste_mii_statchg;
sc->sc_ethercom.ec_mii = &sc->sc_mii;
ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ether_mediachange,
ether_mediastatus);
mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
MII_OFFSET_ANY, 0);
if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
} else
ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
ifp = &sc->sc_ethercom.ec_if;
strlcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ);
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_ioctl = ste_ioctl;
ifp->if_start = ste_start;
ifp->if_watchdog = ste_watchdog;
ifp->if_init = ste_init;
ifp->if_stop = ste_stop;
IFQ_SET_READY(&ifp->if_snd);
/*
* Default the transmit threshold to 128 bytes.
*/
sc->sc_txthresh = 128;
/*
* Disable MWI if the PCI layer tells us to.
*/
sc->sc_DMACtrl = 0;
if ((pa->pa_flags & PCI_FLAGS_MWI_OKAY) == 0)
sc->sc_DMACtrl |= DC_MWIDisable;
/*
* We can support 802.1Q VLAN-sized frames.
*/
sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
/*
* Attach the interface.
*/
if_attach(ifp);
ether_ifattach(ifp, enaddr);
/*
* Make sure the interface is shutdown during reboot.
*/
sc->sc_sdhook = shutdownhook_establish(ste_shutdown, sc);
if (sc->sc_sdhook == NULL)
printf("%s: WARNING: unable to establish shutdown hook\n",
device_xname(&sc->sc_dev));
return;
/*
* Free any resources we've allocated during the failed attach
* attempt. Do this in reverse order and fall through.
*/
fail_5:
for (i = 0; i < STE_NRXDESC; i++) {
if (sc->sc_rxsoft[i].ds_dmamap != NULL)
bus_dmamap_destroy(sc->sc_dmat,
sc->sc_rxsoft[i].ds_dmamap);
}
fail_4:
for (i = 0; i < STE_NTXDESC; i++) {
if (sc->sc_txsoft[i].ds_dmamap != NULL)
bus_dmamap_destroy(sc->sc_dmat,
sc->sc_txsoft[i].ds_dmamap);
}
bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
fail_3:
bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
fail_2:
bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_control_data,
sizeof(struct ste_control_data));
fail_1:
bus_dmamem_free(sc->sc_dmat, &seg, rseg);
fail_0:
return;
}
