static int stm32f1_flash_erase(struct target_flash *f,
target_addr addr, size_t len)
{
target *t = f->t;
uint16_t sr;
stm32f1_flash_unlock(t);
while(len) {
/* Flash page erase instruction */
target_mem_write32(t, FLASH_CR, FLASH_CR_PER);
/* write address to FMA */
target_mem_write32(t, FLASH_AR, addr);
/* Flash page erase start instruction */
target_mem_write32(t, FLASH_CR, FLASH_CR_STRT | FLASH_CR_PER);
/* Read FLASH_SR to poll for BSY bit */
while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY)
if(target_check_error(t))
return -1;
len -= f->blocksize;
addr += f->blocksize;
}
/* Check for error */
sr = target_mem_read32(t, FLASH_SR);
if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP))
return -1;
return 0;
}
static int stm32f1_flash_erase(struct target_s *target, uint32_t addr, int len, uint32_t pagesize)
{
ADIv5_AP_t *ap = adiv5_target_ap(target);
uint16_t sr;
addr &= ~(pagesize - 1);
len &= ~(pagesize - 1);
stm32f1_flash_unlock(ap);
while(len) {
/* Flash page erase instruction */
adiv5_ap_mem_write(ap, FLASH_CR, FLASH_CR_PER);
/* write address to FMA */
adiv5_ap_mem_write(ap, FLASH_AR, addr);
/* Flash page erase start instruction */
adiv5_ap_mem_write(ap, FLASH_CR, FLASH_CR_STRT | FLASH_CR_PER);
/* Read FLASH_SR to poll for BSY bit */
while(adiv5_ap_mem_read(ap, FLASH_SR) & FLASH_SR_BSY)
if(target_check_error(target))
return -1;
len -= pagesize;
addr += pagesize;
}
/* Check for error */
sr = adiv5_ap_mem_read(ap, FLASH_SR);
if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP))
return -1;
return 0;
}
static bool stm32f1_cmd_option(target *t, int argc, char *argv[])
{
uint32_t addr, val;
uint32_t flash_obp_rdp_key;
uint32_t rdprt;
switch(t->idcode) {
case 0x422: /* STM32F30x */
case 0x432: /* STM32F37x */
case 0x438: /* STM32F303x6/8 and STM32F328 */
case 0x440: /* STM32F0 */
case 0x446: /* STM32F303xD/E and STM32F398xE */
flash_obp_rdp_key = FLASH_OBP_RDP_KEY_F3;
break;
default: flash_obp_rdp_key = FLASH_OBP_RDP_KEY;
}
rdprt = target_mem_read32(t, FLASH_OBR) & FLASH_OBR_RDPRT;
stm32f1_flash_unlock(t);
target_mem_write32(t, FLASH_OPTKEYR, KEY1);
target_mem_write32(t, FLASH_OPTKEYR, KEY2);
if ((argc == 2) && !strcmp(argv[1], "erase")) {
stm32f1_option_erase(t);
stm32f1_option_write_erased(t, FLASH_OBP_RDP, flash_obp_rdp_key);
} else if (rdprt) {
tc_printf(t, "Device is Read Protected\n");
tc_printf(t, "Use \"monitor option erase\" to unprotect, erasing device\n");
return true;
} else if (argc == 3) {
addr = strtol(argv[1], NULL, 0);
val = strtol(argv[2], NULL, 0);
stm32f1_option_write(t, addr, val);
} else {
tc_printf(t, "usage: monitor option erase\n");
tc_printf(t, "usage: monitor option <addr> <value>\n");
}
if (0 && flash_obp_rdp_key == FLASH_OBP_RDP_KEY_F3) {
/* Reload option bytes on F0 and F3*/
val = target_mem_read32(t, FLASH_CR);
val |= FLASH_CR_OBL_LAUNCH;
stm32f1_option_write(t, FLASH_CR, val);
val &= ~FLASH_CR_OBL_LAUNCH;
stm32f1_option_write(t, FLASH_CR, val);
}
for (int i = 0; i < 0xf; i += 4) {
addr = 0x1ffff800 + i;
val = target_mem_read32(t, addr);
tc_printf(t, "0x%08X: 0x%04X\n", addr, val & 0xFFFF);
tc_printf(t, "0x%08X: 0x%04X\n", addr + 2, val >> 16);
}
return true;
}
static bool stm32f1_cmd_erase_mass(target *t)
{
stm32f1_flash_unlock(t);
/* Flash mass erase start instruction */
target_mem_write32(t, FLASH_CR, FLASH_CR_MER);
target_mem_write32(t, FLASH_CR, FLASH_CR_STRT | FLASH_CR_MER);
/* Read FLASH_SR to poll for BSY bit */
while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY)
if(target_check_error(t))
return false;
/* Check for error */
uint16_t sr = target_mem_read32(t, FLASH_SR);
if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP))
return false;
return true;
}
static bool stm32f1_cmd_erase_mass(target *t)
{
ADIv5_AP_t *ap = adiv5_target_ap(t);
stm32f1_flash_unlock(ap);
/* Flash mass erase start instruction */
adiv5_ap_mem_write(ap, FLASH_CR, FLASH_CR_MER);
adiv5_ap_mem_write(ap, FLASH_CR, FLASH_CR_STRT | FLASH_CR_MER);
/* Read FLASH_SR to poll for BSY bit */
while(adiv5_ap_mem_read(ap, FLASH_SR) & FLASH_SR_BSY)
if(target_check_error(t))
return false;
/* Check for error */
uint16_t sr = adiv5_ap_mem_read(ap, FLASH_SR);
if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP))
return false;
return true;
}
