/**
* \brief Test slow clock source switching.
*
* This test switches the slow clock on the crystal oscillator output.
*
* \param test Current test case.
*/
static void run_supc_test(const struct test_case *test)
{
uint32_t status = 0;
uint32_t timeout = 0;
/* Test: Switch the slow clock on the crystal oscillator output */
supc_switch_sclk_to_32kxtal(SUPC, 0);
do {
status = supc_get_status(SUPC);
if (status & SUPC_SR_OSCSEL_CRYST) break;
} while (timeout++ < SLOW_CLK_TIMEOUT);
test_assert_true(test, (status & SUPC_SR_OSCSEL_CRYST) == SUPC_SR_OSCSEL_CRYST, "Test: switching slow clock source failed!");
}
void board_init(void)
{
#ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT
/* Disable the watchdog */
WDT->WDT_MR = WDT_MR_WDDIS;
#endif
/* Select the crystal oscillator to be the source of the slow clock,
* as it provides a more accurate frequency
*/
#ifdef CONF_BOARD_32K_XTAL
supc_switch_sclk_to_32kxtal(SUPC, 0);
#endif
/* GPIO has been deprecated, the old code just keeps it for compatibility.
* In new designs IOPORT is used instead.
* Here IOPORT must be initialized for others to use before setting up IO.
*/
ioport_init();
/* Configure the pins connected to LEDs as output and set their
* default initial state to high (LEDs off).
*/
ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL);
ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL);
/* Configure SPI pins */
ioport_set_pin_peripheral_mode(SPI0_MISO_GPIO, SPI0_MISO_FLAGS);
ioport_set_pin_peripheral_mode(SPI0_MOSI_GPIO, SPI0_MOSI_FLAGS);
ioport_set_pin_peripheral_mode(SPI0_SPCK_GPIO, SPI0_SPCK_FLAGS);
ioport_set_pin_peripheral_mode(SPI0_NPCS0_GPIO, SPI0_NPCS0_FLAGS);
/* Configure UART0 pins */
#ifdef CONF_BOARD_UART0
ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0, PINS_UART0_FLAGS);
#endif
/* Configure UART1 pins */
#if defined(CONF_BOARD_UART1) || defined(CONF_BOARD_UART_CONSOLE)
ioport_set_port_peripheral_mode(PINS_UART1_PORT, PINS_UART1, PINS_UART1_FLAGS);
#endif
#ifdef CONF_BOARD_SPI1
ioport_set_pin_peripheral_mode(SPI1_MISO_GPIO, SPI1_MISO_FLAGS);
ioport_set_pin_peripheral_mode(SPI1_MOSI_GPIO, SPI1_MOSI_FLAGS);
ioport_set_pin_peripheral_mode(SPI1_SPCK_GPIO, SPI1_SPCK_FLAGS);
ioport_set_pin_peripheral_mode(SPI1_NPCS0_GPIO, SPI1_NPCS0_FLAGS);
#endif
/* Configure TWI pins */
#ifdef CONF_BOARD_TWI0
ioport_set_pin_peripheral_mode(TWIO_DATA_GPIO, TWIO_DATA_FLAG);
ioport_set_pin_peripheral_mode(TWIO_CLK_GPIO, TWIO_CLK_FLAG);
#endif
/* Configure USART0 pins */
#ifdef CONF_BOARD_USART0_RXD
/* Configure USART0 RXD pin */
ioport_set_pin_peripheral_mode(PIN_USART0_RXD_IDX,
PIN_USART0_RXD_FLAGS);
#endif
#ifdef CONF_BOARD_USART0_TXD
/* Configure USART0 TXD pin */
ioport_set_pin_peripheral_mode(PIN_USART0_TXD_IDX,
PIN_USART0_TXD_FLAGS);
#endif
/* Configure USART1 pins */
#ifdef CONF_BOARD_USART1_RXD
/* Configure USART1 RXD pin */
ioport_set_pin_peripheral_mode(PIN_USART1_RXD_IDX,
PIN_USART1_RXD_FLAGS);
#endif
#ifdef CONF_BOARD_USART1_TXD
/* Configure USART1 TXD pin */
ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX,
PIN_USART1_TXD_FLAGS);
#endif
#ifdef CONF_BOARD_USART1_SCK
/* Configure USART1 SCK pin */
ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX,
PIN_USART1_SCK_FLAGS);
#endif
#ifdef CONF_BOARD_USART1_RTS
/* Configure USART1 RTS pin */
ioport_set_pin_peripheral_mode(PIN_USART1_RTS_IDX,
PIN_USART1_RTS_FLAGS);
#endif
/* Configure Xplain PRO SLP pin */
#ifdef CONF_BOARD_XP_SLP
ioport_set_pin_dir(XP_SLP_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(XP_SLP_GPIO, XP_SLP_INACTIVE_LEVEL);
#endif
/* Configure USB Detect pin */
#ifdef CONF_BOARD_USB_DETECT
ioport_set_pin_input_mode(GPIO_USB_DETECT, GPIO_USB_DETECT_FLAGS,
GPIO_USB_DETECT_SENSE);
#endif
/* Configure Shutdown Detect pin */
#ifdef CONF_SHUTDOWN_DETECT
ioport_set_pin_dir(SHUTDOWN_GPIO, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(SHUTDOWN_GPIO, SHUTDOWN_INACTIVE_LEVEL);
#endif
}
