void SMP::enter() {
while(sample_buffer < sample_buffer_end) {
clock -= (int64_t)((double)(sample_buffer_end - sample_buffer) * 24.0 * 16.0 * tempo);
while(status.clock_speed != 2 && clock < 0) op_step();
if(status.clock_speed == 2) step(-clock);
synchronize_dsp();
}
}
void SMP::tick() {
timer0.tick();
timer1.tick();
timer2.tick();
clock += cycle_step_cpu;
dsp.clock -= 24;
synchronize_dsp();
}
void SMP::tick() {
timer0.tick();
timer1.tick();
timer2.tick();
#ifndef SNES9X
clock += cycle_step_cpu;
dsp.clock -= 24;
synchronize_dsp();
#else
clock++;
dsp.clock++;
#endif
}
void SMP::op_step() {
#define op_readpcfirst() op_read(regs.pc++,eCDLog_Flags_ExecFirst)
#define op_readpc() op_read(regs.pc++,eCDLog_Flags_ExecOperand)
#define op_readdp(addr) op_read((regs.p.p << 8) + addr,eCDLog_Flags_CPUData)
#define op_writedp(addr, data) op_write((regs.p.p << 8) + addr, data)
#define op_readaddr(addr) op_read(addr,eCDLog_Flags_CPUData)
#define op_writeaddr(addr, data) op_write(addr, data)
#define op_readstack() op_read(0x0100 | ++regs.sp,eCDLog_Flags_CPUData)
#define op_writestack(data) op_write(0x0100 | regs.sp--, data)
#if defined(CYCLE_ACCURATE)
if(opcode_cycle == 0) {
opcode_number = op_readpcfirst();
opcode_cycle++;
} else switch(opcode_number) {
#include "core/opcycle_misc.cpp"
#include "core/opcycle_mov.cpp"
#include "core/opcycle_pc.cpp"
#include "core/opcycle_read.cpp"
#include "core/opcycle_rmw.cpp"
}
#else
unsigned opcode = op_readpcfirst();
switch(opcode) {
#include "core/op_misc.cpp"
#include "core/op_mov.cpp"
#include "core/op_pc.cpp"
#include "core/op_read.cpp"
#include "core/op_rmw.cpp"
}
//TODO: untaken branches should consume less cycles
timer0.tick(cycle_count_table[opcode]);
timer1.tick(cycle_count_table[opcode]);
timer2.tick(cycle_count_table[opcode]);
clock += cycle_table_cpu[opcode];
dsp.clock -= cycle_table_dsp[opcode];
synchronize_dsp();
#endif
}
void SMP::add_clocks(unsigned clocks) {
step(clocks);
synchronize_dsp();
#if defined(DEBUGGER)
#error -DDEBUGGER SMP runtosave() correctness not checked
synchronize_cpu();
#else
//forcefully sync S-SMP to S-CPU in case chips are not communicating
//sync if S-SMP is more than 24 samples ahead of S-CPU
/*
our new smp design guarantees that there is at most one required synchronize_cpu() per uop,
inside an op_busread() or op_buswrite(). this extra synchronize can cause problems if we
swap out of the SMP at the beginning of a uop with an add_clocks() call when there is an
important op_busread() / op_buswrite() later on. the SMP will need to finish that uop in
order to reach a savable state, but it might never get to do so until it's too late (ie,
scheduler.sync == Scheduler.SynchronizeMode::All). so we remove this call and instead
do catchup sync in the main Enter() loop.
*/
//if(clock > +(768 * 24 * (int64)24000000)) synchronize_cpu();
#endif
}
void SMP::op_step() {
#define op_readpc() op_read(regs.pc++)
#define op_readdp(addr) op_read((regs.p.p << 8) + (addr & 0xff))
#define op_writedp(addr, data) op_write((regs.p.p << 8) + (addr & 0xff), data)
#define op_readaddr(addr) op_read(addr)
#define op_writeaddr(addr, data) op_write(addr, data)
#define op_readstack() op_read(0x0100 | ++regs.sp)
#define op_writestack(data) op_write(0x0100 | regs.sp--, data)
#if defined(CYCLE_ACCURATE)
#if defined(PSEUDO_CYCLE)
if(opcode_cycle == 0)
opcode_number = op_readpc();
switch(opcode_number) {
#include "core/oppseudo_misc.cpp"
#include "core/oppseudo_mov.cpp"
#include "core/oppseudo_pc.cpp"
#include "core/oppseudo_read.cpp"
#include "core/oppseudo_rmw.cpp"
}
#else
if(opcode_cycle == 0) {
opcode_number = op_readpc();
opcode_cycle++;
} else switch(opcode_number) {
#include "core/opcycle_misc.cpp"
#include "core/opcycle_mov.cpp"
#include "core/opcycle_pc.cpp"
#include "core/opcycle_read.cpp"
#include "core/opcycle_rmw.cpp"
}
#endif // defined(PSEUDO_CYCLE)
#else
unsigned opcode = op_readpc();
switch(opcode) {
#include "core/op_misc.cpp"
#include "core/op_mov.cpp"
#include "core/op_pc.cpp"
#include "core/op_read.cpp"
#include "core/op_rmw.cpp"
}
//TODO: untaken branches should consume less cycles
timer0.tick(cycle_count_table[opcode]);
timer1.tick(cycle_count_table[opcode]);
timer2.tick(cycle_count_table[opcode]);
#ifndef SNES9X
clock += cycle_table_cpu[opcode];
dsp.clock -= cycle_table_dsp[opcode];
synchronize_dsp();
#else
clock += cycle_count_table[opcode];
dsp.clock += cycle_count_table[opcode];
#endif
#endif // defined(CYCLE_ACCURATE)
}
