/**
* @brief Initialize spi interface and install interrupt callback function
* @return always 0.
* @retval 0 Success.
*/
int32_t spiInit(int32_t fd)
{
if(fd == 0)
{
sysInstallISR(IRQ_LEVEL_1, SPI0_IRQn, (PVOID)spi0ISR);
sysEnableInterrupt(SPI0_IRQn);
memset((void *)&spi_device[0], 0, sizeof(spi_dev));
}
else
{
sysInstallISR(IRQ_LEVEL_1, SPI1_IRQn, (PVOID)spi1ISR);
sysEnableInterrupt(SPI1_IRQn);
memset((void *)&spi_device[1], 0, sizeof(spi_dev));
}
sysSetLocalInterrupt(ENABLE_IRQ);
return(0);
}
/**
* @brief Install ISR.
* @param[in] fd is interface number.
* @return always 0.
* @retval 0 Success.
*/
int32_t i2cInit(int32_t fd)
{
if(fd == 0)
{
sysInstallISR(IRQ_LEVEL_1, I2C0_IRQn, (PVOID)i2c0ISR);
sysEnableInterrupt(I2C0_IRQn);
memset((void *)&i2c_device[0], 0, sizeof(i2c_dev));
}
else
{
sysInstallISR(IRQ_LEVEL_1, I2C1_IRQn, (PVOID)i2c1ISR);
sysEnableInterrupt(I2C1_IRQn);
memset((void *)&i2c_device[1], 0, sizeof(i2c_dev));
}
sysSetLocalInterrupt(ENABLE_IRQ);
return(0);
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main (void)
{
sysInitializeUART();
sysprintf("\n");
sysprintf("=========================\n");
sysprintf(" NUC970 USB VCOM \n");
sysprintf("=========================\n");
sysDisableCache();
sysInvalidCache();
sysSetMMUMappingMethod(MMU_DIRECT_MAPPING);
sysEnableCache(CACHE_WRITE_BACK);
sysInstallISR(HIGH_LEVEL_SENSITIVE|IRQ_LEVEL_1, USBD_IRQn, (PVOID)USBD_IRQHandler);
/* enable CPSR I bit */
sysSetLocalInterrupt(ENABLE_IRQ);
USBD_Open(&gsInfo, VCOM_ClassRequest, NULL);
/* Endpoint configuration */
VCOM_Init();
sysEnableInterrupt(USBD_IRQn);
/* Start transaction */
while(1) {
if (USBD_IS_ATTACHED()) {
USBD_Start();
break;
}
}
while(1) {
VCOM_TransferData();
}
}
INT w5691StartPlay(AU_CB_FUNC_T *fnCallBack, INT nSamplingRate,
INT nChannels, INT pcm_format)
{
UINT16 wTMV;
UINT8 byTMB = 0;
UINT8 byClockBase = 1;
UINT8 eFormat = eSPEECH_FORMAT_SIGN_16BIT_PCM;
INT nStatus;
UINT8 byStartSpchCmd[8] = { 0x03, 0x03, 0x00, 0x00, 0x00, 0x00 , 0x7f, 0x40 };//GFIFO start play command
if (_W5691_Playing)
return ERR_W5691_PLAY_ACTIVE;
if (_W5691_Playing == 0)
{
memset((CHAR *)&_tW5691, 0, sizeof(_tW5691));
nStatus = w5691_init();
if (nStatus < 0)
return nStatus;
}
#ifdef ECOS
cyg_interrupt_disable();
sysSetInterruptType(GPIO_INT_NUM, LOW_LEVEL_SENSITIVE);
cyg_interrupt_create(GPIO_INT_NUM, 1, 0, w5691_dma_isr, NULL,
&_tW5691.int_handle_play, &_tW5691.int_holder_play);
cyg_interrupt_attach(_tW5691.int_handle_play);
cyg_interrupt_unmask(AU_PLAY_INT_NUM);
cyg_interrupt_enable();
#else
sysSetInterruptType(GPIO_INT_NUM, LOW_LEVEL_SENSITIVE);
/* Install ISR */
sysInstallISR(IRQ_LEVEL_1, GPIO_INT_NUM, (PVOID)w5691_dma_isr);
/* enable CPSR I bit */
sysSetLocalInterrupt(ENABLE_IRQ);
/* Set AIC into SW mode */
// sysSetAIC2SWMode();
sysEnableInterrupt(GPIO_INT_NUM);
#endif
outpw(REG_GPIO_OE, inpw(REG_GPIO_OE) | (1<<USED_GPIO_NUM));
_tW5691.nPlaySamplingRate = nSamplingRate;
_tW5691.fnPlayCallBack = fnCallBack;
wTMV = (UINT16)(W5691_SYSTEM_CLOCK / _tW5691.nPlaySamplingRate) / byClockBase;
while(wTMV > 511)
{
byClockBase <<= 1;
wTMV >>= 1;
byTMB++;
}
byStartSpchCmd[2] = (UINT8)eFormat | eSPEECH_FCH_PFIFO ;
byStartSpchCmd[3] = (UINT8)(wTMV & 0xFF);
byStartSpchCmd[4] = (UINT8)(wTMV >> 8);
byStartSpchCmd[5] = byTMB;
/* call back to fill DMA buffer*/
_tW5691.bPlayLastBlock = _tW5691.fnPlayCallBack((UINT8 *)_uAuPlayBuffAddr,
Play_FIFO_Trigger_Length*2);
/* send PCM data to w5691*/
ComDrv_SendCommandWithData(eCOMMAND_SEND_SPEECH_DATA,
(UINT8 *)_uAuPlayBuffAddr, Play_FIFO_Trigger_Length*2);
ComDrv_SendCommand(eCOMMAND_ENABLE_SPEECH_INTERRUPT);
#ifdef SOFT_MODE
ComDrv_SendFIFOData(CMD_COM_ID_GEN_FIFO,byStartSpchCmd,6);
#else
outpw(REG_ACTL_M80SIZE, 6+1);
outpw(REG_ACTL_M80DATA0, 0x55 | byStartSpchCmd[0]<<8 | (byStartSpchCmd[1]<<16) | (byStartSpchCmd[2]<<24) );
outpw(REG_ACTL_M80DATA1, byStartSpchCmd[3] | (byStartSpchCmd[4]<<8) | (byStartSpchCmd[5]<<16));
outpw(REG_ACTL_M80ADDR, CMD_COM_ID_GEN_FIFO);
outpw(REG_ACTL_M80CON, inpw(REG_ACTL_M80CON) | W_GFIFO | W_IF12_ACT);
while((inpw(REG_ACTL_M80CON)&W_IF12_ACT) != 0);
outpw(REG_ACTL_M80CON, inpw(REG_ACTL_M80CON) & ~W_GFIFO );
ComDrv_SendSimpleCommand(CMD_COM_ID_WAKE_UP,WAKE_UP_REG_INT);
#endif
Delay(0x5000);
ComDrv_SetInterruptMask(1);
#ifdef SOFT_MODE
soft_read_status_flag_reg();
#else
ComDrv_DisableInterrupt();
#endif
ComDrv_EnableInterrupt();
_W5691_Playing=1;
return 0;
}
