int main(void)
{
test_atomic();
test_atomic_acquire();
test_atomic_release();
test_atomic_read();
test_atomic_write();
test_atomic_full();
test_atomic_release_write();
test_atomic_acquire_read();
test_atomic_dd_acquire_read();
# if defined(AO_HAVE_fetch_and_add1) && defined(AO_HAVE_fetch_and_sub1)
run_parallel(4, add1sub1_thr, add1sub1_test, "add1/sub1");
# endif
# if defined(AO_HAVE_store_release_write) && defined(AO_HAVE_load_acquire_read)
run_parallel(3, acqrel_thr, acqrel_test,
"store_release_write/load_acquire_read");
# endif
# if defined(AO_HAVE_test_and_set_acquire)
run_parallel(5, test_and_set_thr, test_and_set_test,
"test_and_set");
# endif
test_atomic_emulation();
return 0;
}
static __init int test_atomics(void)
{
test_atomic();
test_atomic64();
#ifdef CONFIG_X86
pr_info("passed for %s platform %s CX8 and %s SSE\n",
#ifdef CONFIG_X86_64
"x86-64",
#elif defined(CONFIG_X86_CMPXCHG64)
"i586+",
#else
"i386+",
#endif
boot_cpu_has(X86_FEATURE_CX8) ? "with" : "without",
boot_cpu_has(X86_FEATURE_XMM) ? "with" : "without");
#else
pr_info("passed\n");
#endif
return 0;
}
