void
omap4_pl310_init(platform_t plat, struct pl310_softc *sc)
{
uint32_t aux, prefetch;
aux = pl310_read4(sc, PL310_AUX_CTRL);
prefetch = pl310_read4(sc, PL310_PREFETCH_CTRL);
/*
* Disable instruction prefetch
*/
prefetch &= ~PREFETCH_CTRL_INSTR_PREFETCH;
aux &= ~AUX_CTRL_INSTR_PREFETCH;
// prefetch &= ~PREFETCH_CTRL_DATA_PREFETCH;
// aux &= ~AUX_CTRL_DATA_PREFETCH;
/*
* Make sure data prefetch is on
*/
prefetch |= PREFETCH_CTRL_DATA_PREFETCH;
aux |= AUX_CTRL_DATA_PREFETCH;
/*
* TODO: add tunable for prefetch offset
* and experiment with performance
*/
ti_smc0(aux, 0, WRITE_AUXCTRL_REG);
ti_smc0(prefetch, 0, WRITE_PREFETCH_CTRL_REG);
}
void
platform_mp_start_ap(void)
{
bus_addr_t scu_addr;
if (bus_space_map(fdtbus_bs_tag, 0x48240000, 0x1000, 0, &scu_addr) != 0)
panic("Couldn't map the SCU\n");
/* Enable the SCU */
*(volatile unsigned int *)scu_addr |= 1;
//*(volatile unsigned int *)(scu_addr + 0x30) |= 1;
cpu_idcache_wbinv_all();
cpu_l2cache_wbinv_all();
ti_smc0(0x200, 0xfffffdff, MODIFY_AUX_CORE_0);
ti_smc0(pmap_kextract((vm_offset_t)mpentry), 0, WRITE_AUX_CORE_1);
armv7_sev();
bus_space_unmap(fdtbus_bs_tag, scu_addr, 0x1000);
}
void
omap4_pl310_write_debug(platform_t plat, struct pl310_softc *sc, uint32_t val)
{
ti_smc0(val, 0, L2CACHE_WRITE_DEBUG_REG);
}
void
omap4_pl310_write_ctrl(platform_t plat, struct pl310_softc *sc, uint32_t val)
{
ti_smc0(val, 0, L2CACHE_WRITE_CTRL_REG);
}
void
platform_init_pl310(struct pl310_softc *softc)
{
ti_smc0(1, 0, L2CACHE_ENABLE_L2);
}