void timer_setup(void)
{
/* Enable timer clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_TIM1EN);
/* Reset timer. */
timer_reset(TIM1);
/* Configure prescaler. */
timer_set_prescaler(TIM1, 160);
/* Configure PE11 (AF1: TIM1_CH2) (SYNC_IN). */
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPEEN);
gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
gpio_set_af(GPIOE, GPIO_AF1, GPIO11);
/* Configure input capture. */
timer_ic_disable(TIM1, TIM_IC2);
timer_ic_set_input(TIM1, TIM_IC2, TIM_IC_IN_TI2);
timer_ic_set_polarity(TIM1, TIM_IC2, TIM_IC_RISING);
timer_ic_set_prescaler(TIM1, TIM_IC2, TIM_IC_PSC_OFF);
timer_ic_set_filter(TIM1, TIM_IC2, TIM_IC_OFF);
timer_ic_enable(TIM1, TIM_IC2);
/* Enable counter. */
timer_enable_counter(TIM1);
/* Enable IRQs */
nvic_enable_irq(NVIC_TIM1_UP_TIM10_IRQ);
timer_enable_irq(TIM1, TIM_DIER_UIE);
nvic_enable_irq(NVIC_TIM1_CC_IRQ);
timer_enable_irq(TIM1, TIM_DIER_CC2IE);
}
static void platform_init_eventtimer() {
/* Set up TIM2 as 32bit clock */
timer_reset(TIM2);
timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(TIM2, 0xFFFFFFFF);
timer_set_prescaler(TIM2, 0);
timer_disable_preload(TIM2);
timer_continuous_mode(TIM2);
/* Setup output compare registers */
timer_disable_oc_output(TIM2, TIM_OC1);
timer_disable_oc_output(TIM2, TIM_OC2);
timer_disable_oc_output(TIM2, TIM_OC3);
timer_disable_oc_output(TIM2, TIM_OC4);
timer_disable_oc_clear(TIM2, TIM_OC1);
timer_disable_oc_preload(TIM2, TIM_OC1);
timer_set_oc_slow_mode(TIM2, TIM_OC1);
timer_set_oc_mode(TIM2, TIM_OC1, TIM_OCM_FROZEN);
/* Setup input captures for CH2-4 Triggers */
gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO3);
gpio_set_af(GPIOB, GPIO_AF1, GPIO3);
timer_ic_set_input(TIM2, TIM_IC2, TIM_IC_IN_TI2);
timer_ic_set_filter(TIM2, TIM_IC2, TIM_IC_CK_INT_N_2);
timer_ic_set_polarity(TIM2, TIM_IC2, TIM_IC_FALLING);
timer_ic_enable(TIM2, TIM_IC2);
gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO10);
gpio_set_af(GPIOB, GPIO_AF1, GPIO10);
timer_ic_set_input(TIM2, TIM_IC3, TIM_IC_IN_TI3);
timer_ic_set_filter(TIM2, TIM_IC3, TIM_IC_CK_INT_N_2);
timer_ic_set_polarity(TIM2, TIM_IC3, TIM_IC_FALLING);
timer_ic_enable(TIM2, TIM_IC3);
gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
gpio_set_af(GPIOB, GPIO_AF1, GPIO11);
timer_ic_set_input(TIM2, TIM_IC4, TIM_IC_IN_TI4);
timer_ic_set_filter(TIM2, TIM_IC4, TIM_IC_CK_INT_N_2);
timer_ic_set_polarity(TIM2, TIM_IC4, TIM_IC_FALLING);
timer_ic_enable(TIM2, TIM_IC4);
timer_enable_counter(TIM2);
timer_enable_irq(TIM2, TIM_DIER_CC2IE);
timer_enable_irq(TIM2, TIM_DIER_CC3IE);
timer_enable_irq(TIM2, TIM_DIER_CC4IE);
nvic_enable_irq(NVIC_TIM2_IRQ);
nvic_set_priority(NVIC_TIM2_IRQ, 0);
}
void ppm_arch_init ( void ) {
/* timer clock enable */
rcc_peripheral_enable_clock(PPM_RCC, PPM_PERIPHERAL);
/* GPIOA clock enable */
rcc_peripheral_enable_clock(&RCC_APB2ENR, PPM_GPIO_PERIPHERAL);
/* timer gpio configuration */
gpio_set_mode(PPM_GPIO_PORT, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT, PPM_GPIO_PIN);
/* Time Base configuration */
timer_reset(PPM_TIMER);
timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(PPM_TIMER, 0xFFFF);
/* run ppm timer at cpu freq / 9 = 8MHz */
timer_set_prescaler(PPM_TIMER, 8);
/* TIM configuration: Input Capture mode ---------------------
The Rising edge is used as active edge,
Intput pin is either PA1 or PA10
------------------------------------------------------------ */
#if defined PPM_PULSE_TYPE && PPM_PULSE_TYPE == PPM_PULSE_TYPE_POSITIVE
timer_ic_set_polarity(PPM_TIMER, PPM_CHANNEL, TIM_IC_RISING);
#elif defined PPM_PULSE_TYPE && PPM_PULSE_TYPE == PPM_PULSE_TYPE_NEGATIVE
timer_ic_set_polarity(PPM_TIMER, PPM_CHANNEL, TIM_IC_FALLING);
#else
#error "Unknown PM_PULSE_TYPE"
#endif
timer_ic_set_input(PPM_TIMER, PPM_CHANNEL, PPM_TIMER_INPUT);
timer_ic_set_prescaler(PPM_TIMER, PPM_CHANNEL, TIM_IC_PSC_OFF);
timer_ic_set_filter(PPM_TIMER, PPM_CHANNEL, TIM_IC_OFF);
/* Enable timer Interrupt(s). */
nvic_set_priority(PPM_IRQ, 2);
nvic_enable_irq(PPM_IRQ);
#ifdef PPM_IRQ2
nvic_set_priority(PPM_IRQ2, 2);
nvic_enable_irq(PPM_IRQ2);
#endif
/* Enable the CC2 and Update interrupt requests. */
timer_enable_irq(PPM_TIMER, PPM_IRQ_FLAGS);
/* Enable capture channel. */
timer_ic_enable(PPM_TIMER, PPM_CHANNEL);
/* TIM enable counter */
timer_enable_counter(PPM_TIMER);
ppm_last_pulse_time = 0;
ppm_cur_pulse = RADIO_CONTROL_NB_CHANNEL;
timer_rollover_cnt = 0;
}
void ppm_arch_init ( void ) {
/* timer clock enable */
rcc_peripheral_enable_clock(PPM_RCC, PPM_PERIPHERAL);
/* GPIO clock enable */
gpio_enable_clock(PPM_GPIO_PORT);
/* timer gpio configuration */
gpio_setup_pin_af(PPM_GPIO_PORT, PPM_GPIO_PIN, PPM_GPIO_AF, FALSE);
/* Time Base configuration */
timer_reset(PPM_TIMER);
timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(PPM_TIMER, 0xFFFF);
timer_set_prescaler(PPM_TIMER, (PPM_TIMER_CLK / (RC_PPM_TICKS_PER_USEC*ONE_MHZ_CLK)) - 1);
/* TIM configuration: Input Capture mode ---------------------
The Rising edge is used as active edge
------------------------------------------------------------ */
#if defined PPM_PULSE_TYPE && PPM_PULSE_TYPE == PPM_PULSE_TYPE_POSITIVE
timer_ic_set_polarity(PPM_TIMER, PPM_CHANNEL, TIM_IC_RISING);
#elif defined PPM_PULSE_TYPE && PPM_PULSE_TYPE == PPM_PULSE_TYPE_NEGATIVE
timer_ic_set_polarity(PPM_TIMER, PPM_CHANNEL, TIM_IC_FALLING);
#else
#error "Unknown PPM_PULSE_TYPE"
#endif
timer_ic_set_input(PPM_TIMER, PPM_CHANNEL, PPM_TIMER_INPUT);
timer_ic_set_prescaler(PPM_TIMER, PPM_CHANNEL, TIM_IC_PSC_OFF);
timer_ic_set_filter(PPM_TIMER, PPM_CHANNEL, TIM_IC_OFF);
/* Enable timer Interrupt(s). */
nvic_set_priority(PPM_IRQ, 2);
nvic_enable_irq(PPM_IRQ);
#ifdef PPM_IRQ2
nvic_set_priority(PPM_IRQ2, 2);
nvic_enable_irq(PPM_IRQ2);
#endif
/* Enable the Capture/Compare and Update interrupt requests. */
timer_enable_irq(PPM_TIMER, (PPM_CC_IE | TIM_DIER_UIE));
/* Enable capture channel. */
timer_ic_enable(PPM_TIMER, PPM_CHANNEL);
/* TIM enable counter */
timer_enable_counter(PPM_TIMER);
ppm_last_pulse_time = 0;
ppm_cur_pulse = RADIO_CONTROL_NB_CHANNEL;
timer_rollover_cnt = 0;
}
void ppm_arch_init ( void ) {
/* timer clock enable */
rcc_peripheral_enable_clock(PPM_RCC, PPM_PERIPHERAL);
/* GPIOA clock enable */
rcc_peripheral_enable_clock(&RCC_APB2ENR, PPM_GPIO_PERIPHERAL);
/* timer gpio configuration */
gpio_set_mode(PPM_GPIO_PORT, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_FLOAT, PPM_GPIO_PIN);
/* Time Base configuration */
timer_reset(PPM_TIMER);
timer_set_mode(PPM_TIMER, TIM_CR1_CKD_CK_INT,
TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(PPM_TIMER, 0xFFFF);
timer_set_prescaler(PPM_TIMER, 0x8);
/* TIM2 configuration: Input Capture mode ---------------------
The external signal is connected to TIM2 CH2 pin (PA.01)
The Rising edge is used as active edge,
------------------------------------------------------------ */
timer_ic_set_polarity(PPM_TIMER, PPM_CHANNEL, TIM_IC_RISING);
timer_ic_set_input(PPM_TIMER, PPM_CHANNEL, PPM_TIMER_INPUT);
timer_ic_set_prescaler(PPM_TIMER, PPM_CHANNEL, TIM_IC_PSC_OFF);
timer_ic_set_filter(PPM_TIMER, PPM_CHANNEL, TIM_IC_OFF);
/* Enable timer Interrupt(s). */
nvic_set_priority(PPM_IRQ, 2);
nvic_enable_irq(PPM_IRQ);
#ifdef PPM_IRQ2
nvic_set_priority(PPM_IRQ2, 2);
nvic_enable_irq(PPM_IRQ2);
#endif
/* Enable the CC2 and Update interrupt requests. */
timer_enable_irq(PPM_TIMER, PPM_IRQ_FLAGS);
/* Enable capture channel. */
timer_ic_enable(PPM_TIMER, PPM_CHANNEL);
/* TIM2 enable counter */
timer_enable_counter(PPM_TIMER);
ppm_last_pulse_time = 0;
ppm_cur_pulse = RADIO_CONTROL_NB_CHANNEL;
timer_rollover_cnt = 0;
}
void freq_capture_setup(void) {
/* Configure PE11 (AF1: TIM1_CH2) (SYNC_IN). */
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPEEN);
gpio_mode_setup(GPIOE, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO11);
gpio_set_af(GPIOE, GPIO_AF1, GPIO11);
/* Timer1: Input compare */
/* Enable timer clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_TIM1EN);
/* Reset timer. */
timer_reset(TIM1);
/* Configure timer1. */
timer_set_mode(TIM1,
TIM_CR1_CKD_CK_INT, // Internal clock
TIM_CR1_CMS_EDGE, // Edge synchronization
TIM_CR1_DIR_UP); // Count upward
timer_set_prescaler(TIM1, TIMER1_PRESCALER);
timer_set_period(TIM1, TIMER1_PERIOD); //Sets TIM1_ARR
timer_continuous_mode(TIM1);
/* Configure PE13: Toggle pin on falling edge via interrupt */
//rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPEEN);
//gpio_mode_setup(GPIOE, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLDOWN, GPIO13);
/* Configure input capture. */
timer_ic_disable(TIM1, TIM_IC2);
timer_ic_set_polarity(TIM1, TIM_IC2, TIM_IC_RISING);
timer_ic_set_prescaler(TIM1, TIM_IC2, TIM_IC_PSC_OFF);
timer_ic_set_input(TIM1, TIM_IC2, TIM_IC_IN_TI2);
// See RM, p. 561: digital filter
//timer_ic_set_filter(TIM1, TIM_IC2, TIM_IC_DTF_DIV_32_N_8);
timer_ic_set_filter(TIM1, TIM_IC2, TIM_IC_OFF);
timer_ic_enable(TIM1, TIM_IC2);
/* Enable counter. */
timer_enable_counter(TIM1);
timer_clear_flag (TIM1, TIM_SR_CC2IF);
/* Enable IRQs */
nvic_enable_irq(NVIC_TIM1_UP_TIM10_IRQ);
timer_enable_irq(TIM1, TIM_DIER_UIE);
nvic_enable_irq(NVIC_TIM1_CC_IRQ);
timer_enable_irq(TIM1, TIM_DIER_CC2IE);
}
static void platform_init_freqsensor(unsigned char pin) {
uint32_t tim;
switch(pin) {
case 1:
/* TIM1 CH1 */
tim = TIM1;
gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8);
gpio_set_af(GPIOA, GPIO_AF1, GPIO8);
break;
};
timer_reset(tim);
timer_set_mode(tim, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_period(tim, 0xFFFFFFFF);
timer_disable_preload(tim);
timer_continuous_mode(tim);
/* Setup output compare registers */
timer_disable_oc_output(tim, TIM_OC1);
timer_disable_oc_output(tim, TIM_OC2);
timer_disable_oc_output(tim, TIM_OC3);
timer_disable_oc_output(tim, TIM_OC4);
/* Set up compare */
timer_ic_set_input(tim, TIM_IC1, TIM_IC_IN_TI1);
timer_ic_set_filter(tim, TIM_IC1, TIM_IC_CK_INT_N_8);
timer_ic_set_polarity(tim, TIM_IC1, TIM_IC_RISING);
timer_set_prescaler(tim, 2*SENSOR_FREQ_DIVIDER); /* Prescale set to map up to 20kHz */
timer_slave_set_mode(tim, TIM_SMCR_SMS_RM);
timer_slave_set_trigger(tim, TIM_SMCR_TS_IT1FP1);
timer_ic_enable(tim, TIM_IC1);
timer_enable_counter(tim);
timer_enable_irq(tim, TIM_DIER_CC1IE);
switch(pin) {
case 1:
nvic_enable_irq(NVIC_TIM1_CC_IRQ);
nvic_set_priority(NVIC_TIM1_CC_IRQ, 64);
break;
}
}
void pwm_input_init(void)
{
int i;
// initialize the arrays to 0
for (i = 0; i < PWM_INPUT_NB; i++) {
pwm_input_duty_tics[i] = 0;
pwm_input_duty_valid[i] = 0;
pwm_input_period_tics[i] = 0;
pwm_input_period_valid[i] = 0;
}
/** Configure timers
* - timer clock enable
* - base configuration
* - enable counter
*/
#if USE_PWM_INPUT_TIM1
rcc_periph_clock_enable(RCC_TIM1);
pwm_input_set_timer(TIM1, PWM_INPUT_TIM1_TICKS_PER_USEC);
#endif
#if USE_PWM_INPUT_TIM2
rcc_periph_clock_enable(RCC_TIM2);
pwm_input_set_timer(TIM2, PWM_INPUT_TIM2_TICKS_PER_USEC);
#endif
#if USE_PWM_INPUT_TIM3
rcc_periph_clock_enable(RCC_TIM3);
pwm_input_set_timer(TIM3, PWM_INPUT_TIM3_TICKS_PER_USEC);
#endif
#if USE_PWM_INPUT_TIM5
rcc_periph_clock_enable(RCC_TIM5);
pwm_input_set_timer(TIM5, PWM_INPUT_TIM5_TICKS_PER_USEC);
#endif
#if USE_PWM_INPUT_TIM8
rcc_periph_clock_enable(RCC_TIM8);
pwm_input_set_timer(TIM8, PWM_INPUT_TIM8_TICKS_PER_USEC);
#endif
#if USE_PWM_INPUT_TIM9
rcc_periph_clock_enable(RCC_TIM9);
pwm_input_set_timer(TIM9, PWM_INPUT_TIM9_TICKS_PER_USEC);
#endif
#ifdef USE_PWM_INPUT1
/* GPIO configuration as input capture for timer */
gpio_setup_pin_af(PWM_INPUT1_GPIO_PORT, PWM_INPUT1_GPIO_PIN, PWM_INPUT1_GPIO_AF, FALSE);
/** TIM configuration: Input Capture mode
* Two IC signals are mapped to the same TI input
*/
timer_ic_set_input(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_PERIOD, PWM_INPUT1_TIMER_INPUT);
timer_ic_set_input(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_DUTY, PWM_INPUT1_TIMER_INPUT);
#if USE_PWM_INPUT1 == PWM_PULSE_TYPE_ACTIVE_LOW
timer_ic_set_polarity(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_PERIOD, TIM_IC_RISING);
timer_ic_set_polarity(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_DUTY, TIM_IC_FALLING);
#elif USE_PWM_INPUT1 == PWM_PULSE_TYPE_ACTIVE_HIGH
timer_ic_set_polarity(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_PERIOD, TIM_IC_FALLING);
timer_ic_set_polarity(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_DUTY, TIM_IC_RISING);
#endif
/* Select the valid trigger input */
timer_slave_set_trigger(PWM_INPUT1_TIMER, PWM_INPUT1_SLAVE_TRIG);
/* Configure the slave mode controller in reset mode */
timer_slave_set_mode(PWM_INPUT1_TIMER, TIM_SMCR_SMS_RM);
/* Enable timer Interrupt(s). */
nvic_set_priority(PWM_INPUT1_IRQ, PWM_INPUT_IRQ_PRIO);
nvic_enable_irq(PWM_INPUT1_IRQ);
#ifdef PWM_INPUT1_IRQ2
nvic_set_priority(PWM_INPUT1_IRQ2, PWM_INPUT_IRQ_PRIO);
nvic_enable_irq(PWM_INPUT1_IRQ2);
#endif
/* Enable the Capture/Compare and Update interrupt requests. */
timer_enable_irq(PWM_INPUT1_TIMER, (PWM_INPUT1_CC_IE | TIM_DIER_UIE));
/* Enable capture channel. */
timer_ic_enable(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_PERIOD);
timer_ic_enable(PWM_INPUT1_TIMER, PWM_INPUT1_CHANNEL_DUTY);
#endif
#ifdef USE_PWM_INPUT2
/* GPIO configuration as input capture for timer */
gpio_setup_pin_af(PWM_INPUT2_GPIO_PORT, PWM_INPUT2_GPIO_PIN, PWM_INPUT2_GPIO_AF, FALSE);
/** TIM configuration: Input Capture mode
* Two IC signals are mapped to the same TI input
*/
timer_ic_set_input(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_PERIOD, PWM_INPUT2_TIMER_INPUT);
timer_ic_set_input(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_DUTY, PWM_INPUT2_TIMER_INPUT);
#if USE_PWM_INPUT2 == PWM_PULSE_TYPE_ACTIVE_LOW
timer_ic_set_polarity(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_PERIOD, TIM_IC_RISING);
timer_ic_set_polarity(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_DUTY, TIM_IC_FALLING);
#elif USE_PWM_INPUT2 == PWM_PULSE_TYPE_ACTIVE_HIGH
timer_ic_set_polarity(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_PERIOD, TIM_IC_FALLING);
timer_ic_set_polarity(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_DUTY, TIM_IC_RISING);
#endif
/* Select the valid trigger input */
timer_slave_set_trigger(PWM_INPUT2_TIMER, PWM_INPUT2_SLAVE_TRIG);
/* Configure the slave mode controller in reset mode */
timer_slave_set_mode(PWM_INPUT2_TIMER, TIM_SMCR_SMS_RM);
/* Enable timer Interrupt(s). */
nvic_set_priority(PWM_INPUT2_IRQ, PWM_INPUT_IRQ_PRIO);
nvic_enable_irq(PWM_INPUT2_IRQ);
#ifdef PWM_INPUT2_IRQ2
nvic_set_priority(PWM_INPUT2_IRQ2, PWM_INPUT_IRQ_PRIO);
nvic_enable_irq(PWM_INPUT2_IRQ2);
#endif
/* Enable the Capture/Compare and Update interrupt requests. */
timer_enable_irq(PWM_INPUT2_TIMER, (PWM_INPUT2_CC_IE | TIM_DIER_UIE));
/* Enable capture channel. */
timer_ic_enable(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_PERIOD);
timer_ic_enable(PWM_INPUT2_TIMER, PWM_INPUT2_CHANNEL_DUTY);
#endif
}
static void tim_setup(void) {
/* Enable TIM1 clock. */
rcc_periph_clock_enable(RCC_TIM1);
/* Configure TIM1_CH1 and TIM1_CH2 as inputs */
gpio_set_mode(GPIO_BANK_TIM1_CH1, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_TIM1_CH1);
gpio_set_mode(GPIO_BANK_TIM1_CH2, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_TIM1_CH2);
/* Enable TIM1 interrupt. */
nvic_enable_irq(NVIC_TIM1_CC_IRQ);
/* Reset TIM1 peripheral. */
/* timer_reset(TIM1); */
timer_set_mode(TIM1, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
/* set prescaler value -> 1us */
timer_set_prescaler(TIM1, 72 - 1);
timer_set_period(TIM1, 0xFFFF);
timer_set_repetition_counter(TIM1, 0);
/* Enable preload */
/* timer_disable_preload(TIM1); */
/* Continous mode */
timer_continuous_mode(TIM1);
/* configure Channel 1 */
timer_ic_set_input(TIM1, TIM_IC1, TIM_IC_IN_TI1);
timer_ic_set_filter(TIM1, TIM_IC1, TIM_IC_OFF);
timer_ic_set_polarity(TIM1, TIM_IC1, TIM_IC_RISING);
timer_ic_set_prescaler(TIM1, TIM_IC1, TIM_IC_PSC_OFF);
timer_ic_enable(TIM1, TIM_IC1);
timer_clear_flag(TIM1, TIM_SR_CC1IF);
timer_enable_irq(TIM1, TIM_DIER_CC1IE);
/* configure Channel 2 */
timer_ic_set_input(TIM1, TIM_IC2, TIM_IC_IN_TI2);
timer_ic_set_filter(TIM1, TIM_IC2, TIM_IC_OFF);
timer_ic_set_polarity(TIM1, TIM_IC2, TIM_IC_RISING);
timer_ic_set_prescaler(TIM1, TIM_IC2, TIM_IC_PSC_OFF);
timer_ic_enable(TIM1, TIM_IC2);
timer_clear_flag(TIM1, TIM_SR_CC2IF);
timer_enable_irq(TIM1, TIM_DIER_CC2IE);
timer_enable_counter(TIM1);
#if 0
/* Disable outputs. */
timer_disable_oc_output(TIM1, TIM_OC1);
timer_disable_oc_output(TIM1, TIM_OC2);
timer_disable_oc_output(TIM1, TIM_OC3);
timer_disable_oc_output(TIM1, TIM_OC4);
/* -- OC1 configuration -- */
/* Configure global mode of line 1. */
timer_disable_oc_clear(TIM1, TIM_OC1);
timer_disable_oc_preload(TIM1, TIM_OC1);
timer_set_oc_slow_mode(TIM1, TIM_OC1);
timer_set_oc_mode(TIM1, TIM_OC1, TIM_OCM_FROZEN);
/* Set the capture compare value for OC1. */
timer_set_oc_value(TIM1, TIM_OC1, 1000);
/* ---- */
/* ARR reload enable. */
timer_disable_preload(TIM1);
/* Counter enable. */
timer_enable_counter(TIM1);
/* Enable commutation interrupt. */
timer_enable_irq(TIM1, TIM_DIER_CC1IE);
#endif
}
