static void pet_common_driver_init (void) { int i; /* BIG HACK; need to phase out this retarded memory management */ if (!pet_memory) pet_memory = mess_ram; memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, 0x0000, mess_ram_size - 1, 0, 0, MRA8_BANK10); memory_install_write8_handler(0, ADDRESS_SPACE_PROGRAM, 0x0000, mess_ram_size - 1, 0, 0, MWA8_BANK10); memory_set_bankptr(10, pet_memory); if (mess_ram_size < 0x8000) { memory_install_read8_handler(0, ADDRESS_SPACE_PROGRAM, mess_ram_size, 0x7FFF, 0, 0, MRA8_NOP); memory_install_write8_handler(0, ADDRESS_SPACE_PROGRAM, mess_ram_size, 0x7FFF, 0, 0, MWA8_NOP); } /* 2114 poweron ? 64 x 0xff, 64x 0, and so on */ for (i = 0; i < mess_ram_size; i += 0x40) { memset (pet_memory + i, i & 0x40 ? 0 : 0xff, 0x40); } /* pet clock */ timer_pulse(0.01, 0, pet_interrupt); via_config(0,&pet_via); pia_config(0,PIA_STANDARD_ORDERING,&pet_pia0); pia_config(1,PIA_STANDARD_ORDERING,&pet_pia1); cbm_ieee_open(); }
ROM_END /*------------------------------------------------- device start callback -------------------------------------------------*/ static DEVICE_START( namco_52xx ) { namco_52xx_interface *intf = (namco_52xx_interface *)device->baseconfig().static_config; namco_52xx_state *state = get_safe_token(device); astring tempstring; /* find our CPU */ state->cpu = device->subdevice("mcu"); assert(state->cpu != NULL); /* find the attached discrete sound device */ assert(intf->discrete != NULL); state->discrete = devtag_get_device(device->machine, intf->discrete); assert(state->discrete != NULL); state->basenode = intf->firstnode; /* resolve our read/write callbacks */ devcb_resolve_read8(&state->romread, &intf->romread, device); devcb_resolve_read8(&state->si, &intf->si, device); /* start the external clock */ if (intf->extclock != 0) timer_pulse(device->machine, attotime_make(0, intf->extclock), (void *)device, 0, external_clock_pulse); }
void Dave_Init(void) { int i; //logerror("dave init\n"); Dave_reset(); /* temp! */ nick_virq = 0; /* initialise 1khz timer */ dave.int_latch = 0; dave.int_input = 0; dave.int_enable = 0; dave.timer_irq = 0; dave.fifty_hz_state = 0; dave.one_khz_state = 0; dave.fifty_hz_count = DAVE_FIFTY_HZ_COUNTER_RELOAD; dave.one_hz_count = DAVE_ONE_HZ_COUNTER_RELOAD; timer_pulse(TIME_IN_HZ(1000), 0, dave_1khz_callback); for (i=0; i<3; i++) { dave.Period[i] = ((STEP * Machine->sample_rate)/125000); dave.Count[i] = ((STEP * Machine->sample_rate)/125000); dave.level[i] = 0; } }
void digdug_customio_w(int offset,int data) { if (errorlog && data != 0x10 && data != 0x71) fprintf(errorlog,"%04x: custom IO command %02x\n",cpu_get_pc(),data); customio_command = data; switch (data) { case 0x10: if (nmi_timer) timer_remove (nmi_timer); nmi_timer = 0; return; case 0xa1: /* go into switch mode */ mode = 1; break; case 0xc1: case 0xe1: /* go into credit mode */ mode = 0; break; case 0xb1: /* status? */ credits = 0; /* this is a good time to reset the credits counter */ break; } nmi_timer = timer_pulse (TIME_IN_USEC (50), 0, digdug_nmi_generate); }
static int st300_sh_start(const struct MachineSound *msound) { int mixing_levels[3] = {30,30,30}; int i; int s = 0; memset(&st300loc, 0, sizeof(st300loc)); for (i = 0;i < 9;i++) { snddatst300.ax[i] = 0; snddatst300.axb[i] = 0; snddatst300.c0 = 0; } for (i = 0;i < 32000;i++) { s = (s ? 0 : 1); if (s) { sineWaveext[i] = rand(); } else sineWaveext[i] = 0-rand(); } st300loc.channel = mixer_allocate_channels(3, mixing_levels); mixer_set_name (st300loc.channel, "MC6840 #Q2"); // 6840 Output timer 2 (q2) is easy wave + volume from q3 mixer_set_volume(st300loc.channel,0); mixer_set_name (st300loc.channel+1, "MC6840 #Q1"); // 6840 Output timer 1 (q1) is easy wave + volume always 100 mixer_set_volume(st300loc.channel+1,70*ST300_VOL); mixer_set_name (st300loc.channel+2, "EXT TIM"); // External Timer (U10) is Noise geneartor + volume from q3 mixer_set_volume(st300loc.channel+2,0); timer_pulse(TIME_IN_HZ(ST300_INTCLOCK),0x02,st300_pulse); // start internal clock return 0; }
int TMS34061_start(struct TMS34061interface *interface) { intf = interface; /* Initialize registers to their default values from the manual */ regs[REG_HORENDSYNC] = 0x10; regs[REG_HORENDBLNK] = 0x20; regs[REG_HORSTARTBLNK] = 0x1f0; regs[REG_HORTOTAL] = 0x200; regs[REG_VERENDSYNC] = 0x04; regs[REG_VERENDBLNK] = 0x10; regs[REG_VERSTARTBLNK] = 0xf0; regs[REG_VERTOTAL] = 0x100; regs[REG_DISPUPDATE] = 0x00; regs[REG_DISPSTART] = 0x00; regs[REG_VERINT] = 0x00; regs[REG_CONTROL1] = 0x7000; regs[REG_CONTROL2] = 0x600; regs[REG_STATUS] = 0x00; regs[REG_XYOFFSET] = 0x10; regs[REG_XYADDRESS] = 0x00; regs[REG_DISPADDRESS] = 0x00; regs[REG_VERCOUNTER] = 0x00; /* Start vertical interrupt timer. */ timer = timer_pulse(TIME_IN_HZ (Machine->drv->frames_per_second), intf->cpu, TMS34061_intcallback); return !timer; }
static CPU_INIT( sc61860 ) { sc61860_state *cpustate = get_safe_token(device); cpustate->config = (sc61860_cpu_core *) device->static_config; timer_pulse(device->machine, ATTOTIME_IN_HZ(500), cpustate, 0, sc61860_2ms_tick); cpustate->device = device; cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM); }
void mc146818_init(MC146818_TYPE type) { mc146818 = auto_malloc(sizeof(*mc146818)); memset(mc146818, 0, sizeof(*mc146818)); mc146818->type = type; mc146818->last_refresh = timer_get_time(); timer_pulse(TIME_IN_HZ(1.0), 0, mc146818_timer); }
void sega_usb_reset(UINT8 t1_clock_mask) { /* halt the USB CPU at reset time */ cpunum_set_input_line(usb.cpunum, INPUT_LINE_RESET, ASSERT_LINE); /* start the clock timer */ timer_pulse(TIME_IN_HZ(USB_2MHZ_CLOCK / 256), 0, increment_t1_clock); usb.t1_clock_mask = t1_clock_mask; }
M1_BOARD_END /* KiKi KaiKai */ static void Kikikai_Init(long foo) { vblank_timer = timer_pulse(TIME_IN_HZ(60), 0, timer_callback); workram[0x1fff] = 0xff; }
static void berzerk_sh_start(void) { int i; berzerknoisemulate = 1; for (i = 0;i < 5;i++) { if (sample_loaded(i)) berzerknoisemulate = 0; } timer_pulse(TIME_IN_HZ(Machine->drv->frames_per_second), 0, berzerk_sh_update); }
int pc_turbo_setup(int cpunum, int port, int mask, double off_speed, double on_speed) { struct pc_turbo_info *ti; ti = auto_malloc(sizeof(struct pc_turbo_info)); ti->cpunum = cpunum; ti->port = port; ti->mask = mask; ti->cur_val = -1; ti->off_speed = off_speed; ti->on_speed = on_speed; timer_pulse(TIME_IN_SEC(0.1), (int) ti, pc_turbo_callback); return 0; }
void kbdc8042_init(running_machine *machine, const struct kbdc8042_interface *intf) { poll_delay = 10; memset(&kbdc8042, 0, sizeof(kbdc8042)); kbdc8042.type = intf->type; kbdc8042.set_gate_a20 = intf->set_gate_a20; kbdc8042.keyboard_interrupt = intf->keyboard_interrupt; kbdc8042.get_out2 = intf->get_out2; /* ibmat bios wants 0x20 set! (keyboard locked when not set) 0x80 */ kbdc8042.inport = 0xa0; at_8042_set_outport(machine, 0xfe, 1); timer_pulse(machine, ATTOTIME_IN_HZ(60), NULL, 0, kbdc8042_time); }
void *cchasm_sh_start(int clock, const struct CustomSound_interface *config) { sound_flags = 0; output[0] = 0; output[1] = 0; channel[0] = stream_create(0, 1, Machine->sample_rate, (void *)0, tone_update); channel[1] = stream_create(0, 1, Machine->sample_rate, (void *)1, tone_update); ctc_intf.baseclock[0] = Machine->drv->cpu[1].cpu_clock; z80ctc_init (&ctc_intf); timer_pulse(TIME_IN_HZ(Machine->drv->frames_per_second), 0, cchasm_sh_update); return auto_malloc(1); }
void z80ctc_trg_w (int which, int trg, int offset, int data) { z80ctc *ctc = ctcs + which; int ch = trg & 3; int mode; data = data ? 1 : 0; mode = ctc->mode[ch]; /* see if the trigger value has changed */ if (data != ctc->extclk[ch]) { ctc->extclk[ch] = data; /* see if this is the active edge of the trigger */ if (((mode & EDGE) == EDGE_RISING && data) || ((mode & EDGE) == EDGE_FALLING && !data)) { /* if we're waiting for a trigger, start the timer */ if ((mode & WAITING_FOR_TRIG) && (mode & MODE) == MODE_TIMER) { double clock = ((mode & PRESCALER) == PRESCALER_16) ? ctc->invclock16 : ctc->invclock256; if(errorlog) fprintf(errorlog,"CTC clock %f\n",1.0/clock); if (ctc->timer[ch]) timer_remove (ctc->timer[ch]); if (!(ctc->notimer & (1<<ch))) ctc->timer[ch] = timer_pulse (clock * (double)ctc->tconst[ch], (which << 2) + ch, z80ctc_timercallback); } /* we're no longer waiting */ ctc->mode[ch] &= ~WAITING_FOR_TRIG; /* if we're clocking externally, decrement the count */ if ((mode & MODE) == MODE_COUNTER) { ctc->down[ch]--; /* if we hit zero, do the same thing as for a timer interrupt */ if (!ctc->down[ch]) z80ctc_timercallback ((which << 2) + ch); } } } }
static MACHINE_RESET( firetrk ) { timer_pulse(1. / 60, 0, frame_callback); if (GAME_IS_MONTECARLO) { write_output(0); last_service = readinputport(6) & 0x04; set_firetrk_service(last_service); } else if (GAME_IS_FIRETRUCK) { last_service = readinputport(4) & 0x80; set_firetrk_service(last_service); } timer_set(0, 0, periodic_callback); }
static WRITE_HANDLER( common_sound_control_w ) { /* Bit 0 enables and starts NMI timer */ if (nmi_timer) { timer_remove(nmi_timer); nmi_timer = 0; } if (data & 0x01) { /* base clock is 250kHz divided by 256 */ double interval = TIME_IN_HZ(250000.0/256/(256-nmi_rate)); nmi_timer = timer_pulse(interval, 0, nmi_callback); } /* Bit 1 controls a LED on the sound board. I'm not emulating it */ }
static void cbmb_common_driver_init (void) { cbmb_chargen=memory_region(REGION_CPU1)+0x100000; /* memset(c64_memory, 0, 0xfd00); */ cia_config(0, &cbmb_cia); tpi6525[0].a.read=cbmb_tpi0_port_a_r; tpi6525[0].a.output=cbmb_tpi0_port_a_w; tpi6525[0].ca.output=cbmb_change_font; tpi6525[0].interrupt.output=cbmb_irq; tpi6525[1].a.read=cbmb_keyboard_line_a; tpi6525[1].b.read=cbmb_keyboard_line_b; tpi6525[1].c.read=cbmb_keyboard_line_c; tpi6525[1].a.output=cbmb_keyboard_line_select_a; tpi6525[1].b.output=cbmb_keyboard_line_select_b; tpi6525[1].c.output=cbmb_keyboard_line_select_c; timer_pulse(0.01, 0, cbmb_frame_interrupt); cbm_ieee_open(); }
static int st100_sh_start(const struct MachineSound *msound) { int mixing_levels[6] = {25,25,25,25,25,25}; memset(&st100loc, 0, sizeof(st100loc)); st100loc.channel = mixer_allocate_channels(6, mixing_levels); mixer_set_volume(st100loc.channel,0); // bit 1 mixer_set_volume(st100loc.channel+1,0); // bit 2 mixer_set_volume(st100loc.channel+2,0); // bit 3 mixer_set_volume(st100loc.channel+3,0); // bit 4 mixer_set_volume(st100loc.channel+4,0); // bit 5 mixer_set_volume(st100loc.channel+5,0); // bit 6 mixer_play_sample_16(st100loc.channel,s100Waveb1, sizeof(s100Waveb1), ST100_FREQ1*sizeof(s100Waveb1), 1); mixer_play_sample_16(st100loc.channel+1,s100Waveb1, sizeof(s100Waveb1), ST100_FREQ2*sizeof(s100Waveb1), 1); mixer_play_sample_16(st100loc.channel+2,s100Waveb1, sizeof(s100Waveb1), ST100_FREQ3*sizeof(s100Waveb1), 1); mixer_play_sample_16(st100loc.channel+3,s100Waveb1, sizeof(s100Waveb1), ST100_FREQ4*sizeof(s100Waveb1), 1); st100loc.freqb5 = 0; mixer_play_sample_16(st100loc.channel+4,s100Waveb5, sizeof(s100Waveb5), (freqarb5[st100loc.freqb5])*sizeof(s100Waveb5), 1); st100loc.freqb6 = 0; mixer_play_sample_16(st100loc.channel+5,s100Waveb6, sizeof(s100Waveb6), (freqarb6[st100loc.freqb6])*sizeof(s100Waveb6), 1); timer_pulse(TIME_IN_SEC(0.02),0,changefr); return 0; }
void senjyo_sh_start(void) { int i; /* z80 ctc init */ ctc_intf.baseclock = Machine->drv->cpu[1].cpu_clock; z80ctc_init (0, &ctc_intf); /* z80 pio init */ z80pio_init (0, &pio_intf); _single = (INT16 *)auto_malloc(SINGLE_LENGTH*2); for (i = 0;i < SINGLE_LENGTH;i++) /* freq = ctc2 zco / 8 */ _single[i] = ((i/SINGLE_DIVIDER)&0x01)*127*256; /* CTC2 single tone generator */ sample_set_volume(0,0); sample_start_raw(0,_single,SINGLE_LENGTH,single_rate,1); timer_pulse(TIME_IN_HZ(Machine->refresh_rate), 0, senjyo_sh_update); }
void senjyo_sh_start(void) { int i; /* z80 ctc init */ ctc_intf.baseclock = cpunum_get_clock(1); z80ctc_init (0, &ctc_intf); /* z80 pio init */ z80pio_init (0, &pio_intf); _single = (INT16 *)auto_malloc(SINGLE_LENGTH*2); for (i = 0;i < SINGLE_LENGTH;i++) /* freq = ctc2 zco / 8 */ _single[i] = ((i/SINGLE_DIVIDER)&0x01)*127*256; /* CTC2 single tone generator */ sample_set_volume(0,0); sample_start_raw(0,_single,SINGLE_LENGTH,single_rate,1); timer_pulse(video_screen_get_frame_period(Machine->primary_screen), NULL, 0, senjyo_sh_update); }
static void MSM5205_set_timer(int num,int select) { struct MSM5205Voice *voice = &msm5205[num]; static int prescaler_table[4] = {96,48,64,0}; int prescaler = prescaler_table[select&0x03]; if( voice->prescaler != prescaler ) { /* remove VCLK timer */ if(voice->timer) { timer_remove(voice->timer); voice->timer = 0; } voice->prescaler = prescaler; /* timer set */ if( prescaler ) { voice->timer = timer_pulse (TIME_IN_HZ (msm5205_intf->baseclock / prescaler), num, MSM5205_vclk_callback); } } }
static MACHINE_RESET( adam ) { if (image_exists(image_from_devtype_and_index(IO_CARTSLOT, 0))) { /* ColecoVision Mode Reset (Cartridge Mounted) */ adam_lower_memory = 3; /* OS7 + 24k RAM */ adam_upper_memory = 3; /* Cartridge ROM */ } else { /* Adam Mode Reset */ adam_lower_memory = 0; /* SmartWriter ROM/EOS */ adam_upper_memory = 0; /* Internal RAM */ } adam_net_data = 0; set_memory_banks(); adam_pcb=0xFEC0; clear_keyboard_buffer(); memset(&memory_region(REGION_CPU1)[0x0000], 0xFF, 0x20000); /* Initializing RAM */ timer_pulse(TIME_IN_MSEC(20), 0, adam_paddle_callback); }
static MACHINE_INIT( destroyr ) { timer_pulse(cpu_getscanlinetime(0), 0, destroyr_frame_callback); }
static MACHINE_INIT( dragrace ) { timer_pulse(cpu_getscanlinetime(0), 0, dragrace_frame_callback); }
void z80ctc_w (int which, int offset, int data) { z80ctc *ctc = ctcs + which; int mode, ch; /* keep channel within range, and get the current mode */ ch = offset & 3; mode = ctc->mode[ch]; /* if we're waiting for a time constant, this is it */ if ((mode & CONSTANT) == CONSTANT_LOAD) { /* set the time constant (0 -> 0x100) */ ctc->tconst[ch] = data ? data : 0x100; /* clear the internal mode -- we're no longer waiting */ ctc->mode[ch] &= ~CONSTANT; /* also clear the reset, since the constant gets it going again */ ctc->mode[ch] &= ~RESET; /* if we're in timer mode.... */ if ((mode & MODE) == MODE_TIMER) { /* if we're triggering on the time constant, reset the down counter now */ if ((mode & TRIGGER) == TRIGGER_AUTO) { double clock = ((mode & PRESCALER) == PRESCALER_16) ? ctc->invclock16 : ctc->invclock256; if (ctc->timer[ch]) timer_remove (ctc->timer[ch]); if (!(ctc->notimer & (1<<ch))) ctc->timer[ch] = timer_pulse (clock * (double)ctc->tconst[ch], (which << 2) + ch, z80ctc_timercallback); } /* else set the bit indicating that we're waiting for the appropriate trigger */ else ctc->mode[ch] |= WAITING_FOR_TRIG; } /* also set the down counter in case we're clocking externally */ ctc->down[ch] = ctc->tconst[ch]; /* all done here */ return; } /* if we're writing the interrupt vector, handle it specially */ #if 0 /* Tatsuyuki Satoh changes */ /* The 'Z80family handbook' wrote, */ /* interrupt vector is able to set for even channel (0 or 2) */ if ((data & CONTROL) == CONTROL_VECTOR && (ch&1) == 0) #else if ((data & CONTROL) == CONTROL_VECTOR && ch == 0) #endif { ctc->vector = data & 0xf8; if (errorlog) fprintf (errorlog, "CTC Vector = %02x\n", ctc->vector); return; } /* this must be a control word */ if ((data & CONTROL) == CONTROL_WORD) { /* set the new mode */ ctc->mode[ch] = data; if (errorlog) fprintf (errorlog,"CTC ch.%d mode = %02x\n", ch, data); /* if we're being reset, clear out any pending timers for this channel */ if ((data & RESET) == RESET_ACTIVE) { if (ctc->timer[ch]) timer_remove (ctc->timer[ch]); ctc->timer[ch] = NULL; if( ctc->int_state[ch] != 0 ) { /* clear interrupt service , request */ ctc->int_state[ch] = 0; z80ctc_interrupt_check( ctc ); } } /* all done here */ return; } }
static MACHINE_RESET(coleco) { cpunum_set_input_line_vector(0, 0, 0xff); memset(&memory_region(REGION_CPU1)[0x6000], 0xff, 0x400); // initialize RAM timer_pulse(TIME_IN_MSEC(20), 0, paddle_callback); }
static MACHINE_RESET( sprint4 ) { timer_set(cpu_getscanlinetime(32), 32, nmi_callback); timer_pulse(TIME_IN_HZ(60), 0, input_callback); }
static MACHINE_INIT(EFO) { sndbrd_0_init(core_gameData->hw.soundBoard, 1, memory_region(REGION_CPU2), NULL, NULL); ctc_intf.baseclock[2] = Machine->drv->cpu[0].cpu_clock; z80ctc_init(&ctc_intf); timer_pulse(TIME_IN_HZ(2000000), 0, ck0_pulse); }
static MACHINE_RESET( nitedrvr ) { timer_pulse(PERIOD_OF_555_ASTABLE(RES_K(180), 330, CAP_U(1)), NULL, 0, nitedrvr_crash_toggle_callback); nitedrvr_register_machine_vars(); }